[KINETIS] Move from main repo to contrib
This commit is contained in:
Fabio Utzig
parent
37ac6a4611
commit
b67ecdfeca
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@ -0,0 +1,53 @@
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<project id="RT-FREEDOM-KL25Z-EXT.null.1091738228" name="RT-FREEDOM-KL25Z-EXT"/>
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</cproject>
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@ -0,0 +1,34 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<projectDescription>
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||||
<name>RT-FREEDOM-K20D50M</name>
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<comment></comment>
|
||||
<projects>
|
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</projects>
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<buildSpec>
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<buildCommand>
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<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
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<triggers>clean,full,incremental,</triggers>
|
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<arguments>
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||||
</arguments>
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</buildCommand>
|
||||
<buildCommand>
|
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<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
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||||
<triggers>full,incremental,</triggers>
|
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<arguments>
|
||||
</arguments>
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</buildCommand>
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||||
</buildSpec>
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||||
<natures>
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<nature>org.eclipse.cdt.core.cnature</nature>
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<nature>org.eclipse.cdt.core.ccnature</nature>
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<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
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</natures>
|
||||
<linkedResources>
|
||||
<link>
|
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<name>os</name>
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<type>2</type>
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||||
<locationURI>CHIBIOS/os</locationURI>
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</link>
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||||
</linkedResources>
|
||||
</projectDescription>
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|
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@ -0,0 +1,218 @@
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|||
##############################################################################
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||||
# Build global options
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||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
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||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
|
||||
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||
endif
|
||||
|
||||
# C specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_COPT),)
|
||||
USE_COPT =
|
||||
endif
|
||||
|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
|
||||
USE_CPPOPT = -fno-rtti
|
||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data
|
||||
ifeq ($(USE_LINK_GC),)
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||||
USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# Linker extra options here.
|
||||
ifeq ($(USE_LDOPT),)
|
||||
USE_LDOPT =
|
||||
endif
|
||||
|
||||
# Enable this if you want link time optimizations (LTO)
|
||||
ifeq ($(USE_LTO),)
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||||
USE_LTO = yes
|
||||
endif
|
||||
|
||||
# If enabled, this option allows to compile the application in THUMB mode.
|
||||
ifeq ($(USE_THUMB),)
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USE_THUMB = yes
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||||
endif
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||||
|
||||
# Enable this if you want to see the full log while compiling.
|
||||
ifeq ($(USE_VERBOSE_COMPILE),)
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||||
USE_VERBOSE_COMPILE = no
|
||||
endif
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||||
|
||||
# If enabled, this option makes the build process faster by not compiling
|
||||
# modules not used in the current configuration.
|
||||
ifeq ($(USE_SMART_BUILD),)
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||||
USE_SMART_BUILD = yes
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||||
endif
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||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
|
||||
|
||||
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||
# the stack used by the main() thread.
|
||||
ifeq ($(USE_PROCESS_STACKSIZE),)
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||||
USE_PROCESS_STACKSIZE = 0x200
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||||
endif
|
||||
|
||||
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||
# stack is used for processing interrupts and exceptions.
|
||||
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
# Enables the use of FPU (no, softfp, hard).
|
||||
ifeq ($(USE_FPU),)
|
||||
USE_FPU = no
|
||||
endif
|
||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, sources and paths
|
||||
#
|
||||
|
||||
# Define project name here
|
||||
PROJECT = ch
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|
||||
# Imported source files and paths
|
||||
CHIBIOS = ../../../../ChibiOS-RT
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||||
CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
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# Startup files.
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||||
include $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_k20x.mk
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# HAL-OSAL files (optional).
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x/platform.mk
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include $(CHIBIOS_CONTRIB)/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk
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include $(CHIBIOS)/os/hal/osal/rt/osal.mk
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# RTOS files (optional).
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||||
include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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||||
# Other files (optional).
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||||
include $(CHIBIOS)/test/rt/test.mk
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||||
|
||||
# Define linker script file here
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||||
LDSCRIPT= $(STARTUPLD)/MK20DX128.ld
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||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CSRC = $(STARTUPSRC) \
|
||||
$(KERNSRC) \
|
||||
$(PORTSRC) \
|
||||
$(OSALSRC) \
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||||
$(HALSRC) \
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||||
$(PLATFORMSRC) \
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||||
$(BOARDSRC) \
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||||
$(TESTSRC) \
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||||
main.c
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||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC =
|
||||
|
||||
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACSRC =
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||||
|
||||
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACPPSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCPPSRC =
|
||||
|
||||
# List ASM source files here
|
||||
ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
|
||||
|
||||
INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
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||||
$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
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||||
$(CHIBIOS)/os/various
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||||
|
||||
#
|
||||
# Project, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Compiler settings
|
||||
#
|
||||
|
||||
MCU = cortex-m4
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|
||||
#TRGT = arm-elf-
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||||
TRGT = arm-none-eabi-
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||||
CC = $(TRGT)gcc
|
||||
CPPC = $(TRGT)g++
|
||||
# Enable loading with g++ only if you need C++ runtime support.
|
||||
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||
# runtime support makes code size explode.
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||||
LD = $(TRGT)gcc
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#LD = $(TRGT)g++
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||||
CP = $(TRGT)objcopy
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||||
AS = $(TRGT)gcc -x assembler-with-cpp
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||||
AR = $(TRGT)ar
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||||
OD = $(TRGT)objdump
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||||
SZ = $(TRGT)size
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||||
HEX = $(CP) -O ihex
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||||
BIN = $(CP) -O binary
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||||
SREC = $(CP) -O srec
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||||
|
||||
# ARM-specific options here
|
||||
AOPT =
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||||
|
||||
# THUMB-specific options here
|
||||
TOPT = -mthumb -DTHUMB
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||||
|
||||
# Define C warning options here
|
||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
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||||
|
||||
# Define C++ warning options here
|
||||
CPPWARN = -Wall -Wextra -Wundef
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||||
|
||||
#
|
||||
# Compiler settings
|
||||
##############################################################################
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||||
|
||||
##############################################################################
|
||||
# Start of user section
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||||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
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||||
UDEFS =
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||||
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||||
# Define ASM defines here
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||||
UADEFS =
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||||
|
||||
# List all user directories here
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||||
UINCDIR =
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||||
|
||||
# List the user directory to look for the libraries here
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||||
ULIBDIR =
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||||
|
||||
# List all user libraries here
|
||||
ULIBS =
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||||
|
||||
#
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||||
# End of user defines
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||||
##############################################################################
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||||
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||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
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include $(RULESPATH)/rules.mk
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@ -0,0 +1,524 @@
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/*
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||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
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||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
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||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
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||||
* @{
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||||
*/
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||||
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||||
#ifndef _CHCONF_H_
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||||
#define _CHCONF_H_
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||||
|
||||
#define _CHIBIOS_RT_CONF_
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||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#define CH_CFG_ST_FREQUENCY 1000
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#define CH_CFG_ST_TIMEDELTA 0
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#define CH_CFG_TIME_QUANTUM 20
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_TM FALSE
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
|
||||
/**
|
||||
* @brief I/O Queues APIs.
|
||||
* @details If enabled then the I/O queues APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_QUEUES TRUE
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the context switch circular trace buffer is
|
||||
* activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_TRACE FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*
|
||||
* @note It is inserted into lock zone.
|
||||
* @note It is also invoked when the threads simply return in order to
|
||||
* terminate.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* _CHCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
|
||||
<stringAttribute key="bad_container_name" value="\RT-FREEDOM-K20D50M\debug"/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set remotetimeout 20 monitor reset init monitor sleep 50 "/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RT-FREEDOM-K20D50M"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.114656749"/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/RT-FREEDOM-K20D50M"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
|
||||
<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
|
||||
</listAttribute>
|
||||
</launchConfiguration>
|
||||
|
|
@ -0,0 +1,381 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HALCONF_H_
|
||||
#define _HALCONF_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 16 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 256 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial over USB number of buffers.
|
||||
* @note The default is 2 buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define UART_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
#endif /* _HALCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
#include "test.h"
|
||||
|
||||
static THD_WORKING_AREA(waThread1, 64);
|
||||
static THD_FUNCTION(Thread1, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("RedBlinker");
|
||||
while (true) {
|
||||
palTogglePad(IOPORT3, 3);
|
||||
chThdSleepMilliseconds(300);
|
||||
}
|
||||
}
|
||||
|
||||
static THD_WORKING_AREA(waThread2, 64);
|
||||
static THD_FUNCTION(Thread2, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("GreenBlinker");
|
||||
while (true) {
|
||||
palTogglePad(IOPORT4, 4);
|
||||
chThdSleepMilliseconds(600);
|
||||
}
|
||||
}
|
||||
|
||||
static THD_WORKING_AREA(waThread3, 64);
|
||||
static THD_FUNCTION(Thread3, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("BlueBlinker");
|
||||
while (true) {
|
||||
palTogglePad(IOPORT1, 2);
|
||||
chThdSleepMilliseconds(900);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
|
||||
|
||||
/*
|
||||
* System initializations.
|
||||
* - HAL initialization, this also initializes the configured device drivers
|
||||
* and performs the board-specific initializations.
|
||||
* - Kernel initialization, the main() function becomes a thread and the
|
||||
* RTOS is active.
|
||||
*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
/*
|
||||
* Activates serial 1 (UART0) using the driver default configuration.
|
||||
*/
|
||||
sdStart(&SD1, NULL);
|
||||
|
||||
/*
|
||||
* Creates the blinker threads.
|
||||
*/
|
||||
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
|
||||
chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, NULL);
|
||||
chThdCreateStatic(waThread3, sizeof(waThread3), NORMALPRIO, Thread3, NULL);
|
||||
|
||||
TestThread(&SD1);
|
||||
while (1) {
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,74 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _MCUCONF_H_
|
||||
#define _MCUCONF_H_
|
||||
|
||||
#define K20x_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
|
||||
/* Select the MCU clocking mode below by enabling the appropriate block. */
|
||||
|
||||
/* Enable clock initialization by HAL */
|
||||
#define KINETIS_NO_INIT FALSE
|
||||
|
||||
/* PEE mode - external 8 MHz crystal with PLL for 48 MHz core/system clock. */
|
||||
#if 1
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
|
||||
#define KINETIS_XTAL_FREQUENCY 8000000UL
|
||||
#define KINETIS_SYSCLK_FREQUENCY 48000000UL
|
||||
#endif
|
||||
|
||||
/* FEI mode - 48 MHz with internal 32.768 kHz oscillator */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
|
||||
#endif /* 0 */
|
||||
|
||||
/* FEE mode - 24 MHz with external 32.768 kHz crystal */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 0 /* 732x FLL factor */
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 23986176UL /* 32.768 kHz*732 (~24 MHz) */
|
||||
#define KINETIS_UART0_CLOCK_FREQ (32768 * 732) /* FLL output */
|
||||
#define KINETIS_UART0_CLOCK_SRC 1 /* Select FLL clock */
|
||||
#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_MCG_FLL_OUTDIV4)
|
||||
#endif /* 0 */
|
||||
|
||||
/* FEE mode - 48 MHz */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
|
||||
#endif /* 0 */
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define KINETIS_SERIAL_USE_UART0 TRUE
|
||||
|
||||
#endif /* _MCUCONF_H_ */
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
*****************************************************************************
|
||||
** ChibiOS/RT port for ARM-Cortex-M4 Freedom Board K20D50M. **
|
||||
*****************************************************************************
|
||||
|
||||
** TARGET **
|
||||
|
||||
The demo runs on an Freescale Freedom K20D50M board.
|
||||
|
||||
** The Demo **
|
||||
|
||||
|
||||
** Build Procedure **
|
||||
|
||||
The demo has been tested by using the free Codesourcery GCC-based toolchain
|
||||
and YAGARTO. just modify the TRGT line in the makefile in order to use
|
||||
different GCC toolchains.
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="0.1036984191">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1036984191" moduleId="org.eclipse.cdt.core.settings" name="Default">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration buildProperties="" description="" id="0.1036984191" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
|
||||
<folderInfo id="0.1036984191." name="/" resourcePath="">
|
||||
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.821794271" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
|
||||
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.821794271.1893716416" name=""/>
|
||||
<builder id="org.eclipse.cdt.build.core.settings.default.builder.887297527" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.898586141" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.2094478021" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.1106703813" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths"/>
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1380670738" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1239989050" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.437018981" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths"/>
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.901576669" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1349089589" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.562130188" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths"/>
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.223906781" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="RT-FREEDOM-KL25Z-EXT.null.1091738228" name="RT-FREEDOM-KL25Z-EXT"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="refreshScope"/>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="0.1036984191">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
</cproject>
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>RT-FREEDOM-KL25Z</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.core.ccnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>os</name>
|
||||
<type>2</type>
|
||||
<locationURI>CHIBIOS/os</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
</projectDescription>
|
||||
|
|
@ -0,0 +1,213 @@
|
|||
##############################################################################
|
||||
# Build global options
|
||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
|
||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
|
||||
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||
endif
|
||||
|
||||
# C specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_COPT),)
|
||||
USE_COPT =
|
||||
endif
|
||||
|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
|
||||
USE_CPPOPT = -fno-rtti
|
||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data
|
||||
ifeq ($(USE_LINK_GC),)
|
||||
USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# Linker extra options here.
|
||||
ifeq ($(USE_LDOPT),)
|
||||
USE_LDOPT =
|
||||
endif
|
||||
|
||||
# Enable this if you want link time optimizations (LTO)
|
||||
ifeq ($(USE_LTO),)
|
||||
USE_LTO = yes
|
||||
endif
|
||||
|
||||
# If enabled, this option allows to compile the application in THUMB mode.
|
||||
ifeq ($(USE_THUMB),)
|
||||
USE_THUMB = yes
|
||||
endif
|
||||
|
||||
# Enable this if you want to see the full log while compiling.
|
||||
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||
USE_VERBOSE_COMPILE = no
|
||||
endif
|
||||
|
||||
# If enabled, this option makes the build process faster by not compiling
|
||||
# modules not used in the current configuration.
|
||||
ifeq ($(USE_SMART_BUILD),)
|
||||
USE_SMART_BUILD = yes
|
||||
endif
|
||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
|
||||
|
||||
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||
# the stack used by the main() thread.
|
||||
ifeq ($(USE_PROCESS_STACKSIZE),)
|
||||
USE_PROCESS_STACKSIZE = 0x200
|
||||
endif
|
||||
|
||||
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||
# stack is used for processing interrupts and exceptions.
|
||||
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, sources and paths
|
||||
#
|
||||
|
||||
# Define project name here
|
||||
PROJECT = ch
|
||||
|
||||
# Imported source files and paths
|
||||
CHIBIOS = ../../../../ChibiOS-RT
|
||||
CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
|
||||
# Startup files.
|
||||
include $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
|
||||
# HAL-OSAL files (optional).
|
||||
include $(CHIBIOS)/os/hal/hal.mk
|
||||
include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/KL2x/platform.mk
|
||||
include $(CHIBIOS_CONTRIB)/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk
|
||||
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
|
||||
# RTOS files (optional).
|
||||
include $(CHIBIOS)/os/rt/rt.mk
|
||||
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk
|
||||
# Other files (optional).
|
||||
include $(CHIBIOS)/test/rt/test.mk
|
||||
|
||||
# Define linker script file here
|
||||
LDSCRIPT= $(STARTUPLD)/KL25Z128.ld
|
||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CSRC = $(STARTUPSRC) \
|
||||
$(KERNSRC) \
|
||||
$(PORTSRC) \
|
||||
$(OSALSRC) \
|
||||
$(HALSRC) \
|
||||
$(PLATFORMSRC) \
|
||||
$(BOARDSRC) \
|
||||
$(TESTSRC) \
|
||||
main.c
|
||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC =
|
||||
|
||||
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACSRC =
|
||||
|
||||
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACPPSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCPPSRC =
|
||||
|
||||
# List ASM source files here
|
||||
ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
|
||||
|
||||
INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
|
||||
$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
|
||||
$(CHIBIOS)/os/various
|
||||
|
||||
#
|
||||
# Project, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Compiler settings
|
||||
#
|
||||
|
||||
MCU = cortex-m0
|
||||
|
||||
#TRGT = arm-elf-
|
||||
TRGT = arm-none-eabi-
|
||||
CC = $(TRGT)gcc
|
||||
CPPC = $(TRGT)g++
|
||||
# Enable loading with g++ only if you need C++ runtime support.
|
||||
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||
# runtime support makes code size explode.
|
||||
LD = $(TRGT)gcc
|
||||
#LD = $(TRGT)g++
|
||||
CP = $(TRGT)objcopy
|
||||
AS = $(TRGT)gcc -x assembler-with-cpp
|
||||
AR = $(TRGT)ar
|
||||
OD = $(TRGT)objdump
|
||||
SZ = $(TRGT)size
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary
|
||||
SREC = $(CP) -O srec
|
||||
|
||||
# ARM-specific options here
|
||||
AOPT =
|
||||
|
||||
# THUMB-specific options here
|
||||
TOPT = -mthumb -DTHUMB
|
||||
|
||||
# Define C warning options here
|
||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||
|
||||
# Define C++ warning options here
|
||||
CPPWARN = -Wall -Wextra -Wundef
|
||||
|
||||
#
|
||||
# Compiler settings
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of user section
|
||||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
||||
# List all user directories here
|
||||
UINCDIR =
|
||||
|
||||
# List the user directory to look for the libraries here
|
||||
ULIBDIR =
|
||||
|
||||
# List all user libraries here
|
||||
ULIBS =
|
||||
|
||||
#
|
||||
# End of user defines
|
||||
##############################################################################
|
||||
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
|
||||
include $(RULESPATH)/rules.mk
|
||||
|
|
@ -0,0 +1,524 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCONF_H_
|
||||
#define _CHCONF_H_
|
||||
|
||||
#define _CHIBIOS_RT_CONF_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#define CH_CFG_ST_FREQUENCY 1000
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#define CH_CFG_ST_TIMEDELTA 0
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#define CH_CFG_TIME_QUANTUM 20
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_TM FALSE
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
|
||||
/**
|
||||
* @brief I/O Queues APIs.
|
||||
* @details If enabled then the I/O queues APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_QUEUES TRUE
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the context switch circular trace buffer is
|
||||
* activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_TRACE FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*
|
||||
* @note It is inserted into lock zone.
|
||||
* @note It is also invoked when the threads simply return in order to
|
||||
* terminate.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* _CHCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
||||
<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
|
||||
<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
|
||||
</listAttribute>
|
||||
</launchConfiguration>
|
||||
|
|
@ -0,0 +1,381 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HALCONF_H_
|
||||
#define _HALCONF_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 16 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 256 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial over USB number of buffers.
|
||||
* @note The default is 2 buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define UART_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
#endif /* _HALCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
#include "test.h"
|
||||
|
||||
static THD_WORKING_AREA(waThread1, 64);
|
||||
static THD_FUNCTION(Thread1, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("RedBlinker");
|
||||
while (true) {
|
||||
palTogglePad(IOPORT2, 18);
|
||||
chThdSleepMilliseconds(300);
|
||||
}
|
||||
}
|
||||
|
||||
static THD_WORKING_AREA(waThread2, 64);
|
||||
static THD_FUNCTION(Thread2, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("GreenBlinker");
|
||||
while (true) {
|
||||
palTogglePad(IOPORT2, 19);
|
||||
chThdSleepMilliseconds(600);
|
||||
}
|
||||
}
|
||||
|
||||
static THD_WORKING_AREA(waThread3, 64);
|
||||
static THD_FUNCTION(Thread3, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("BlueBlinker");
|
||||
while (true) {
|
||||
palTogglePad(IOPORT4, 1);
|
||||
chThdSleepMilliseconds(900);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
|
||||
|
||||
/*
|
||||
* System initializations.
|
||||
* - HAL initialization, this also initializes the configured device drivers
|
||||
* and performs the board-specific initializations.
|
||||
* - Kernel initialization, the main() function becomes a thread and the
|
||||
* RTOS is active.
|
||||
*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
/*
|
||||
* Activates serial 1 (UART0) using the driver default configuration.
|
||||
*/
|
||||
sdStart(&SD1, NULL);
|
||||
|
||||
/*
|
||||
* Creates the blinker threads.
|
||||
*/
|
||||
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
|
||||
chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, NULL);
|
||||
chThdCreateStatic(waThread3, sizeof(waThread3), NORMALPRIO, Thread3, NULL);
|
||||
|
||||
TestThread(&SD1);
|
||||
while (1) {
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _MCUCONF_H_
|
||||
#define _MCUCONF_H_
|
||||
|
||||
/*
|
||||
* STM32F0xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 3...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#define KL2x_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
|
||||
/* Select the MCU clocking mode below by enabling the appropriate block. */
|
||||
|
||||
/* FEI mode */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI
|
||||
#define KINETIS_SYSCLK_FREQUENCY 21000000UL
|
||||
#endif /* 0 */
|
||||
|
||||
/* FEE mode - 24 MHz with external 32.768 kHz crystal */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 0 /* 732x FLL factor */
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 23986176UL /* 32.768 kHz*732 (~24 MHz) */
|
||||
#define KINETIS_UART0_CLOCK_FREQ (32768 * 732) /* FLL output */
|
||||
#define KINETIS_UART0_CLOCK_SRC 1 /* Select FLL clock */
|
||||
#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_MCG_FLL_OUTDIV4)
|
||||
#endif /* 0 */
|
||||
|
||||
/* FEE mode - 48 MHz */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
|
||||
#endif /* 0 */
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define KINETIS_SERIAL_USE_UART0 TRUE
|
||||
|
||||
#endif /* _MCUCONF_H_ */
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
*****************************************************************************
|
||||
** ChibiOS/RT port for ARM-Cortex-M0+ Freedom Board KL25Z. **
|
||||
*****************************************************************************
|
||||
|
||||
** TARGET **
|
||||
|
||||
The demo runs on an Freescale Freedom KL25Z board.
|
||||
|
||||
** The Demo **
|
||||
|
||||
|
||||
** Build Procedure **
|
||||
|
||||
The demo has been tested by using the free Codesourcery GCC-based toolchain
|
||||
and YAGARTO. just modify the TRGT line in the makefile in order to use
|
||||
different GCC toolchains.
|
||||
|
|
@ -0,0 +1,389 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* KL25Z128 memory setup.
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
flash0 : org = 0x00000000, len = 0x100
|
||||
flashcfg : org = 0x00000400, len = 0x10
|
||||
flash : org = 0x00000410, len = 128k - 0x410
|
||||
ram0 : org = 0x1FFFF000, len = 16k
|
||||
ram1 : org = 0x00000000, len = 0
|
||||
ram2 : org = 0x00000000, len = 0
|
||||
ram3 : org = 0x00000000, len = 0
|
||||
ram4 : org = 0x00000000, len = 0
|
||||
ram5 : org = 0x00000000, len = 0
|
||||
ram6 : org = 0x00000000, len = 0
|
||||
ram7 : org = 0x00000000, len = 0
|
||||
}
|
||||
|
||||
REGION_ALIAS("MAIN_STACK_RAM", ram0);
|
||||
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
|
||||
REGION_ALIAS("DATA_RAM", ram0);
|
||||
REGION_ALIAS("BSS_RAM", ram0);
|
||||
REGION_ALIAS("HEAP_RAM", ram0);
|
||||
|
||||
__ram0_start__ = ORIGIN(ram0);
|
||||
__ram0_size__ = LENGTH(ram0);
|
||||
__ram0_end__ = __ram0_start__ + __ram0_size__;
|
||||
__ram1_start__ = ORIGIN(ram1);
|
||||
__ram1_size__ = LENGTH(ram1);
|
||||
__ram1_end__ = __ram1_start__ + __ram1_size__;
|
||||
__ram2_start__ = ORIGIN(ram2);
|
||||
__ram2_size__ = LENGTH(ram2);
|
||||
__ram2_end__ = __ram2_start__ + __ram2_size__;
|
||||
__ram3_start__ = ORIGIN(ram3);
|
||||
__ram3_size__ = LENGTH(ram3);
|
||||
__ram3_end__ = __ram3_start__ + __ram3_size__;
|
||||
__ram4_start__ = ORIGIN(ram4);
|
||||
__ram4_size__ = LENGTH(ram4);
|
||||
__ram4_end__ = __ram4_start__ + __ram4_size__;
|
||||
__ram5_start__ = ORIGIN(ram5);
|
||||
__ram5_size__ = LENGTH(ram5);
|
||||
__ram5_end__ = __ram5_start__ + __ram5_size__;
|
||||
__ram6_start__ = ORIGIN(ram6);
|
||||
__ram6_size__ = LENGTH(ram6);
|
||||
__ram6_end__ = __ram6_start__ + __ram6_size__;
|
||||
__ram7_start__ = ORIGIN(ram7);
|
||||
__ram7_size__ = LENGTH(ram7);
|
||||
__ram7_end__ = __ram7_start__ + __ram7_size__;
|
||||
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
} > flash0
|
||||
|
||||
.cfmprotect : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
KEEP(*(.cfmconfig))
|
||||
} > flashcfg
|
||||
|
||||
_text = .;
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
__init_array_start = .;
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
__init_array_end = .;
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
__fini_array_start = .;
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
__exidx_end = .;
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
/* Legacy symbol, not used anywhere.*/
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_etext = .);
|
||||
|
||||
/* Special section for exceptions stack.*/
|
||||
.mstack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
} > MAIN_STACK_RAM
|
||||
|
||||
/* Special section for process stack.*/
|
||||
.pstack :
|
||||
{
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > PROCESS_STACK_RAM
|
||||
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_textdata = LOADADDR(.data));
|
||||
PROVIDE(_data = .);
|
||||
_textdata_start = LOADADDR(.data);
|
||||
_data_start = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
_data_end = .;
|
||||
} > DATA_RAM AT > flash
|
||||
|
||||
.bss (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_bss_start = .;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bss_end = .;
|
||||
PROVIDE(end = .);
|
||||
} > BSS_RAM
|
||||
|
||||
.ram0_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram0_init_text__ = LOADADDR(.ram0_init);
|
||||
__ram0_init__ = .;
|
||||
*(.ram0_init)
|
||||
*(.ram0_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram0 AT > flash
|
||||
|
||||
.ram0 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram0_clear__ = .;
|
||||
*(.ram0_clear)
|
||||
*(.ram0_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram0_noinit__ = .;
|
||||
*(.ram0)
|
||||
*(.ram0.*)
|
||||
. = ALIGN(4);
|
||||
__ram0_free__ = .;
|
||||
} > ram0
|
||||
|
||||
.ram1_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram1_init_text__ = LOADADDR(.ram1_init);
|
||||
__ram1_init__ = .;
|
||||
*(.ram1_init)
|
||||
*(.ram1_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram1 AT > flash
|
||||
|
||||
.ram1 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram1_clear__ = .;
|
||||
*(.ram1_clear)
|
||||
*(.ram1_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram1_noinit__ = .;
|
||||
*(.ram1)
|
||||
*(.ram1.*)
|
||||
. = ALIGN(4);
|
||||
__ram1_free__ = .;
|
||||
} > ram1
|
||||
|
||||
.ram2_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram2_init_text__ = LOADADDR(.ram2_init);
|
||||
__ram2_init__ = .;
|
||||
*(.ram2_init)
|
||||
*(.ram2_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram2 AT > flash
|
||||
|
||||
.ram2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram2_clear__ = .;
|
||||
*(.ram2_clear)
|
||||
*(.ram2_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram2_noinit__ = .;
|
||||
*(.ram2)
|
||||
*(.ram2.*)
|
||||
. = ALIGN(4);
|
||||
__ram2_free__ = .;
|
||||
} > ram2
|
||||
|
||||
.ram3_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram3_init_text__ = LOADADDR(.ram3_init);
|
||||
__ram3_init__ = .;
|
||||
*(.ram3_init)
|
||||
*(.ram3_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram3 AT > flash
|
||||
|
||||
.ram3 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram3_clear__ = .;
|
||||
*(.ram3_clear)
|
||||
*(.ram3_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram3_noinit__ = .;
|
||||
*(.ram3)
|
||||
*(.ram3.*)
|
||||
. = ALIGN(4);
|
||||
__ram3_free__ = .;
|
||||
} > ram3
|
||||
|
||||
.ram4_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram4_init_text__ = LOADADDR(.ram4_init);
|
||||
__ram4_init__ = .;
|
||||
*(.ram4_init)
|
||||
*(.ram4_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram4 AT > flash
|
||||
|
||||
.ram4 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram4_clear__ = .;
|
||||
*(.ram4_clear)
|
||||
*(.ram4_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram4_noinit__ = .;
|
||||
*(.ram4)
|
||||
*(.ram4.*)
|
||||
. = ALIGN(4);
|
||||
__ram4_free__ = .;
|
||||
} > ram4
|
||||
|
||||
.ram5_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram5_init_text__ = LOADADDR(.ram5_init);
|
||||
__ram5_init__ = .;
|
||||
*(.ram5_init)
|
||||
*(.ram5_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram5 AT > flash
|
||||
|
||||
.ram5 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram5_clear__ = .;
|
||||
*(.ram5_clear)
|
||||
*(.ram5_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram5_noinit__ = .;
|
||||
*(.ram5)
|
||||
*(.ram5.*)
|
||||
. = ALIGN(4);
|
||||
__ram5_free__ = .;
|
||||
} > ram5
|
||||
|
||||
.ram6_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram6_init_text__ = LOADADDR(.ram6_init);
|
||||
__ram6_init__ = .;
|
||||
*(.ram6_init)
|
||||
*(.ram6_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram6 AT > flash
|
||||
|
||||
.ram6 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram6_clear__ = .;
|
||||
*(.ram6_clear)
|
||||
*(.ram6_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram6_noinit__ = .;
|
||||
*(.ram6)
|
||||
*(.ram6.*)
|
||||
. = ALIGN(4);
|
||||
__ram6_free__ = .;
|
||||
} > ram6
|
||||
|
||||
.ram7_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram7_init_text__ = LOADADDR(.ram7_init);
|
||||
__ram7_init__ = .;
|
||||
*(.ram7_init)
|
||||
*(.ram7_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram7 AT > flash
|
||||
|
||||
.ram7 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram7_clear__ = .;
|
||||
*(.ram7_clear)
|
||||
*(.ram7_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram7_noinit__ = .;
|
||||
*(.ram7)
|
||||
*(.ram7.*)
|
||||
. = ALIGN(4);
|
||||
__ram7_free__ = .;
|
||||
} > ram7
|
||||
|
||||
/* The default heap uses the (statically) unused part of a RAM section.*/
|
||||
.heap (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__heap_base__ = .;
|
||||
. = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM);
|
||||
__heap_end__ = .;
|
||||
} > HEAP_RAM
|
||||
}
|
||||
|
|
@ -0,0 +1,389 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* MK20DX128 memory setup.
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
flash0 : org = 0x00000000, len = 0x100
|
||||
flashcfg : org = 0x00000400, len = 0x10
|
||||
flash : org = 0x00000410, len = 128k - 0x410
|
||||
ram0 : org = 0x1fffe000, len = 16k
|
||||
ram1 : org = 0x00000000, len = 0
|
||||
ram2 : org = 0x00000000, len = 0
|
||||
ram3 : org = 0x00000000, len = 0
|
||||
ram4 : org = 0x00000000, len = 0
|
||||
ram5 : org = 0x00000000, len = 0
|
||||
ram6 : org = 0x00000000, len = 0
|
||||
ram7 : org = 0x00000000, len = 0
|
||||
}
|
||||
|
||||
REGION_ALIAS("MAIN_STACK_RAM", ram0);
|
||||
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
|
||||
REGION_ALIAS("DATA_RAM", ram0);
|
||||
REGION_ALIAS("BSS_RAM", ram0);
|
||||
REGION_ALIAS("HEAP_RAM", ram0);
|
||||
|
||||
__ram0_start__ = ORIGIN(ram0);
|
||||
__ram0_size__ = LENGTH(ram0);
|
||||
__ram0_end__ = __ram0_start__ + __ram0_size__;
|
||||
__ram1_start__ = ORIGIN(ram1);
|
||||
__ram1_size__ = LENGTH(ram1);
|
||||
__ram1_end__ = __ram1_start__ + __ram1_size__;
|
||||
__ram2_start__ = ORIGIN(ram2);
|
||||
__ram2_size__ = LENGTH(ram2);
|
||||
__ram2_end__ = __ram2_start__ + __ram2_size__;
|
||||
__ram3_start__ = ORIGIN(ram3);
|
||||
__ram3_size__ = LENGTH(ram3);
|
||||
__ram3_end__ = __ram3_start__ + __ram3_size__;
|
||||
__ram4_start__ = ORIGIN(ram4);
|
||||
__ram4_size__ = LENGTH(ram4);
|
||||
__ram4_end__ = __ram4_start__ + __ram4_size__;
|
||||
__ram5_start__ = ORIGIN(ram5);
|
||||
__ram5_size__ = LENGTH(ram5);
|
||||
__ram5_end__ = __ram5_start__ + __ram5_size__;
|
||||
__ram6_start__ = ORIGIN(ram6);
|
||||
__ram6_size__ = LENGTH(ram6);
|
||||
__ram6_end__ = __ram6_start__ + __ram6_size__;
|
||||
__ram7_start__ = ORIGIN(ram7);
|
||||
__ram7_size__ = LENGTH(ram7);
|
||||
__ram7_end__ = __ram7_start__ + __ram7_size__;
|
||||
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(.vectors))
|
||||
} > flash0
|
||||
|
||||
.cfmprotect : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
KEEP(*(.cfmconfig))
|
||||
} > flashcfg
|
||||
|
||||
_text = .;
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
__init_array_start = .;
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
__init_array_end = .;
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
__fini_array_start = .;
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
__exidx_end = .;
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
/* Legacy symbol, not used anywhere.*/
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_etext = .);
|
||||
|
||||
/* Special section for exceptions stack.*/
|
||||
.mstack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
} > MAIN_STACK_RAM
|
||||
|
||||
/* Special section for process stack.*/
|
||||
.pstack :
|
||||
{
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > PROCESS_STACK_RAM
|
||||
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_textdata = LOADADDR(.data));
|
||||
PROVIDE(_data = .);
|
||||
_textdata_start = LOADADDR(.data);
|
||||
_data_start = .;
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
_data_end = .;
|
||||
} > DATA_RAM AT > flash
|
||||
|
||||
.bss (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_bss_start = .;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_bss_end = .;
|
||||
PROVIDE(end = .);
|
||||
} > BSS_RAM
|
||||
|
||||
.ram0_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram0_init_text__ = LOADADDR(.ram0_init);
|
||||
__ram0_init__ = .;
|
||||
*(.ram0_init)
|
||||
*(.ram0_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram0 AT > flash
|
||||
|
||||
.ram0 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram0_clear__ = .;
|
||||
*(.ram0_clear)
|
||||
*(.ram0_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram0_noinit__ = .;
|
||||
*(.ram0)
|
||||
*(.ram0.*)
|
||||
. = ALIGN(4);
|
||||
__ram0_free__ = .;
|
||||
} > ram0
|
||||
|
||||
.ram1_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram1_init_text__ = LOADADDR(.ram1_init);
|
||||
__ram1_init__ = .;
|
||||
*(.ram1_init)
|
||||
*(.ram1_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram1 AT > flash
|
||||
|
||||
.ram1 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram1_clear__ = .;
|
||||
*(.ram1_clear)
|
||||
*(.ram1_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram1_noinit__ = .;
|
||||
*(.ram1)
|
||||
*(.ram1.*)
|
||||
. = ALIGN(4);
|
||||
__ram1_free__ = .;
|
||||
} > ram1
|
||||
|
||||
.ram2_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram2_init_text__ = LOADADDR(.ram2_init);
|
||||
__ram2_init__ = .;
|
||||
*(.ram2_init)
|
||||
*(.ram2_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram2 AT > flash
|
||||
|
||||
.ram2 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram2_clear__ = .;
|
||||
*(.ram2_clear)
|
||||
*(.ram2_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram2_noinit__ = .;
|
||||
*(.ram2)
|
||||
*(.ram2.*)
|
||||
. = ALIGN(4);
|
||||
__ram2_free__ = .;
|
||||
} > ram2
|
||||
|
||||
.ram3_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram3_init_text__ = LOADADDR(.ram3_init);
|
||||
__ram3_init__ = .;
|
||||
*(.ram3_init)
|
||||
*(.ram3_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram3 AT > flash
|
||||
|
||||
.ram3 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram3_clear__ = .;
|
||||
*(.ram3_clear)
|
||||
*(.ram3_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram3_noinit__ = .;
|
||||
*(.ram3)
|
||||
*(.ram3.*)
|
||||
. = ALIGN(4);
|
||||
__ram3_free__ = .;
|
||||
} > ram3
|
||||
|
||||
.ram4_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram4_init_text__ = LOADADDR(.ram4_init);
|
||||
__ram4_init__ = .;
|
||||
*(.ram4_init)
|
||||
*(.ram4_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram4 AT > flash
|
||||
|
||||
.ram4 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram4_clear__ = .;
|
||||
*(.ram4_clear)
|
||||
*(.ram4_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram4_noinit__ = .;
|
||||
*(.ram4)
|
||||
*(.ram4.*)
|
||||
. = ALIGN(4);
|
||||
__ram4_free__ = .;
|
||||
} > ram4
|
||||
|
||||
.ram5_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram5_init_text__ = LOADADDR(.ram5_init);
|
||||
__ram5_init__ = .;
|
||||
*(.ram5_init)
|
||||
*(.ram5_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram5 AT > flash
|
||||
|
||||
.ram5 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram5_clear__ = .;
|
||||
*(.ram5_clear)
|
||||
*(.ram5_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram5_noinit__ = .;
|
||||
*(.ram5)
|
||||
*(.ram5.*)
|
||||
. = ALIGN(4);
|
||||
__ram5_free__ = .;
|
||||
} > ram5
|
||||
|
||||
.ram6_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram6_init_text__ = LOADADDR(.ram6_init);
|
||||
__ram6_init__ = .;
|
||||
*(.ram6_init)
|
||||
*(.ram6_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram6 AT > flash
|
||||
|
||||
.ram6 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram6_clear__ = .;
|
||||
*(.ram6_clear)
|
||||
*(.ram6_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram6_noinit__ = .;
|
||||
*(.ram6)
|
||||
*(.ram6.*)
|
||||
. = ALIGN(4);
|
||||
__ram6_free__ = .;
|
||||
} > ram6
|
||||
|
||||
.ram7_init : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram7_init_text__ = LOADADDR(.ram7_init);
|
||||
__ram7_init__ = .;
|
||||
*(.ram7_init)
|
||||
*(.ram7_init.*)
|
||||
. = ALIGN(4);
|
||||
} > ram7 AT > flash
|
||||
|
||||
.ram7 (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__ram7_clear__ = .;
|
||||
*(.ram7_clear)
|
||||
*(.ram7_clear.*)
|
||||
. = ALIGN(4);
|
||||
__ram7_noinit__ = .;
|
||||
*(.ram7)
|
||||
*(.ram7.*)
|
||||
. = ALIGN(4);
|
||||
__ram7_free__ = .;
|
||||
} > ram7
|
||||
|
||||
/* The default heap uses the (statically) unused part of a RAM section.*/
|
||||
.heap (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__heap_base__ = .;
|
||||
. = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM);
|
||||
__heap_end__ = .;
|
||||
} > HEAP_RAM
|
||||
}
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
# List of the ChibiOS generic K20x startup and CMSIS files.
|
||||
STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
|
||||
$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
|
||||
|
||||
STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s
|
||||
|
||||
STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/devices/K20x \
|
||||
$(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x \
|
||||
$(CHIBIOS)/os/common/ext/CMSIS/include
|
||||
|
||||
STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/compilers/GCC/ld
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
# List of the ChibiOS generic KL2x startup and CMSIS files.
|
||||
STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
|
||||
$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
|
||||
|
||||
STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s
|
||||
|
||||
STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/devices/KL2x \
|
||||
$(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/KL2x \
|
||||
$(CHIBIOS)/os/common/ext/CMSIS/include
|
||||
|
||||
STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/compilers/GCC/ld
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/MK20Dx/cmparams.h
|
||||
* @brief ARM Cortex-M4 parameters for the Kinetis MK20Dx.
|
||||
*
|
||||
* @defgroup ARMCMx_MK20Dx Kinetis MK20Dx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M4 specific parameters for the
|
||||
* Kinetis MK20Dx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL 4
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
|
||||
/**
|
||||
* @brief Number of interrupt vectors.
|
||||
* @note This number does not include the 16 system vectors and must be
|
||||
* rounded to a multiple of 8.
|
||||
*/
|
||||
#define CORTEX_NUM_VECTORS 48
|
||||
|
||||
/* The following code is not processed when the file is included from an
|
||||
asm module.*/
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
||||
/* Including the device CMSIS header. Note, we are not using the definitions
|
||||
from this header because we need this file to be usable also from
|
||||
assembler source files. We verify that the info matches instead.*/
|
||||
#include "mk20d5.h"
|
||||
|
||||
#if CORTEX_MODEL != __CORTEX_M
|
||||
#error "CMSIS __CORTEX_M mismatch"
|
||||
#endif
|
||||
|
||||
#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
|
||||
#error "CMSIS __NVIC_PRIO_BITS mismatch"
|
||||
#endif
|
||||
|
||||
#endif /* !defined(_FROM_ASM_) */
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/cmparams.h
|
||||
* @brief ARM Cortex-M0+ parameters for the Kinetis KL2x family.
|
||||
*
|
||||
* @defgroup ARMCMx_KL2x Kinetis KL2x Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M0+ specific parameters for the
|
||||
* Kinetis KL2x platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL 0
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 2
|
||||
|
||||
/**
|
||||
* @brief Number of interrupt vectors.
|
||||
* @note This number does not include the 16 system vectors and must be
|
||||
* rounded to a multiple of 8.
|
||||
*/
|
||||
#define CORTEX_NUM_VECTORS 32
|
||||
|
||||
/* The following code is not processed when the file is included from an
|
||||
asm module.*/
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
||||
/* Including the device CMSIS header. Note, we are not using the definitions
|
||||
from this header because we need this file to be usable also from
|
||||
assembler source files. We verify that the info matches instead.*/
|
||||
#include "kl25z.h"
|
||||
|
||||
#if CORTEX_MODEL != __CORTEX_M
|
||||
#error "CMSIS __CORTEX_M mismatch"
|
||||
#endif
|
||||
|
||||
#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
|
||||
#error "CMSIS __NVIC_PRIO_BITS mismatch"
|
||||
#endif
|
||||
|
||||
#endif /* !defined(_FROM_ASM_) */
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
*/
|
||||
const PALConfig pal_default_config =
|
||||
{
|
||||
.ports = {
|
||||
{
|
||||
.port = IOPORT1, // PORTA
|
||||
.pads = {
|
||||
/* PTA0*/ PAL_MODE_ALTERNATIVE_7, /* PTA1*/ PAL_MODE_UNCONNECTED, /* PTA2*/ PAL_MODE_OUTPUT_PUSHPULL,
|
||||
/* PTA3*/ PAL_MODE_ALTERNATIVE_7, /* PTA4*/ PAL_MODE_UNCONNECTED, /* PTA5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTA6*/ PAL_MODE_UNCONNECTED, /* PTA7*/ PAL_MODE_UNCONNECTED, /* PTA8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTA9*/ PAL_MODE_UNCONNECTED, /*PTA10*/ PAL_MODE_UNCONNECTED, /*PTA11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA12*/ PAL_MODE_UNCONNECTED, /*PTA13*/ PAL_MODE_UNCONNECTED, /*PTA14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA15*/ PAL_MODE_UNCONNECTED, /*PTA16*/ PAL_MODE_UNCONNECTED, /*PTA17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA18*/ PAL_MODE_INPUT_ANALOG, /*PTA19*/ PAL_MODE_INPUT_ANALOG, /*PTA20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA21*/ PAL_MODE_UNCONNECTED, /*PTA22*/ PAL_MODE_UNCONNECTED, /*PTA23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA24*/ PAL_MODE_UNCONNECTED, /*PTA25*/ PAL_MODE_UNCONNECTED, /*PTA26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA27*/ PAL_MODE_UNCONNECTED, /*PTA28*/ PAL_MODE_UNCONNECTED, /*PTA29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA30*/ PAL_MODE_UNCONNECTED, /*PTA31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT2, // PORTB
|
||||
.pads = {
|
||||
/* PTB0*/ PAL_MODE_ALTERNATIVE_2, /* PTB1*/ PAL_MODE_ALTERNATIVE_2, /* PTB2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTB3*/ PAL_MODE_UNCONNECTED, /* PTB4*/ PAL_MODE_UNCONNECTED, /* PTB5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTB6*/ PAL_MODE_UNCONNECTED, /* PTB7*/ PAL_MODE_UNCONNECTED, /* PTB8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTB9*/ PAL_MODE_UNCONNECTED, /*PTB10*/ PAL_MODE_UNCONNECTED, /*PTB11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB12*/ PAL_MODE_UNCONNECTED, /*PTB13*/ PAL_MODE_UNCONNECTED, /*PTB14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB15*/ PAL_MODE_UNCONNECTED, /*PTB16*/ PAL_MODE_ALTERNATIVE_3, /*PTB17*/ PAL_MODE_ALTERNATIVE_3,
|
||||
/*PTB18*/ PAL_MODE_UNCONNECTED, /*PTB19*/ PAL_MODE_UNCONNECTED, /*PTB20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB21*/ PAL_MODE_UNCONNECTED, /*PTB22*/ PAL_MODE_UNCONNECTED, /*PTB23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB24*/ PAL_MODE_UNCONNECTED, /*PTB25*/ PAL_MODE_UNCONNECTED, /*PTB26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB27*/ PAL_MODE_UNCONNECTED, /*PTB28*/ PAL_MODE_UNCONNECTED, /*PTB29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB30*/ PAL_MODE_UNCONNECTED, /*PTB31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT3, // PORTC
|
||||
.pads = {
|
||||
/* PTC0*/ PAL_MODE_UNCONNECTED, /* PTC1*/ PAL_MODE_UNCONNECTED, /* PTC2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTC3*/ PAL_MODE_OUTPUT_PUSHPULL, /* PTC4*/ PAL_MODE_UNCONNECTED, /* PTC5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTC6*/ PAL_MODE_UNCONNECTED, /* PTC7*/ PAL_MODE_UNCONNECTED, /* PTC8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTC9*/ PAL_MODE_UNCONNECTED, /*PTC10*/ PAL_MODE_UNCONNECTED, /*PTC11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC12*/ PAL_MODE_UNCONNECTED, /*PTC13*/ PAL_MODE_UNCONNECTED, /*PTC14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC15*/ PAL_MODE_UNCONNECTED, /*PTC16*/ PAL_MODE_UNCONNECTED, /*PTC17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC18*/ PAL_MODE_UNCONNECTED, /*PTC19*/ PAL_MODE_UNCONNECTED, /*PTC20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC21*/ PAL_MODE_UNCONNECTED, /*PTC22*/ PAL_MODE_UNCONNECTED, /*PTC23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC24*/ PAL_MODE_UNCONNECTED, /*PTC25*/ PAL_MODE_UNCONNECTED, /*PTC26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC27*/ PAL_MODE_UNCONNECTED, /*PTC28*/ PAL_MODE_UNCONNECTED, /*PTC29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC30*/ PAL_MODE_UNCONNECTED, /*PTC31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT4, // PORTD
|
||||
.pads = {
|
||||
/* PTD0*/ PAL_MODE_UNCONNECTED, /* PTD1*/ PAL_MODE_UNCONNECTED, /* PTD2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTD3*/ PAL_MODE_UNCONNECTED, /* PTD4*/ PAL_MODE_OUTPUT_PUSHPULL, /* PTD5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTD6*/ PAL_MODE_UNCONNECTED, /* PTD7*/ PAL_MODE_UNCONNECTED, /* PTD8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTD9*/ PAL_MODE_UNCONNECTED, /*PTD10*/ PAL_MODE_UNCONNECTED, /*PTD11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD12*/ PAL_MODE_UNCONNECTED, /*PTD13*/ PAL_MODE_UNCONNECTED, /*PTD14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD15*/ PAL_MODE_UNCONNECTED, /*PTD16*/ PAL_MODE_UNCONNECTED, /*PTD17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD18*/ PAL_MODE_UNCONNECTED, /*PTD19*/ PAL_MODE_UNCONNECTED, /*PTD20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD21*/ PAL_MODE_UNCONNECTED, /*PTD22*/ PAL_MODE_UNCONNECTED, /*PTD23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD24*/ PAL_MODE_UNCONNECTED, /*PTD25*/ PAL_MODE_UNCONNECTED, /*PTD26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD27*/ PAL_MODE_UNCONNECTED, /*PTD28*/ PAL_MODE_UNCONNECTED, /*PTD29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD30*/ PAL_MODE_UNCONNECTED, /*PTD31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT5, // PORTE
|
||||
.pads = {
|
||||
/* PTE0*/ PAL_MODE_UNCONNECTED, /* PTE1*/ PAL_MODE_UNCONNECTED, /* PTE2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTE3*/ PAL_MODE_UNCONNECTED, /* PTE4*/ PAL_MODE_UNCONNECTED, /* PTE5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTE6*/ PAL_MODE_UNCONNECTED, /* PTE7*/ PAL_MODE_UNCONNECTED, /* PTE8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTE9*/ PAL_MODE_UNCONNECTED, /*PTE10*/ PAL_MODE_UNCONNECTED, /*PTE11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE12*/ PAL_MODE_UNCONNECTED, /*PTE13*/ PAL_MODE_UNCONNECTED, /*PTE14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE15*/ PAL_MODE_UNCONNECTED, /*PTE16*/ PAL_MODE_UNCONNECTED, /*PTE17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE18*/ PAL_MODE_UNCONNECTED, /*PTE19*/ PAL_MODE_UNCONNECTED, /*PTE20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE21*/ PAL_MODE_UNCONNECTED, /*PTE22*/ PAL_MODE_UNCONNECTED, /*PTE23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE24*/ PAL_MODE_UNCONNECTED, /*PTE25*/ PAL_MODE_UNCONNECTED, /*PTE26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE27*/ PAL_MODE_UNCONNECTED, /*PTE28*/ PAL_MODE_UNCONNECTED, /*PTE29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE30*/ PAL_MODE_UNCONNECTED, /*PTE31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
|
||||
mk20d50_clock_init();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Board-specific initialization code.
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {
|
||||
}
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
/*
|
||||
* Setup for Freescale Freedom K20D50M board.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board identifier.
|
||||
*/
|
||||
#define BOARD_FREESCALE_FREEDOM_K20D50M
|
||||
#define BOARD_NAME "Freescale Freedom K20D50M"
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void boardInit(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
# List of all the board related files.
|
||||
BOARDSRC = ${CHIBIOS}/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = ${CHIBIOS}/os/hal/boards/FREESCALE_FREEDOM_K20D50M
|
||||
|
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
*/
|
||||
const PALConfig pal_default_config =
|
||||
{
|
||||
.ports = {
|
||||
{
|
||||
.port = IOPORT1, // PORTA
|
||||
.pads = {
|
||||
/* PTA0*/ PAL_MODE_ALTERNATIVE_7, /* PTA1*/ PAL_MODE_ALTERNATIVE_2, /* PTA2*/ PAL_MODE_ALTERNATIVE_2,
|
||||
/* PTA3*/ PAL_MODE_ALTERNATIVE_7, /* PTA4*/ PAL_MODE_INPUT_ANALOG, /* PTA5*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTA6*/ PAL_MODE_UNCONNECTED, /* PTA7*/ PAL_MODE_UNCONNECTED, /* PTA8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTA9*/ PAL_MODE_UNCONNECTED, /*PTA10*/ PAL_MODE_UNCONNECTED, /*PTA11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA12*/ PAL_MODE_INPUT_ANALOG, /*PTA13*/ PAL_MODE_INPUT_ANALOG, /*PTA14*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTA15*/ PAL_MODE_INPUT_ANALOG, /*PTA16*/ PAL_MODE_INPUT_ANALOG, /*PTA17*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTA18*/ PAL_MODE_INPUT_ANALOG, /*PTA19*/ PAL_MODE_INPUT_ANALOG, /*PTA20*/ PAL_MODE_ALTERNATIVE_7,
|
||||
/*PTA21*/ PAL_MODE_UNCONNECTED, /*PTA22*/ PAL_MODE_UNCONNECTED, /*PTA23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA24*/ PAL_MODE_UNCONNECTED, /*PTA25*/ PAL_MODE_UNCONNECTED, /*PTA26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA27*/ PAL_MODE_UNCONNECTED, /*PTA28*/ PAL_MODE_UNCONNECTED, /*PTA29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA30*/ PAL_MODE_UNCONNECTED, /*PTA31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT2, // PORTB
|
||||
.pads = {
|
||||
/* PTB0*/ PAL_MODE_INPUT_ANALOG, /* PTB1*/ PAL_MODE_INPUT_ANALOG, /* PTB2*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTB3*/ PAL_MODE_INPUT_ANALOG, /* PTB4*/ PAL_MODE_UNCONNECTED, /* PTB5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTB6*/ PAL_MODE_UNCONNECTED, /* PTB7*/ PAL_MODE_UNCONNECTED, /* PTB8*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTB9*/ PAL_MODE_INPUT_ANALOG, /*PTB10*/ PAL_MODE_INPUT_ANALOG, /*PTB11*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTB12*/ PAL_MODE_UNCONNECTED, /*PTB13*/ PAL_MODE_UNCONNECTED, /*PTB14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB15*/ PAL_MODE_UNCONNECTED, /*PTB16*/ PAL_MODE_INPUT_ANALOG, /*PTB17*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTB18*/ PAL_MODE_OUTPUT_PUSHPULL, /*PTB19*/ PAL_MODE_OUTPUT_PUSHPULL, /*PTB20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB21*/ PAL_MODE_UNCONNECTED, /*PTB22*/ PAL_MODE_UNCONNECTED, /*PTB23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB24*/ PAL_MODE_UNCONNECTED, /*PTB25*/ PAL_MODE_UNCONNECTED, /*PTB26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB27*/ PAL_MODE_UNCONNECTED, /*PTB28*/ PAL_MODE_UNCONNECTED, /*PTB29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB30*/ PAL_MODE_UNCONNECTED, /*PTB31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT3, // PORTC
|
||||
.pads = {
|
||||
/* PTC0*/ PAL_MODE_INPUT_ANALOG, /* PTC1*/ PAL_MODE_INPUT_ANALOG, /* PTC2*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTC3*/ PAL_MODE_INPUT_ANALOG, /* PTC4*/ PAL_MODE_INPUT_ANALOG, /* PTC5*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTC6*/ PAL_MODE_INPUT_ANALOG, /* PTC7*/ PAL_MODE_INPUT_ANALOG, /* PTC8*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTC9*/ PAL_MODE_INPUT_ANALOG, /*PTC10*/ PAL_MODE_INPUT_ANALOG, /*PTC11*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTC12*/ PAL_MODE_INPUT_ANALOG, /*PTC13*/ PAL_MODE_INPUT_ANALOG, /*PTC14*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTC15*/ PAL_MODE_INPUT_ANALOG, /*PTC16*/ PAL_MODE_INPUT_ANALOG, /*PTC17*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTC18*/ PAL_MODE_UNCONNECTED, /*PTC19*/ PAL_MODE_UNCONNECTED, /*PTC20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC21*/ PAL_MODE_UNCONNECTED, /*PTC22*/ PAL_MODE_UNCONNECTED, /*PTC23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC24*/ PAL_MODE_UNCONNECTED, /*PTC25*/ PAL_MODE_UNCONNECTED, /*PTC26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC27*/ PAL_MODE_UNCONNECTED, /*PTC28*/ PAL_MODE_UNCONNECTED, /*PTC29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC30*/ PAL_MODE_UNCONNECTED, /*PTC31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT4, // PORTD
|
||||
.pads = {
|
||||
/* PTD0*/ PAL_MODE_INPUT_ANALOG, /* PTD1*/ PAL_MODE_OUTPUT_PUSHPULL, /* PTD2*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTD3*/ PAL_MODE_INPUT_ANALOG, /* PTD4*/ PAL_MODE_INPUT_ANALOG, /* PTD5*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTD6*/ PAL_MODE_INPUT_ANALOG, /* PTD7*/ PAL_MODE_INPUT_ANALOG, /* PTD8*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTD9*/ PAL_MODE_UNCONNECTED, /*PTD10*/ PAL_MODE_UNCONNECTED, /*PTD11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD12*/ PAL_MODE_UNCONNECTED, /*PTD13*/ PAL_MODE_UNCONNECTED, /*PTD14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD15*/ PAL_MODE_UNCONNECTED, /*PTD16*/ PAL_MODE_UNCONNECTED, /*PTD17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD18*/ PAL_MODE_UNCONNECTED, /*PTD19*/ PAL_MODE_UNCONNECTED, /*PTD20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD21*/ PAL_MODE_UNCONNECTED, /*PTD22*/ PAL_MODE_UNCONNECTED, /*PTD23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD24*/ PAL_MODE_UNCONNECTED, /*PTD25*/ PAL_MODE_UNCONNECTED, /*PTD26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD27*/ PAL_MODE_UNCONNECTED, /*PTD28*/ PAL_MODE_UNCONNECTED, /*PTD29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD30*/ PAL_MODE_UNCONNECTED, /*PTD31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT5, // PORTE
|
||||
.pads = {
|
||||
/* PTE0*/ PAL_MODE_INPUT_ANALOG, /* PTE1*/ PAL_MODE_INPUT_ANALOG, /* PTE2*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTE3*/ PAL_MODE_INPUT_ANALOG, /* PTE4*/ PAL_MODE_INPUT_ANALOG, /* PTE5*/ PAL_MODE_INPUT_ANALOG,
|
||||
/* PTE6*/ PAL_MODE_UNCONNECTED, /* PTE7*/ PAL_MODE_UNCONNECTED, /* PTE8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTE9*/ PAL_MODE_UNCONNECTED, /*PTE10*/ PAL_MODE_UNCONNECTED, /*PTE11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE12*/ PAL_MODE_UNCONNECTED, /*PTE13*/ PAL_MODE_UNCONNECTED, /*PTE14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE15*/ PAL_MODE_UNCONNECTED, /*PTE16*/ PAL_MODE_UNCONNECTED, /*PTE17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE18*/ PAL_MODE_UNCONNECTED, /*PTE19*/ PAL_MODE_UNCONNECTED, /*PTE20*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTE21*/ PAL_MODE_INPUT_ANALOG, /*PTE22*/ PAL_MODE_INPUT_ANALOG, /*PTE23*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTE24*/ PAL_MODE_ALTERNATIVE_5, /*PTE25*/ PAL_MODE_ALTERNATIVE_5, /*PTE26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE27*/ PAL_MODE_UNCONNECTED, /*PTE28*/ PAL_MODE_UNCONNECTED, /*PTE29*/ PAL_MODE_INPUT_ANALOG,
|
||||
/*PTE30*/ PAL_MODE_INPUT_ANALOG, /*PTE31*/ PAL_MODE_INPUT_ANALOG,
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
|
||||
kl2x_clock_init();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Board-specific initialization code.
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {
|
||||
}
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
/*
|
||||
* Setup for Freescale Freedom KL25Z board.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board identifier.
|
||||
*/
|
||||
#define BOARD_FREESCALE_FREEDOM_KL25Z
|
||||
#define BOARD_NAME "Freescale Freedom KL25Z"
|
||||
|
||||
/* External 8 MHz crystal with PLL for 48 MHz core/system clock. */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 48000000UL
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void boardInit(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
# List of all the board related files.
|
||||
BOARDSRC = ${CHIBIOS}/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = ${CHIBIOS}/os/hal/boards/FREESCALE_FREEDOM_KL25Z
|
||||
|
|
@ -0,0 +1,126 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
*/
|
||||
const PALConfig pal_default_config =
|
||||
{
|
||||
.ports = {
|
||||
{
|
||||
.port = IOPORT1, // PORTA
|
||||
.pads = {
|
||||
/* PTA0*/ PAL_MODE_ALTERNATIVE_7, /* PTA1*/ PAL_MODE_UNCONNECTED, /* PTA2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTA3*/ PAL_MODE_ALTERNATIVE_7, /* PTA4*/ PAL_MODE_UNCONNECTED, /* PTA5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTA6*/ PAL_MODE_UNCONNECTED, /* PTA7*/ PAL_MODE_UNCONNECTED, /* PTA8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTA9*/ PAL_MODE_UNCONNECTED, /*PTA10*/ PAL_MODE_UNCONNECTED, /*PTA11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA12*/ PAL_MODE_UNCONNECTED, /*PTA13*/ PAL_MODE_UNCONNECTED, /*PTA14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA15*/ PAL_MODE_UNCONNECTED, /*PTA16*/ PAL_MODE_UNCONNECTED, /*PTA17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA18*/ PAL_MODE_UNCONNECTED, /*PTA19*/ PAL_MODE_UNCONNECTED, /*PTA20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA21*/ PAL_MODE_UNCONNECTED, /*PTA22*/ PAL_MODE_UNCONNECTED, /*PTA23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA24*/ PAL_MODE_UNCONNECTED, /*PTA25*/ PAL_MODE_UNCONNECTED, /*PTA26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA27*/ PAL_MODE_UNCONNECTED, /*PTA28*/ PAL_MODE_UNCONNECTED, /*PTA29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTA30*/ PAL_MODE_UNCONNECTED, /*PTA31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT2, // PORTB
|
||||
.pads = {
|
||||
/* PTB0*/ PAL_MODE_UNCONNECTED, /* PTB1*/ PAL_MODE_UNCONNECTED, /* PTB2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTB3*/ PAL_MODE_UNCONNECTED, /* PTB4*/ PAL_MODE_UNCONNECTED, /* PTB5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTB6*/ PAL_MODE_UNCONNECTED, /* PTB7*/ PAL_MODE_UNCONNECTED, /* PTB8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTB9*/ PAL_MODE_UNCONNECTED, /*PTB10*/ PAL_MODE_UNCONNECTED, /*PTB11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB12*/ PAL_MODE_UNCONNECTED, /*PTB13*/ PAL_MODE_UNCONNECTED, /*PTB14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB15*/ PAL_MODE_UNCONNECTED, /*PTB16*/ PAL_MODE_OUTPUT_PUSHPULL, /*PTB17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB18*/ PAL_MODE_UNCONNECTED, /*PTB19*/ PAL_MODE_UNCONNECTED, /*PTB20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB21*/ PAL_MODE_UNCONNECTED, /*PTB22*/ PAL_MODE_UNCONNECTED, /*PTB23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB24*/ PAL_MODE_UNCONNECTED, /*PTB25*/ PAL_MODE_UNCONNECTED, /*PTB26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB27*/ PAL_MODE_UNCONNECTED, /*PTB28*/ PAL_MODE_UNCONNECTED, /*PTB29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTB30*/ PAL_MODE_UNCONNECTED, /*PTB31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT3, // PORTC
|
||||
.pads = {
|
||||
/* PTC0*/ PAL_MODE_UNCONNECTED, /* PTC1*/ PAL_MODE_UNCONNECTED, /* PTC2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTC3*/ PAL_MODE_UNCONNECTED, /* PTC4*/ PAL_MODE_UNCONNECTED, /* PTC5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTC6*/ PAL_MODE_UNCONNECTED, /* PTC7*/ PAL_MODE_UNCONNECTED, /* PTC8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTC9*/ PAL_MODE_UNCONNECTED, /*PTC10*/ PAL_MODE_UNCONNECTED, /*PTC11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC12*/ PAL_MODE_UNCONNECTED, /*PTC13*/ PAL_MODE_UNCONNECTED, /*PTC14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC15*/ PAL_MODE_UNCONNECTED, /*PTC16*/ PAL_MODE_UNCONNECTED, /*PTC17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC18*/ PAL_MODE_UNCONNECTED, /*PTC19*/ PAL_MODE_UNCONNECTED, /*PTC20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC21*/ PAL_MODE_UNCONNECTED, /*PTC22*/ PAL_MODE_UNCONNECTED, /*PTC23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC24*/ PAL_MODE_UNCONNECTED, /*PTC25*/ PAL_MODE_UNCONNECTED, /*PTC26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC27*/ PAL_MODE_UNCONNECTED, /*PTC28*/ PAL_MODE_UNCONNECTED, /*PTC29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTC30*/ PAL_MODE_UNCONNECTED, /*PTC31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT4, // PORTD
|
||||
.pads = {
|
||||
/* PTD0*/ PAL_MODE_UNCONNECTED, /* PTD1*/ PAL_MODE_UNCONNECTED, /* PTD2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTD3*/ PAL_MODE_UNCONNECTED, /* PTD4*/ PAL_MODE_UNCONNECTED, /* PTD5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTD6*/ PAL_MODE_UNCONNECTED, /* PTD7*/ PAL_MODE_UNCONNECTED, /* PTD8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTD9*/ PAL_MODE_UNCONNECTED, /*PTD10*/ PAL_MODE_UNCONNECTED, /*PTD11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD12*/ PAL_MODE_UNCONNECTED, /*PTD13*/ PAL_MODE_UNCONNECTED, /*PTD14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD15*/ PAL_MODE_UNCONNECTED, /*PTD16*/ PAL_MODE_UNCONNECTED, /*PTD17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD18*/ PAL_MODE_UNCONNECTED, /*PTD19*/ PAL_MODE_UNCONNECTED, /*PTD20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD21*/ PAL_MODE_UNCONNECTED, /*PTD22*/ PAL_MODE_UNCONNECTED, /*PTD23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD24*/ PAL_MODE_UNCONNECTED, /*PTD25*/ PAL_MODE_UNCONNECTED, /*PTD26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD27*/ PAL_MODE_UNCONNECTED, /*PTD28*/ PAL_MODE_UNCONNECTED, /*PTD29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTD30*/ PAL_MODE_UNCONNECTED, /*PTD31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
.port = IOPORT5, // PORTE
|
||||
.pads = {
|
||||
/* PTE0*/ PAL_MODE_UNCONNECTED, /* PTE1*/ PAL_MODE_UNCONNECTED, /* PTE2*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTE3*/ PAL_MODE_UNCONNECTED, /* PTE4*/ PAL_MODE_UNCONNECTED, /* PTE5*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTE6*/ PAL_MODE_UNCONNECTED, /* PTE7*/ PAL_MODE_UNCONNECTED, /* PTE8*/ PAL_MODE_UNCONNECTED,
|
||||
/* PTE9*/ PAL_MODE_UNCONNECTED, /*PTE10*/ PAL_MODE_UNCONNECTED, /*PTE11*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE12*/ PAL_MODE_UNCONNECTED, /*PTE13*/ PAL_MODE_UNCONNECTED, /*PTE14*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE15*/ PAL_MODE_UNCONNECTED, /*PTE16*/ PAL_MODE_UNCONNECTED, /*PTE17*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE18*/ PAL_MODE_UNCONNECTED, /*PTE19*/ PAL_MODE_UNCONNECTED, /*PTE20*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE21*/ PAL_MODE_UNCONNECTED, /*PTE22*/ PAL_MODE_UNCONNECTED, /*PTE23*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE24*/ PAL_MODE_UNCONNECTED, /*PTE25*/ PAL_MODE_UNCONNECTED, /*PTE26*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE27*/ PAL_MODE_UNCONNECTED, /*PTE28*/ PAL_MODE_UNCONNECTED, /*PTE29*/ PAL_MODE_UNCONNECTED,
|
||||
/*PTE30*/ PAL_MODE_UNCONNECTED, /*PTE31*/ PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
mk20d50_clock_init();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Board-specific initialization code.
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {
|
||||
}
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
/*
|
||||
* Setup for MCHCL K20 board with MX20DX128 processor.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board identifier.
|
||||
*/
|
||||
#define BOARD_MCHCK_K20_MX20DX128
|
||||
#define BOARD_NAME "MCHCK K20 MX20DX128"
|
||||
|
||||
#define GPIOB_LED 16
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void boardInit(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
# List of all the board related files.
|
||||
BOARDSRC = ${CHIBIOS}/os/hal/boards/MCHCK_K20/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = ${CHIBIOS}/os/hal/boards/MCHCK_K20
|
||||
|
|
@ -0,0 +1,182 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
*/
|
||||
const PALConfig pal_default_config =
|
||||
{
|
||||
.ports = {
|
||||
{
|
||||
/*
|
||||
* PORTA setup.
|
||||
*
|
||||
* PTA4 - PIN33
|
||||
* PTA5 - PIN24
|
||||
* PTA12 - PIN3
|
||||
* PTA13 - PIN4
|
||||
*/
|
||||
.port = IOPORT1,
|
||||
.pads = {
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
/*
|
||||
* PORTB setup.
|
||||
*
|
||||
* PTB0 - PIN16
|
||||
* PTB1 - PIN17
|
||||
* PTB2 - PIN19
|
||||
* PTB3 - PIN18
|
||||
* PTB16 - PIN0 - UART0_TX
|
||||
* PTB17 - PIN1 - UART0_RX
|
||||
* PTB18 - PIN32
|
||||
* PTB19 - PIN25
|
||||
*/
|
||||
.port = IOPORT2,
|
||||
.pads = {
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_ALTERNATIVE_3, PAL_MODE_ALTERNATIVE_3,
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
/*
|
||||
* PORTC setup.
|
||||
*
|
||||
* PTC0 - PIN15
|
||||
* PTC1 - PIN22
|
||||
* PTC2 - PIN23
|
||||
* PTC3 - PIN9
|
||||
* PTC4 - PIN10
|
||||
* PTC5 - PIN13
|
||||
* PTC6 - PIN11
|
||||
* PTC7 - PIN12
|
||||
* PTC8 - PIN28
|
||||
* PTC9 - PIN27
|
||||
* PTC10 - PIN29
|
||||
* PTC11 - PIN30
|
||||
*/
|
||||
.port = IOPORT3,
|
||||
.pads = {
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
/*
|
||||
* PORTD setup.
|
||||
*
|
||||
* PTD0 - PIN2
|
||||
* PTD1 - PIN14
|
||||
* PTD2 - PIN7
|
||||
* PTD3 - PIN8
|
||||
* PTD4 - PIN6
|
||||
* PTD5 - PIN20
|
||||
* PTD6 - PIN21
|
||||
* PTD7 - PIN5
|
||||
*/
|
||||
.port = IOPORT4,
|
||||
.pads = {
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
{
|
||||
/*
|
||||
* PORTE setup.
|
||||
*
|
||||
* PTE0 - PIN31
|
||||
* PTE1 - PIN26
|
||||
*/
|
||||
.port = IOPORT5,
|
||||
.pads = {
|
||||
PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
|
||||
},
|
||||
},
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
|
||||
mk20d50_clock_init();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Board-specific initialization code.
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {
|
||||
}
|
||||
|
|
@ -0,0 +1,213 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
/*
|
||||
* Setup for the PJRC Teensy 3.0 board.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board identifier.
|
||||
*/
|
||||
#define BOARD_PJRC_TEENSY_3
|
||||
#define BOARD_NAME "PJRC Teensy 3.0"
|
||||
|
||||
/* External 16 MHz crystal with PLL for 48 MHz core/system clock. */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 48000000UL
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
|
||||
#define KINETIS_XTAL_FREQUENCY 16000000UL
|
||||
|
||||
/*
|
||||
* IO pins assignments.
|
||||
*/
|
||||
#define PORTA_PIN0 0
|
||||
#define PORTA_PIN1 1
|
||||
#define PORTA_PIN2 2
|
||||
#define PORTA_PIN3 3
|
||||
#define PORTA_TEENSY_PIN33 4
|
||||
#define PORTA_TEENSY_PIN24 5
|
||||
#define PORTA_PIN6 6
|
||||
#define PORTA_PIN7 7
|
||||
#define PORTA_PIN8 8
|
||||
#define PORTA_PIN9 9
|
||||
#define PORTA_PIN10 10
|
||||
#define PORTA_PIN11 11
|
||||
#define PORTA_TEENSY_PIN3 12
|
||||
#define PORTA_TEENSY_PIN4 13
|
||||
#define PORTA_PIN14 14
|
||||
#define PORTA_PIN15 15
|
||||
#define PORTA_PIN16 16
|
||||
#define PORTA_PIN17 17
|
||||
#define PORTA_PIN18 18
|
||||
#define PORTA_PIN19 19
|
||||
#define PORTA_PIN20 20
|
||||
#define PORTA_PIN21 21
|
||||
#define PORTA_PIN22 22
|
||||
#define PORTA_PIN23 23
|
||||
#define PORTA_PIN24 24
|
||||
#define PORTA_PIN25 25
|
||||
#define PORTA_PIN26 26
|
||||
#define PORTA_PIN27 27
|
||||
#define PORTA_PIN28 28
|
||||
#define PORTA_PIN29 29
|
||||
#define PORTA_PIN30 30
|
||||
#define PORTA_PIN31 31
|
||||
|
||||
#define PORTB_TEENSY_PIN16 0
|
||||
#define PORTB_TEENSY_PIN17 1
|
||||
#define PORTB_TEENSY_PIN19 2
|
||||
#define PORTB_TEENSY_PIN18 3
|
||||
#define PORTB_PIN4 4
|
||||
#define PORTB_PIN5 5
|
||||
#define PORTB_PIN6 6
|
||||
#define PORTB_PIN7 7
|
||||
#define PORTB_PIN8 8
|
||||
#define PORTB_PIN9 9
|
||||
#define PORTB_PIN10 10
|
||||
#define PORTB_PIN11 11
|
||||
#define PORTB_PIN12 12
|
||||
#define PORTB_PIN13 13
|
||||
#define PORTB_PIN14 14
|
||||
#define PORTB_PIN15 15
|
||||
#define PORTB_TEENSY_PIN0 16
|
||||
#define PORTB_TEENSY_PIN1 17
|
||||
#define PORTB_TEENSY_PIN32 18
|
||||
#define PORTB_TEENSY_PIN25 19
|
||||
#define PORTB_PIN20 20
|
||||
#define PORTB_PIN21 21
|
||||
#define PORTB_PIN22 22
|
||||
#define PORTB_PIN23 23
|
||||
#define PORTB_PIN24 24
|
||||
#define PORTB_PIN25 25
|
||||
#define PORTB_PIN26 26
|
||||
#define PORTB_PIN27 27
|
||||
#define PORTB_PIN28 28
|
||||
#define PORTB_PIN29 29
|
||||
#define PORTB_PIN30 30
|
||||
#define PORTB_PIN31 31
|
||||
|
||||
#define PORTC_TEENSY_PIN15 0
|
||||
#define PORTC_TEENSY_PIN22 1
|
||||
#define PORTC_TEENSY_PIN23 2
|
||||
#define PORTC_TEENSY_PIN9 3
|
||||
#define PORTC_TEENSY_PIN10 4
|
||||
#define PORTC_TEENSY_PIN13 5
|
||||
#define PORTC_TEENSY_PIN11 6
|
||||
#define PORTC_TEENSY_PIN12 7
|
||||
#define PORTC_TEENSY_PIN28 8
|
||||
#define PORTC_TEENSY_PIN27 9
|
||||
#define PORTC_TEENSY_PIN29 10
|
||||
#define PORTC_TEENSY_PIN30 11
|
||||
#define PORTC_PIN12 12
|
||||
#define PORTC_PIN13 13
|
||||
#define PORTC_PIN14 14
|
||||
#define PORTC_PIN15 15
|
||||
#define PORTC_PIN16 16
|
||||
#define PORTC_PIN17 17
|
||||
#define PORTC_PIN18 18
|
||||
#define PORTC_PIN19 19
|
||||
#define PORTC_PIN20 20
|
||||
#define PORTC_PIN21 21
|
||||
#define PORTC_PIN22 22
|
||||
#define PORTC_PIN23 23
|
||||
#define PORTC_PIN24 24
|
||||
#define PORTC_PIN25 25
|
||||
#define PORTC_PIN26 26
|
||||
#define PORTC_PIN27 27
|
||||
#define PORTC_PIN28 28
|
||||
#define PORTC_PIN29 29
|
||||
#define PORTC_PIN30 30
|
||||
#define PORTC_PIN31 31
|
||||
|
||||
#define PORTD_TEENSY_PIN2 0
|
||||
#define PORTD_TEENSY_PIN14 1
|
||||
#define PORTD_TEENSY_PIN7 2
|
||||
#define PORTD_TEENSY_PIN8 3
|
||||
#define PORTD_TEENSY_PIN6 4
|
||||
#define PORTD_TEENSY_PIN20 5
|
||||
#define PORTD_TEENSY_PIN21 6
|
||||
#define PORTD_TEENSY_PIN5 7
|
||||
#define PORTD_PIN8 8
|
||||
#define PORTD_PIN9 9
|
||||
#define PORTD_PIN10 10
|
||||
#define PORTD_PIN11 11
|
||||
#define PORTD_PIN12 12
|
||||
#define PORTD_PIN13 13
|
||||
#define PORTD_PIN14 14
|
||||
#define PORTD_PIN15 15
|
||||
#define PORTD_PIN16 16
|
||||
#define PORTD_PIN17 17
|
||||
#define PORTD_PIN18 18
|
||||
#define PORTD_PIN19 19
|
||||
#define PORTD_PIN20 20
|
||||
#define PORTD_PIN21 21
|
||||
#define PORTD_PIN22 22
|
||||
#define PORTD_PIN23 23
|
||||
#define PORTD_PIN24 24
|
||||
#define PORTD_PIN25 25
|
||||
#define PORTD_PIN26 26
|
||||
#define PORTD_PIN27 27
|
||||
#define PORTD_PIN28 28
|
||||
#define PORTD_PIN29 29
|
||||
#define PORTD_PIN30 30
|
||||
#define PORTD_PIN31 31
|
||||
|
||||
#define PORTE_TEENSY_PIN31 0
|
||||
#define PORTE_TEENSY_PIN26 1
|
||||
#define PORTE_PIN2 2
|
||||
#define PORTE_PIN3 3
|
||||
#define PORTE_PIN4 4
|
||||
#define PORTE_PIN5 5
|
||||
#define PORTE_PIN6 6
|
||||
#define PORTE_PIN7 7
|
||||
#define PORTE_PIN8 8
|
||||
#define PORTE_PIN9 9
|
||||
#define PORTE_PIN10 10
|
||||
#define PORTE_PIN11 11
|
||||
#define PORTE_PIN12 12
|
||||
#define PORTE_PIN13 13
|
||||
#define PORTE_PIN14 14
|
||||
#define PORTE_PIN15 15
|
||||
#define PORTE_PIN16 16
|
||||
#define PORTE_PIN17 17
|
||||
#define PORTE_PIN18 18
|
||||
#define PORTE_PIN19 19
|
||||
#define PORTE_PIN20 20
|
||||
#define PORTE_PIN21 21
|
||||
#define PORTE_PIN22 22
|
||||
#define PORTE_PIN23 23
|
||||
#define PORTE_PIN24 24
|
||||
#define PORTE_PIN25 25
|
||||
#define PORTE_PIN26 26
|
||||
#define PORTE_PIN27 27
|
||||
#define PORTE_PIN28 28
|
||||
#define PORTE_PIN29 29
|
||||
#define PORTE_PIN30 30
|
||||
#define PORTE_PIN31 31
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void boardInit(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
# List of all the board related files.
|
||||
BOARDSRC = ${CHIBIOS}/os/hal/boards/PJRC_TEENSY_3/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = ${CHIBIOS}/os/hal/boards/PJRC_TEENSY_3
|
||||
|
|
@ -0,0 +1,372 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/gpt_lld.c
|
||||
* @brief KINETIS GPT subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup GPT
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_GPT || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define KINETIS_PIT0_HANDLER VectorB8
|
||||
#define KINETIS_PIT1_HANDLER VectorBC
|
||||
#define KINETIS_PIT2_HANDLER VectorC0
|
||||
#define KINETIS_PIT3_HANDLER VectorC4
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief GPTD1 driver identifier.
|
||||
* @note The driver GPTD1 allocates the complex timer PIT0 when enabled.
|
||||
*/
|
||||
#if KINETIS_GPT_USE_PIT0 || defined(__DOXYGEN__)
|
||||
GPTDriver GPTD1;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD2 driver identifier.
|
||||
* @note The driver GPTD2 allocates the timer PIT1 when enabled.
|
||||
*/
|
||||
#if KINETIS_GPT_USE_PIT1 || defined(__DOXYGEN__)
|
||||
GPTDriver GPTD2;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD3 driver identifier.
|
||||
* @note The driver GPTD3 allocates the timer PIT2 when enabled.
|
||||
*/
|
||||
#if KINETIS_GPT_USE_PIT2 || defined(__DOXYGEN__)
|
||||
GPTDriver GPTD3;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD4 driver identifier.
|
||||
* @note The driver GPTD4 allocates the timer PIT3 when enabled.
|
||||
*/
|
||||
#if KINETIS_GPT_USE_PIT3 || defined(__DOXYGEN__)
|
||||
GPTDriver GPTD4;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Shared IRQ handler.
|
||||
*
|
||||
* @param[in] gptp pointer to a @p GPTDriver object
|
||||
*/
|
||||
static void gpt_lld_serve_interrupt(GPTDriver *gptp) {
|
||||
|
||||
/* Clear the interrupt */
|
||||
gptp->channel->TFLG |= PIT_TCTRL_TIE;
|
||||
|
||||
if (gptp->state == GPT_ONESHOT) {
|
||||
gptp->state = GPT_READY; /* Back in GPT_READY state. */
|
||||
gpt_lld_stop_timer(gptp); /* Timer automatically stopped. */
|
||||
}
|
||||
gptp->config->callback(gptp);
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_GPT_USE_PIT0
|
||||
#if !defined(KINETIS_PIT0_HANDLER)
|
||||
#error "KINETIS_PIT0_HANDLER not defined"
|
||||
#endif
|
||||
/**
|
||||
* @brief PIT1 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(KINETIS_PIT0_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
gpt_lld_serve_interrupt(&GPTD1);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_GPT_USE_PIT0 */
|
||||
|
||||
#if KINETIS_GPT_USE_PIT1
|
||||
#if !defined(KINETIS_PIT1_HANDLER)
|
||||
#error "KINETIS_PIT1_HANDLER not defined"
|
||||
#endif
|
||||
/**
|
||||
* @brief PIT1 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(KINETIS_PIT1_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
gpt_lld_serve_interrupt(&GPTD2);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_GPT_USE_PIT1 */
|
||||
|
||||
#if KINETIS_GPT_USE_PIT2
|
||||
#if !defined(KINETIS_PIT2_HANDLER)
|
||||
#error "KINETIS_PIT2_HANDLER not defined"
|
||||
#endif
|
||||
/**
|
||||
* @brief PIT2 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(KINETIS_PIT2_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
gpt_lld_serve_interrupt(&GPTD3);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_GPT_USE_PIT2 */
|
||||
|
||||
#if KINETIS_GPT_USE_PIT3
|
||||
#if !defined(KINETIS_PIT3_HANDLER)
|
||||
#error "KINETIS_PIT3_HANDLER not defined"
|
||||
#endif
|
||||
/**
|
||||
* @brief PIT3 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(KINETIS_PIT3_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
gpt_lld_serve_interrupt(&GPTD4);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_GPT_USE_PIT3 */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level GPT driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void gpt_lld_init(void) {
|
||||
|
||||
#if KINETIS_GPT_USE_PIT0
|
||||
/* Driver initialization.*/
|
||||
GPTD1.channel = &PIT->CHANNEL[0];
|
||||
gptObjectInit(&GPTD1);
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT1
|
||||
/* Driver initialization.*/
|
||||
GPTD2.channel = &PIT->CHANNEL[1];
|
||||
gptObjectInit(&GPTD2);
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT2
|
||||
/* Driver initialization.*/
|
||||
GPTD3.channel = &PIT->CHANNEL[2];
|
||||
gptObjectInit(&GPTD3);
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT3
|
||||
/* Driver initialization.*/
|
||||
GPTD4.channel = &PIT->CHANNEL[3];
|
||||
gptObjectInit(&GPTD4);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the GPT peripheral.
|
||||
*
|
||||
* @param[in] gptp pointer to the @p GPTDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void gpt_lld_start(GPTDriver *gptp) {
|
||||
uint16_t psc;
|
||||
|
||||
if (gptp->state == GPT_STOP) {
|
||||
/* Clock activation.*/
|
||||
SIM->SCGC6 |= SIM_SCGC6_PIT;
|
||||
gptp->clock = KINETIS_SYSCLK_FREQUENCY;
|
||||
|
||||
#if KINETIS_GPT_USE_PIT0
|
||||
if (&GPTD1 == gptp) {
|
||||
nvicEnableVector(PITChannel0_IRQn, KINETIS_GPT_PIT0_IRQ_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
#if KINETIS_GPT_USE_PIT1
|
||||
if (&GPTD2 == gptp) {
|
||||
nvicEnableVector(PITChannel1_IRQn, KINETIS_GPT_PIT1_IRQ_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
#if KINETIS_GPT_USE_PIT2
|
||||
if (&GPTD3 == gptp) {
|
||||
nvicEnableVector(PITChannel2_IRQn, KINETIS_GPT_PIT2_IRQ_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
#if KINETIS_GPT_USE_PIT3
|
||||
if (&GPTD4 == gptp) {
|
||||
nvicEnableVector(PITChannel3_IRQn, KINETIS_GPT_PIT3_IRQ_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
/* Prescaler value calculation.*/
|
||||
psc = (uint16_t)((gptp->clock / gptp->config->frequency) - 1);
|
||||
osalDbgAssert(((uint32_t)(psc + 1) * gptp->config->frequency) == gptp->clock,
|
||||
"invalid frequency");
|
||||
|
||||
/* Enable the PIT */
|
||||
PIT->MCR = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the GPT peripheral.
|
||||
*
|
||||
* @param[in] gptp pointer to the @p GPTDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void gpt_lld_stop(GPTDriver *gptp) {
|
||||
|
||||
if (gptp->state == GPT_READY) {
|
||||
SIM->SCGC6 &= ~SIM_SCGC6_PIT;
|
||||
|
||||
/* Disable the channel */
|
||||
gptp->channel->TCTRL = 0;
|
||||
|
||||
/* Clear pending interrupts */
|
||||
gptp->channel->TFLG |= PIT_TFLG_TIF;
|
||||
|
||||
#if KINETIS_GPT_USE_PIT0
|
||||
if (&GPTD1 == gptp) {
|
||||
nvicDisableVector(PITChannel0_IRQn);
|
||||
}
|
||||
#endif
|
||||
#if KINETIS_GPT_USE_PIT1
|
||||
if (&GPTD2 == gptp) {
|
||||
nvicDisableVector(PITChannel1_IRQn);
|
||||
}
|
||||
#endif
|
||||
#if KINETIS_GPT_USE_PIT2
|
||||
if (&GPTD3 == gptp) {
|
||||
nvicDisableVector(PITChannel2_IRQn);
|
||||
}
|
||||
#endif
|
||||
#if KINETIS_GPT_USE_PIT3
|
||||
if (&GPTD4 == gptp) {
|
||||
nvicDisableVector(PITChannel3_IRQn);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts the timer in continuous mode.
|
||||
*
|
||||
* @param[in] gptp pointer to the @p GPTDriver object
|
||||
* @param[in] interval period in ticks
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) {
|
||||
|
||||
/* Clear pending interrupts */
|
||||
gptp->channel->TFLG |= PIT_TFLG_TIF;
|
||||
|
||||
/* Set the interval */
|
||||
gptp->channel->LDVAL = (gptp->clock / gptp->config->frequency) * interval;
|
||||
|
||||
/* Start the timer */
|
||||
gptp->channel->TCTRL |= PIT_TCTRL_TIE | PIT_TCTRL_TEN;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stops the timer.
|
||||
*
|
||||
* @param[in] gptp pointer to the @p GPTDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void gpt_lld_stop_timer(GPTDriver *gptp) {
|
||||
|
||||
/* Stop the timer */
|
||||
gptp->channel->TCTRL = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts the timer in one shot mode and waits for completion.
|
||||
* @details This function specifically polls the timer waiting for completion
|
||||
* in order to not have extra delays caused by interrupt servicing,
|
||||
* this function is only recommended for short delays.
|
||||
*
|
||||
* @param[in] gptp pointer to the @p GPTDriver object
|
||||
* @param[in] interval time interval in ticks
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) {
|
||||
struct PIT_CHANNEL *channel = gptp->channel;
|
||||
|
||||
/* Disable timer and disable interrupts */
|
||||
channel->TCTRL = 0;
|
||||
|
||||
/* Clear the interrupt flag */
|
||||
channel->TFLG |= PIT_TFLG_TIF;
|
||||
|
||||
/* Set the interval */
|
||||
channel->LDVAL = (gptp->clock / gptp->config->frequency) * interval;
|
||||
|
||||
/* Enable Timer but keep interrupts disabled */
|
||||
channel->TCTRL = PIT_TCTRL_TEN;
|
||||
|
||||
/* Wait for the interrupt flag to be set */
|
||||
while (!(channel->TFLG & PIT_TFLG_TIF))
|
||||
;
|
||||
|
||||
/* Disable timer and disable interrupts */
|
||||
channel->TCTRL = 0;
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_GPT */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,292 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/gpt_lld.h
|
||||
* @brief KINETIS GPT subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup GPT
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _GPT_LLD_H_
|
||||
#define _GPT_LLD_H_
|
||||
|
||||
#if HAL_USE_GPT || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief GPTD1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for GPTD1 is included.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(KINETIS_GPT_USE_PIT0) || defined(__DOXYGEN__)
|
||||
#define KINETIS_GPT_USE_PIT0 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD2 driver enable switch.
|
||||
* @details If set to @p TRUE the support for GPTD2 is included.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(KINETIS_GPT_USE_PIT1) || defined(__DOXYGEN__)
|
||||
#define KINETIS_GPT_USE_PIT1 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD3 driver enable switch.
|
||||
* @details If set to @p TRUE the support for GPTD3 is included.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(KINETIS_GPT_USE_PIT2) || defined(__DOXYGEN__)
|
||||
#define KINETIS_GPT_USE_PIT2 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD4 driver enable switch.
|
||||
* @details If set to @p TRUE the support for GPTD4 is included.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(KINETIS_GPT_USE_PIT3) || defined(__DOXYGEN__)
|
||||
#define KINETIS_GPT_USE_PIT3 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD1 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_GPT_PIT0_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_GPT_PIT0_IRQ_PRIORITY 7
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD2 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_GPT_PIT1_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_GPT_PIT1_IRQ_PRIORITY 7
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD3 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_GPT_PIT2_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_GPT_PIT2_IRQ_PRIORITY 7
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief GPTD4 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_GPT_PIT3_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_GPT_PIT3_IRQ_PRIORITY 7
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_GPT_USE_PIT0 && !KINETIS_HAS_PIT0
|
||||
#error "PIT0 not present in the selected device"
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT1 && !KINETIS_HAS_PIT1
|
||||
#error "PIT1 not present in the selected device"
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT2 && !KINETIS_HAS_PIT2
|
||||
#error "PIT2 not present in the selected device"
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT3 && !KINETIS_HAS_PIT3
|
||||
#error "PIT3 not present in the selected device"
|
||||
#endif
|
||||
|
||||
#if !KINETIS_GPT_USE_PIT0 && !KINETIS_GPT_USE_PIT1 && \
|
||||
!KINETIS_GPT_USE_PIT2 && !KINETIS_GPT_USE_PIT3
|
||||
#error "GPT driver activated but no PIT peripheral assigned"
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT0 && \
|
||||
!OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT0_IRQ_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to PIT0"
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT1 && \
|
||||
!OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT1_IRQ_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to PIT1"
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT2 && \
|
||||
!OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT2_IRQ_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to PIT2"
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT3 && \
|
||||
!OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT3_IRQ_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to PIT3"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief GPT frequency type.
|
||||
*/
|
||||
typedef uint32_t gptfreq_t;
|
||||
|
||||
/**
|
||||
* @brief GPT counter type.
|
||||
*/
|
||||
typedef uint32_t gptcnt_t;
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
* @note It could be empty on some architectures.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Timer clock in Hz.
|
||||
* @note The low level can use assertions in order to catch invalid
|
||||
* frequency specifications.
|
||||
*/
|
||||
gptfreq_t frequency;
|
||||
/**
|
||||
* @brief Timer callback pointer.
|
||||
* @note This callback is invoked on GPT counter events.
|
||||
* @note This callback can be set to @p NULL but in that case the
|
||||
* one-shot mode cannot be used.
|
||||
*/
|
||||
gptcallback_t callback;
|
||||
/* End of the mandatory fields.*/
|
||||
} GPTConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing a GPT driver.
|
||||
*/
|
||||
struct GPTDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
gptstate_t state;
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const GPTConfig *config;
|
||||
#if defined(GPT_DRIVER_EXT_FIELDS)
|
||||
GPT_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief Timer base clock.
|
||||
*/
|
||||
uint32_t clock;
|
||||
/**
|
||||
* @brief Channel structure in PIT registers block.
|
||||
*/
|
||||
struct PIT_CHANNEL *channel;
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Changes the interval of GPT peripheral.
|
||||
* @details This function changes the interval of a running GPT unit.
|
||||
* @pre The GPT unit must be running in continuous mode.
|
||||
* @post The GPT unit interval is changed to the new value.
|
||||
* @note The function has effect at the next cycle start.
|
||||
*
|
||||
* @param[in] gptp pointer to a @p GPTDriver object
|
||||
* @param[in] interval new cycle time in timer ticks
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define gpt_lld_change_interval(gptp, interval) \
|
||||
((gptp)->channel->LDVAL = (uint32_t)((interval)))
|
||||
|
||||
/**
|
||||
* @brief Returns the interval of GPT peripheral.
|
||||
* @pre The GPT unit must be running in continuous mode.
|
||||
*
|
||||
* @param[in] gptp pointer to a @p GPTDriver object
|
||||
* @return The current interval.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define gpt_lld_get_interval(gptp) ((gptcnt_t)(gptp)->pit->CHANNEL[gptp->channel].LDVAL)
|
||||
|
||||
/**
|
||||
* @brief Returns the counter value of GPT peripheral.
|
||||
* @pre The GPT unit must be running in continuous mode.
|
||||
* @note The nature of the counter is not defined, it may count upward
|
||||
* or downward, it could be continuously running or not.
|
||||
*
|
||||
* @param[in] gptp pointer to a @p GPTDriver object
|
||||
* @return The current counter value.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define gpt_lld_get_counter(gptp) ((gptcnt_t)(gptp)->pit->CHANNEL[gptp->channel].CVAL)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_GPT_USE_PIT0 && !defined(__DOXYGEN__)
|
||||
extern GPTDriver GPTD1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT1 && !defined(__DOXYGEN__)
|
||||
extern GPTDriver GPTD2;
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT2 && !defined(__DOXYGEN__)
|
||||
extern GPTDriver GPTD3;
|
||||
#endif
|
||||
|
||||
#if KINETIS_GPT_USE_PIT3 && !defined(__DOXYGEN__)
|
||||
extern GPTDriver GPTD4;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void gpt_lld_init(void);
|
||||
void gpt_lld_start(GPTDriver *gptp);
|
||||
void gpt_lld_stop(GPTDriver *gptp);
|
||||
void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period);
|
||||
void gpt_lld_stop_timer(GPTDriver *gptp);
|
||||
void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_GPT */
|
||||
|
||||
#endif /* _GPT_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,204 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/hal_lld.c
|
||||
* @brief HAL Driver subsystem low level driver source template.
|
||||
*
|
||||
* @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __CC_ARM
|
||||
__attribute__ ((section(".ARM.__at_0x400")))
|
||||
#else
|
||||
__attribute__ ((used, section(".cfmconfig")))
|
||||
#endif
|
||||
const uint8_t _cfm[0x10] = {
|
||||
0xFF, /* NV_BACKKEY3: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY2: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY1: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY0: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY7: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY6: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY5: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY4: KEY=0xFF */
|
||||
0xFF, /* NV_FPROT3: PROT=0xFF */
|
||||
0xFF, /* NV_FPROT2: PROT=0xFF */
|
||||
0xFF, /* NV_FPROT1: PROT=0xFF */
|
||||
0xFF, /* NV_FPROT0: PROT=0xFF */
|
||||
0x7E, /* NV_FSEC: KEYEN=1,MEEN=3,FSLACC=3,SEC=2 */
|
||||
0xFF, /* NV_FOPT: ??=1,??=1,FAST_INIT=1,LPBOOT1=1,RESET_PIN_CFG=1,
|
||||
NMI_DIS=1,EZPORT_DIS=1,LPBOOT0=1 */
|
||||
0xFF,
|
||||
0xFF
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level HAL driver initialization.
|
||||
* @todo Use a macro to define the system clock frequency.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void hal_lld_init(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief MK20D5 clock initialization.
|
||||
* @note All the involved constants come from the file @p board.h.
|
||||
* @note This function is meant to be invoked early during the system
|
||||
* initialization, it is usually invoked from the file
|
||||
* @p board.c.
|
||||
* @todo This function needs to be more generic.
|
||||
*
|
||||
* @special
|
||||
*/
|
||||
void mk20d50_clock_init(void) {
|
||||
#if !KINETIS_NO_INIT
|
||||
|
||||
#if KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE
|
||||
uint32_t ratio, frdiv;
|
||||
uint32_t ratios[] = { 32, 64, 128, 256, 512, 1024, 1280, 1536 };
|
||||
int ratio_quantity = sizeof(ratios) / sizeof(ratios[0]);
|
||||
int i;
|
||||
#endif /* KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE */
|
||||
|
||||
/* Disable the watchdog */
|
||||
WDOG->UNLOCK = 0xC520;
|
||||
WDOG->UNLOCK = 0xD928;
|
||||
WDOG->STCTRLH &= ~WDOG_STCTRLH_WDOGEN;
|
||||
|
||||
SIM->SCGC5 |= SIM_SCGC5_PORTA |
|
||||
SIM_SCGC5_PORTB |
|
||||
SIM_SCGC5_PORTC |
|
||||
SIM_SCGC5_PORTD |
|
||||
SIM_SCGC5_PORTE;
|
||||
|
||||
#if KINETIS_MCG_MODE == KINETIS_MCG_MODE_FEI
|
||||
|
||||
/* Configure FEI mode */
|
||||
MCG->C4 = MCG_C4_DRST_DRS(KINETIS_MCG_FLL_DRS) |
|
||||
(KINETIS_MCG_FLL_DMX32 ? MCG_C4_DMX32 : 0);
|
||||
|
||||
#endif /* KINETIS_MCG_MODE == KINETIS_MCG_MODE_FEI */
|
||||
|
||||
#if KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE
|
||||
|
||||
/* EXTAL0 and XTAL0 */
|
||||
PORTA->PCR[18] = 0;
|
||||
PORTA->PCR[19] = 0;
|
||||
|
||||
/*
|
||||
* Start in FEI mode
|
||||
*/
|
||||
|
||||
/* Disable capacitors for crystal */
|
||||
OSC->CR = 0;
|
||||
|
||||
/* TODO: need to add more flexible calculation, specially regarding
|
||||
* divisors which may not be available depending on the XTAL
|
||||
* frequency, which would required other registers to be modified.
|
||||
*/
|
||||
/* Enable OSC, low power mode */
|
||||
MCG->C2 = MCG_C2_LOCRE0 | MCG_C2_EREFS0;
|
||||
if (KINETIS_XTAL_FREQUENCY > 8000000)
|
||||
MCG->C2 |= MCG_C2_RANGE0(2);
|
||||
else
|
||||
MCG->C2 |= MCG_C2_RANGE0(1);
|
||||
|
||||
frdiv = 7;
|
||||
ratio = KINETIS_XTAL_FREQUENCY / 31250;
|
||||
for (i = 0; i < ratio_quantity; ++i) {
|
||||
if (ratio == ratios[i]) {
|
||||
frdiv = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Switch to crystal as clock source, FLL input of 31.25 KHz */
|
||||
MCG->C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(frdiv);
|
||||
|
||||
/* Wait for crystal oscillator to begin */
|
||||
while (!(MCG->S & MCG_S_OSCINIT0));
|
||||
|
||||
/* Wait for the FLL to use the oscillator */
|
||||
while (MCG->S & MCG_S_IREFST);
|
||||
|
||||
/* Wait for the MCGOUTCLK to use the oscillator */
|
||||
while ((MCG->S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2));
|
||||
|
||||
/*
|
||||
* Now in FBE mode
|
||||
*/
|
||||
|
||||
/* Config PLL input for 2 MHz */
|
||||
MCG->C5 = MCG_C5_PRDIV0((KINETIS_XTAL_FREQUENCY / 2000000) - 1);
|
||||
|
||||
/* Config PLL for 96 MHz output */
|
||||
MCG->C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0);
|
||||
|
||||
/* Wait for PLL to start using crystal as its input */
|
||||
while (!(MCG->S & MCG_S_PLLST));
|
||||
|
||||
/* Wait for PLL to lock */
|
||||
while (!(MCG->S & MCG_S_LOCK0));
|
||||
|
||||
/*
|
||||
* Now in PBE mode
|
||||
*/
|
||||
|
||||
/* Switch to PLL as clock source */
|
||||
MCG->C1 = MCG_C1_CLKS(0);
|
||||
|
||||
/* Wait for PLL clock to be used */
|
||||
while ((MCG->S & MCG_S_CLKST_MASK) != MCG_S_CLKST_PLL);
|
||||
|
||||
/*
|
||||
* Now in PEE mode
|
||||
*/
|
||||
#endif /* KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE */
|
||||
|
||||
#endif /* !KINETIS_NO_INIT */
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,269 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/hal_lld.h
|
||||
* @brief Kinetis KL2x HAL subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HAL_LLD_H_
|
||||
#define _HAL_LLD_H_
|
||||
|
||||
#include "mk20d5.h"
|
||||
#include "kinetis_registry.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Defines the support for realtime counters in the HAL.
|
||||
*/
|
||||
#define HAL_IMPLEMENTS_COUNTERS FALSE
|
||||
|
||||
/**
|
||||
* @name Platform identification
|
||||
* @{
|
||||
*/
|
||||
#define PLATFORM_NAME "Kinetis"
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @brief Maximum system and core clock (f_SYS) frequency.
|
||||
*/
|
||||
#define KINETIS_SYSCLK_MAX 48000000
|
||||
|
||||
/**
|
||||
* @brief Maximum bus clock (f_BUS) frequency.
|
||||
*/
|
||||
#define KINETIS_BUSCLK_MAX 24000000
|
||||
|
||||
/**
|
||||
* @name Internal clock sources
|
||||
* @{
|
||||
*/
|
||||
#define KINETIS_IRCLK_F 4000000 /**< Fast internal reference clock, factory trimmed. */
|
||||
#define KINETIS_IRCLK_S 32768 /**< Slow internal reference clock, factory trimmed. */
|
||||
/** @} */
|
||||
|
||||
#define KINETIS_MCG_MODE_FEI 1 /**< FLL Engaged Internal. */
|
||||
#define KINETIS_MCG_MODE_FEE 2 /**< FLL Engaged External. */
|
||||
#define KINETIS_MCG_MODE_FBI 3 /**< FLL Bypassed Internal. */
|
||||
#define KINETIS_MCG_MODE_FBE 4 /**< FLL Bypassed External. */
|
||||
#define KINETIS_MCG_MODE_PEE 5 /**< PLL Engaged External. */
|
||||
#define KINETIS_MCG_MODE_PBE 6 /**< PLL Bypassed External. */
|
||||
#define KINETIS_MCG_MODE_BLPI 7 /**< Bypassed Low Power Internal. */
|
||||
#define KINETIS_MCG_MODE_BLPE 8 /**< Bypassed Low Power External. */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Disables the MCG/system clock initialization in the HAL.
|
||||
*/
|
||||
#if !defined(KINETIS_NO_INIT) || defined(__DOXYGEN__)
|
||||
#define KINETIS_NO_INIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief MCG mode selection.
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_MODE) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Clock divider for core/system and bus/flash clocks (OUTDIV1).
|
||||
* @note The allowed range is 1...16.
|
||||
* @note The default value is calculated for a 48 MHz system clock
|
||||
* from a 96 MHz PLL output.
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_FLL_OUTDIV1) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Additional clock divider bus/flash clocks (OUTDIV4).
|
||||
* @note The allowed range is 1...8.
|
||||
* @note This divider is on top of the OUTDIV1 divider.
|
||||
* @note The default value is calculated for 24 MHz bus/flash clocks
|
||||
* from a 96 MHz PLL output and 48 MHz core/system clock.
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_FLL_OUTDIV4) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief FLL DCO tuning enable for 32.768 kHz reference.
|
||||
* @note Set to 1 for fine-tuning DCO for maximum frequency with
|
||||
* a 32.768 kHz reference.
|
||||
* @note The default value is for a 32.768 kHz external crystal.
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_FLL_DMX32) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_FLL_DMX32 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief FLL DCO range selection.
|
||||
* @note The allowed range is 0...3.
|
||||
* @note The default value is calculated for 48 MHz FLL output
|
||||
* from a 32.768 kHz external crystal.
|
||||
* (DMX32 && DRST_DRS=1 => F=1464; 32.768 kHz * F ~= 48 MHz.)
|
||||
*
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_FLL_DRS) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_FLL_DRS 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief MCU system/core clock frequency.
|
||||
*/
|
||||
#if !defined(KINETIS_SYSCLK_FREQUENCY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SYSCLK_FREQUENCY 48000000UL
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief MCU bus/flash clock frequency.
|
||||
*/
|
||||
#if !defined(KINETIS_BUSCLK_FREQUENCY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_MCG_FLL_OUTDIV4)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART0 clock frequency.
|
||||
* @note The default value is based on 96 MHz PLL/2 source.
|
||||
* If you use a different source, such as the FLL,
|
||||
* you must set this properly.
|
||||
*/
|
||||
#if !defined(KINETIS_UART0_CLOCK_FREQ) || defined(__DOXYGEN__)
|
||||
#define KINETIS_UART0_CLOCK_FREQ KINETIS_SYSCLK_FREQUENCY
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART0 clock source.
|
||||
* @note The default value is to use PLL/2 or FLL source.
|
||||
*/
|
||||
#if !defined(KINETIS_UART0_CLOCK_SRC) || defined(__DOXYGEN__)
|
||||
#define KINETIS_UART0_CLOCK_SRC 1
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(KINETIS_SYSCLK_FREQUENCY)
|
||||
#error KINETIS_SYSCLK_FREQUENCY must be defined
|
||||
#endif
|
||||
|
||||
#if KINETIS_SYSCLK_FREQUENCY <= 0 || KINETIS_SYSCLK_FREQUENCY > KINETIS_SYSCLK_MAX
|
||||
#error KINETIS_SYSCLK_FREQUENCY out of range
|
||||
#endif
|
||||
|
||||
#if !defined(KINETIS_BUSCLK_FREQUENCY)
|
||||
#error KINETIS_BUSCLK_FREQUENCY must be defined
|
||||
#endif
|
||||
|
||||
#if KINETIS_BUSCLK_FREQUENCY <= 0 || KINETIS_BUSCLK_FREQUENCY > KINETIS_BUSCLK_MAX
|
||||
#error KINETIS_BUSCLK_FREQUENCY out of range
|
||||
#endif
|
||||
|
||||
#if !(defined(KINETIS_MCG_FLL_OUTDIV1) && \
|
||||
KINETIS_MCG_FLL_OUTDIV1 >= 1 && KINETIS_MCG_FLL_OUTDIV1 <= 16)
|
||||
#error KINETIS_MCG_FLL_OUTDIV1 must be 1 through 16
|
||||
#endif
|
||||
|
||||
#if !(defined(KINETIS_MCG_FLL_OUTDIV4) && \
|
||||
KINETIS_MCG_FLL_OUTDIV4 >= 1 && KINETIS_MCG_FLL_OUTDIV4 <= 8)
|
||||
#error KINETIS_MCG_FLL_OUTDIV4 must be 1 through 8
|
||||
#endif
|
||||
|
||||
#if !(KINETIS_MCG_FLL_DMX32 == 0 || KINETIS_MCG_FLL_DMX32 == 1)
|
||||
#error Invalid KINETIS_MCG_FLL_DMX32 value, must be 0 or 1
|
||||
#endif
|
||||
|
||||
#if !(0 <= KINETIS_MCG_FLL_DRS && KINETIS_MCG_FLL_DRS <= 3)
|
||||
#error Invalid KINETIS_MCG_FLL_DRS value, must be 0...3
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type representing a system clock frequency.
|
||||
*/
|
||||
typedef uint32_t halclock_t;
|
||||
|
||||
/**
|
||||
* @brief Type of the realtime free counter value.
|
||||
*/
|
||||
typedef uint32_t halrtcnt_t;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Returns the current value of the system free running counter.
|
||||
* @note This service is implemented by returning the content of the
|
||||
* DWT_CYCCNT register.
|
||||
*
|
||||
* @return The value of the system free running counter of
|
||||
* type halrtcnt_t.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define hal_lld_get_counter_value() 0
|
||||
|
||||
/**
|
||||
* @brief Realtime counter frequency.
|
||||
* @note The DWT_CYCCNT register is incremented directly by the system
|
||||
* clock so this function returns STM32_HCLK.
|
||||
*
|
||||
* @return The realtime counter frequency of type halclock_t.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define hal_lld_get_counter_frequency() 0
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void hal_lld_init(void);
|
||||
void mk20d50_clock_init(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _HAL_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/kinetis_registry.h
|
||||
* @brief KL2x capabilities registry.
|
||||
*
|
||||
* @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _KINETIS_REGISTRY_H_
|
||||
#define _KINETIS_REGISTRY_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Platform capabilities. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name KL2x capabilities
|
||||
* @{
|
||||
*/
|
||||
/* EXT attributes.*/
|
||||
|
||||
#define KINETIS_PORTA_IRQ_VECTOR VectorE0
|
||||
#define KINETIS_PORTB_IRQ_VECTOR VectorE4
|
||||
#define KINETIS_PORTC_IRQ_VECTOR VectorE8
|
||||
#define KINETIS_PORTD_IRQ_VECTOR VectorEC
|
||||
#define KINETIS_PORTE_IRQ_VECTOR VectorF0
|
||||
|
||||
/* ADC attributes.*/
|
||||
#define KINETIS_HAS_ADC0 TRUE
|
||||
#define KINETIS_ADC0_IRQ_VECTOR Vector98
|
||||
|
||||
/* I2C attributes.*/
|
||||
#define KINETIS_I2C0_IRQ_VECTOR Vector6C
|
||||
|
||||
/* USB attributes */
|
||||
#define KINETIS_USB_IRQ_VECTOR VectorCC
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* _KINETIS_REGISTRY_H_ */
|
||||
|
||||
/** @} */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,241 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file MK20D5/pal_lld.c
|
||||
* @brief PAL subsystem low level driver.
|
||||
*
|
||||
* @addtogroup PAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "osal.h"
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Reads a logical state from an I/O pad.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @return The logical state.
|
||||
* @retval PAL_LOW low logical state.
|
||||
* @retval PAL_HIGH high logical state.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
uint8_t _pal_lld_readpad(ioportid_t port,
|
||||
uint8_t pad) {
|
||||
|
||||
return (port->PDIR & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes a logical state on an output pad.
|
||||
* @note This function is not meant to be invoked directly by the
|
||||
* application code.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] bit logical value, the value must be @p PAL_LOW or
|
||||
* @p PAL_HIGH
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _pal_lld_writepad(ioportid_t port,
|
||||
uint8_t pad,
|
||||
uint8_t bit) {
|
||||
|
||||
if (bit == PAL_HIGH)
|
||||
port->PDOR |= ((uint32_t) 1 << pad);
|
||||
else
|
||||
port->PDOR &= ~((uint32_t) 1 << pad);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Pad mode setup.
|
||||
* @details This function programs a pad with the specified mode.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
* @note Programming an unknown or unsupported mode is silently ignored.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] mode pad mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _pal_lld_setpadmode(ioportid_t port,
|
||||
uint8_t pad,
|
||||
iomode_t mode) {
|
||||
|
||||
PORT_TypeDef *portcfg = NULL;
|
||||
|
||||
chDbgAssert(pad <= 31, "pal_lld_setpadmode() #1, invalid pad");
|
||||
|
||||
if (mode == PAL_MODE_OUTPUT_PUSHPULL)
|
||||
port->PDDR |= ((uint32_t) 1 << pad);
|
||||
else
|
||||
port->PDDR &= ~((uint32_t) 1 << pad);
|
||||
|
||||
if (port == IOPORT1)
|
||||
portcfg = PORTA;
|
||||
else if (port == IOPORT2)
|
||||
portcfg = PORTB;
|
||||
else if (port == IOPORT3)
|
||||
portcfg = PORTC;
|
||||
else if (port == IOPORT4)
|
||||
portcfg = PORTD;
|
||||
else if (port == IOPORT5)
|
||||
portcfg = PORTE;
|
||||
|
||||
chDbgAssert(portcfg != NULL, "pal_lld_setpadmode() #2, invalid port");
|
||||
|
||||
switch (mode) {
|
||||
case PAL_MODE_RESET:
|
||||
case PAL_MODE_INPUT:
|
||||
case PAL_MODE_OUTPUT_PUSHPULL:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1);
|
||||
break;
|
||||
case PAL_MODE_OUTPUT_OPENDRAIN:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) |
|
||||
PORTx_PCRn_ODE;
|
||||
break;
|
||||
case PAL_MODE_INPUT_PULLUP:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) |
|
||||
PORTx_PCRn_PE |
|
||||
PORTx_PCRn_PS;
|
||||
break;
|
||||
case PAL_MODE_INPUT_PULLDOWN:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) |
|
||||
PORTx_PCRn_PE;
|
||||
break;
|
||||
case PAL_MODE_UNCONNECTED:
|
||||
case PAL_MODE_INPUT_ANALOG:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(0);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_1:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_2:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(2);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_3:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(3);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_4:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(4);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_5:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(5);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_6:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(6);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_7:
|
||||
portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(7);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Kinetis I/O ports configuration.
|
||||
* @details Ports A-E clocks enabled.
|
||||
*
|
||||
* @param[in] config the Kinetis ports configuration
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _pal_lld_init(const PALConfig *config) {
|
||||
|
||||
int i, j;
|
||||
|
||||
/* Enable clocking on all Ports */
|
||||
SIM->SCGC5 |= SIM_SCGC5_PORTA |
|
||||
SIM_SCGC5_PORTB |
|
||||
SIM_SCGC5_PORTC |
|
||||
SIM_SCGC5_PORTD |
|
||||
SIM_SCGC5_PORTE;
|
||||
|
||||
/* Initial PORT and GPIO setup */
|
||||
for (i = 0; i < TOTAL_PORTS; i++) {
|
||||
for (j = 0; j < PADS_PER_PORT; j++) {
|
||||
pal_lld_setpadmode(config->ports[i].port,
|
||||
j,
|
||||
config->ports[i].pads[j]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Pads mode setup.
|
||||
* @details This function programs a pads group belonging to the same port
|
||||
* with the specified mode.
|
||||
*
|
||||
* @param[in] port the port identifier
|
||||
* @param[in] mask the group mask
|
||||
* @param[in] mode the mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _pal_lld_setgroupmode(ioportid_t port,
|
||||
ioportmask_t mask,
|
||||
iomode_t mode) {
|
||||
|
||||
int i;
|
||||
|
||||
(void)mask;
|
||||
|
||||
for (i = 0; i < PADS_PER_PORT; i++) {
|
||||
pal_lld_setpadmode(port, i, mode);
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_PAL */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,375 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file MK20D5/pal_lld.h
|
||||
* @brief PAL subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup PAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _PAL_LLD_H_
|
||||
#define _PAL_LLD_H_
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Unsupported modes and specific modes */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define PAL_MODE_ALTERNATIVE_1 10
|
||||
#define PAL_MODE_ALTERNATIVE_2 11
|
||||
#define PAL_MODE_ALTERNATIVE_3 12
|
||||
#define PAL_MODE_ALTERNATIVE_4 13
|
||||
#define PAL_MODE_ALTERNATIVE_5 14
|
||||
#define PAL_MODE_ALTERNATIVE_6 15
|
||||
#define PAL_MODE_ALTERNATIVE_7 16
|
||||
|
||||
#define PIN_MUX_ALTERNATIVE(x) PORTx_PCRn_MUX(x)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I/O Ports Types and constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define TOTAL_PORTS 5
|
||||
#define PADS_PER_PORT 32
|
||||
|
||||
/**
|
||||
* @brief Width, in bits, of an I/O port.
|
||||
*/
|
||||
#define PAL_IOPORTS_WIDTH 32
|
||||
|
||||
/**
|
||||
* @brief Whole port mask.
|
||||
* @brief This macro specifies all the valid bits into a port.
|
||||
*/
|
||||
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
|
||||
|
||||
/**
|
||||
* @brief Digital I/O port sized unsigned type.
|
||||
*/
|
||||
typedef uint32_t ioportmask_t;
|
||||
|
||||
/**
|
||||
* @brief Digital I/O modes.
|
||||
*/
|
||||
typedef uint32_t iomode_t;
|
||||
|
||||
/**
|
||||
* @brief Port Identifier.
|
||||
* @details This type can be a scalar or some kind of pointer, do not make
|
||||
* any assumption about it, use the provided macros when populating
|
||||
* variables of this type.
|
||||
*/
|
||||
typedef GPIO_TypeDef *ioportid_t;
|
||||
|
||||
/**
|
||||
* @brief Port Configuration.
|
||||
* @details This structure stores the configuration parameters of all pads
|
||||
* belonging to a port.
|
||||
*/
|
||||
typedef struct {
|
||||
ioportid_t port;
|
||||
iomode_t pads[PADS_PER_PORT];
|
||||
} PortConfig;
|
||||
|
||||
/**
|
||||
* @brief Generic I/O ports static initializer.
|
||||
* @details An instance of this structure must be passed to @p palInit() at
|
||||
* system startup time in order to initialized the digital I/O
|
||||
* subsystem. This represents only the initial setup, specific pads
|
||||
* or whole ports can be reprogrammed at later time.
|
||||
* @note Implementations may extend this structure to contain more,
|
||||
* architecture dependent, fields.
|
||||
*/
|
||||
typedef struct {
|
||||
PortConfig ports[TOTAL_PORTS];
|
||||
} PALConfig;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I/O Ports Identifiers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief GPIO port A identifier.
|
||||
*/
|
||||
#define IOPORT1 GPIOA
|
||||
|
||||
/**
|
||||
* @brief GPIO port B identifier.
|
||||
*/
|
||||
#define IOPORT2 GPIOB
|
||||
|
||||
/**
|
||||
* @brief GPIO port C identifier.
|
||||
*/
|
||||
#define IOPORT3 GPIOC
|
||||
|
||||
/**
|
||||
* @brief GPIO port D identifier.
|
||||
*/
|
||||
#define IOPORT4 GPIOD
|
||||
|
||||
/**
|
||||
* @brief GPIO port E identifier.
|
||||
*/
|
||||
#define IOPORT5 GPIOE
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Implementation, some of the following macros could be implemented as */
|
||||
/* functions, if so please put them in pal_lld.c. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level PAL subsystem initialization.
|
||||
*
|
||||
* @param[in] config architecture-dependent ports configuration
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_init(config) _pal_lld_init(config)
|
||||
|
||||
/**
|
||||
* @brief Reads the physical I/O port states.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @return The port bits.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readport(port) (port)->PDIR
|
||||
|
||||
/**
|
||||
* @brief Reads the output latch.
|
||||
* @details The purpose of this function is to read back the latched output
|
||||
* value.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @return The latched logical states.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readlatch(port) (port)->PDOR
|
||||
|
||||
/**
|
||||
* @brief Writes a bits mask on a I/O port.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be written on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_writeport(port, bits) (port)->PDOR = (bits)
|
||||
|
||||
/**
|
||||
* @brief Sets a bits mask on a I/O port.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be ORed on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setport(port, bits) (port)->PSOR = (bits)
|
||||
|
||||
/**
|
||||
* @brief Clears a bits mask on a I/O port.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be cleared on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_clearport(port, bits) (port)->PCOR = (bits)
|
||||
|
||||
/**
|
||||
* @brief Toggles a bits mask on a I/O port.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be toggled on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_toggleport(port, bits) (port)->PTOR = (bits)
|
||||
|
||||
/**
|
||||
* @brief Reads a group of bits.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] mask group mask
|
||||
* @param[in] offset group bit offset within the port
|
||||
* @return The group logical states.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readgroup(port, mask, offset) 0
|
||||
|
||||
/**
|
||||
* @brief Writes a group of bits.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] mask group mask
|
||||
* @param[in] offset group bit offset within the port
|
||||
* @param[in] bits bits to be written. Values exceeding the group width
|
||||
* are masked.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_writegroup(port, mask, offset, bits) (void)bits
|
||||
|
||||
/**
|
||||
* @brief Pads group mode setup.
|
||||
* @details This function programs a pads group belonging to the same port
|
||||
* with the specified mode.
|
||||
* @note Programming an unknown or unsupported mode is silently ignored.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] mask group mask
|
||||
* @param[in] offset group bit offset within the port
|
||||
* @param[in] mode group mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setgroupmode(port, mask, offset, mode) \
|
||||
_pal_lld_setgroupmode(port, mask << offset, mode)
|
||||
|
||||
/**
|
||||
* @brief Reads a logical state from an I/O pad.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @return The logical state.
|
||||
* @retval PAL_LOW low logical state.
|
||||
* @retval PAL_HIGH high logical state.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readpad(port, pad) _pal_lld_readpad(port, pad)
|
||||
|
||||
/**
|
||||
* @brief Writes a logical state on an output pad.
|
||||
* @note This function is not meant to be invoked directly by the
|
||||
* application code.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] bit logical value, the value must be @p PAL_LOW or
|
||||
* @p PAL_HIGH
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_writepad(port, pad, bit) _pal_lld_writepad(port, pad, bit)
|
||||
|
||||
/**
|
||||
* @brief Sets a pad logical state to @p PAL_HIGH.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setpad(port, pad) (port)->PSOR = ((uint32_t) 1 << (pad))
|
||||
|
||||
/**
|
||||
* @brief Clears a pad logical state to @p PAL_LOW.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_clearpad(port, pad) (port)->PCOR = ((uint32_t) 1 << (pad))
|
||||
|
||||
/**
|
||||
* @brief Toggles a pad logical state.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_togglepad(port, pad) (port)->PTOR = ((uint32_t) 1 << (pad))
|
||||
|
||||
/**
|
||||
* @brief Pad mode setup.
|
||||
* @details This function programs a pad with the specified mode.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
* @note Programming an unknown or unsupported mode is silently ignored.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] mode pad mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setpadmode(port, pad, mode) \
|
||||
_pal_lld_setpadmode(port, pad, mode)
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern const PALConfig pal_default_config;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void _pal_lld_init(const PALConfig *config);
|
||||
void _pal_lld_setgroupmode(ioportid_t port,
|
||||
ioportmask_t mask,
|
||||
iomode_t mode);
|
||||
void _pal_lld_setpadmode(ioportid_t port,
|
||||
uint8_t pad,
|
||||
iomode_t mode);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_PAL */
|
||||
|
||||
#endif /* _PAL_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,365 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/* TODO Still need to edit this entire file */
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_DRIVERS MK20D5 Drivers
|
||||
* @details This section describes all the supported drivers on the MK20D5
|
||||
* platform and the implementation details of the single drivers.
|
||||
*
|
||||
* @ingroup platforms
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_HAL MK20D5 Initialization Support
|
||||
* @details The MK20D5 HAL support is responsible for system initialization.
|
||||
*
|
||||
* @section mk20d5_hal_1 Supported HW resources
|
||||
* - PLL1.
|
||||
* - PLL2.
|
||||
* - RCC.
|
||||
* - Flash.
|
||||
* .
|
||||
* @section mk20d5_hal_2 MK20D5 HAL driver implementation features
|
||||
* - PLL startup and stabilization.
|
||||
* - Clock tree initialization.
|
||||
* - Clock source selection.
|
||||
* - Flash wait states initialization based on the selected clock options.
|
||||
* - SYSTICK initialization based on current clock and kernel required rate.
|
||||
* - DMA support initialization.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_ADC MK20D5 ADC Support
|
||||
* @details The MK20D5 ADC driver supports the ADC peripherals using DMA
|
||||
* channels for maximum performance.
|
||||
*
|
||||
* @section mk20d5_adc_1 Supported HW resources
|
||||
* - ADC1.
|
||||
* - ADC2.
|
||||
* - ADC3.
|
||||
* - DMA2.
|
||||
* .
|
||||
* @section mk20d5_adc_2 MK20D5 ADC driver implementation features
|
||||
* - Clock stop for reduced power usage when the driver is in stop state.
|
||||
* - Streaming conversion using DMA for maximum performance.
|
||||
* - Programmable ADC interrupt priority level.
|
||||
* - Programmable DMA bus priority for each DMA channel.
|
||||
* - Programmable DMA interrupt priority for each DMA channel.
|
||||
* - DMA and ADC errors detection.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_CAN MK20D5 CAN Support
|
||||
* @details The MK20D5 CAN driver uses the CAN peripherals.
|
||||
*
|
||||
* @section mk20d5_can_1 Supported HW resources
|
||||
* - bxCAN1.
|
||||
* .
|
||||
* @section mk20d5_can_2 MK20D5 CAN driver implementation features
|
||||
* - Clock stop for reduced power usage when the driver is in stop state.
|
||||
* - Support for bxCAN sleep mode.
|
||||
* - Programmable bxCAN interrupts priority level.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_EXT MK20D5 EXT Support
|
||||
* @details The MK20D5 EXT driver uses the EXTI peripheral.
|
||||
*
|
||||
* @section mk20d5_ext_1 Supported HW resources
|
||||
* - EXTI.
|
||||
* .
|
||||
* @section mk20d5_ext_2 MK20D5 EXT driver implementation features
|
||||
* - Each EXTI channel can be independently enabled and programmed.
|
||||
* - Programmable EXTI interrupts priority level.
|
||||
* - Capability to work as event sources (WFE) rather than interrupt sources.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_GPT MK20D5 GPT Support
|
||||
* @details The MK20D5 GPT driver uses the TIMx peripherals.
|
||||
*
|
||||
* @section mk20d5_gpt_1 Supported HW resources
|
||||
* - TIM1.
|
||||
* - TIM2.
|
||||
* - TIM3.
|
||||
* - TIM4.
|
||||
* - TIM5.
|
||||
* - TIM8.
|
||||
* .
|
||||
* @section mk20d5_gpt_2 MK20D5 GPT driver implementation features
|
||||
* - Each timer can be independently enabled and programmed. Unused
|
||||
* peripherals are left in low power mode.
|
||||
* - Programmable TIMx interrupts priority level.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_ICU MK20D5 ICU Support
|
||||
* @details The MK20D5 ICU driver uses the TIMx peripherals.
|
||||
*
|
||||
* @section mk20d5_icu_1 Supported HW resources
|
||||
* - TIM1.
|
||||
* - TIM2.
|
||||
* - TIM3.
|
||||
* - TIM4.
|
||||
* - TIM5.
|
||||
* - TIM8.
|
||||
* .
|
||||
* @section mk20d5_icu_2 MK20D5 ICU driver implementation features
|
||||
* - Each timer can be independently enabled and programmed. Unused
|
||||
* peripherals are left in low power mode.
|
||||
* - Programmable TIMx interrupts priority level.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_MAC MK20D5 MAC Support
|
||||
* @details The MK20D5 MAC driver supports the ETH peripheral.
|
||||
*
|
||||
* @section mk20d5_mac_1 Supported HW resources
|
||||
* - ETH.
|
||||
* - PHY (external).
|
||||
* .
|
||||
* @section mk20d5_mac_2 MK20D5 MAC driver implementation features
|
||||
* - Dedicated DMA operations.
|
||||
* - Support for checksum off-loading.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_PAL MK20D5 PAL Support
|
||||
* @details The MK20D5 PAL driver uses the GPIO peripherals.
|
||||
*
|
||||
* @section mk20d5_pal_1 Supported HW resources
|
||||
* - GPIOA.
|
||||
* - GPIOB.
|
||||
* - GPIOC.
|
||||
* - GPIOD.
|
||||
* - GPIOE.
|
||||
* - GPIOF.
|
||||
* - GPIOG.
|
||||
* - GPIOH.
|
||||
* - GPIOI.
|
||||
* .
|
||||
* @section mk20d5_pal_2 MK20D5 PAL driver implementation features
|
||||
* The PAL driver implementation fully supports the following hardware
|
||||
* capabilities:
|
||||
* - 16 bits wide ports.
|
||||
* - Atomic set/reset functions.
|
||||
* - Atomic set+reset function (atomic bus operations).
|
||||
* - Output latched regardless of the pad setting.
|
||||
* - Direct read of input pads regardless of the pad setting.
|
||||
* .
|
||||
* @section mk20d5_pal_3 Supported PAL setup modes
|
||||
* The MK20D5 PAL driver supports the following I/O modes:
|
||||
* - @p PAL_MODE_RESET.
|
||||
* - @p PAL_MODE_UNCONNECTED.
|
||||
* - @p PAL_MODE_INPUT.
|
||||
* - @p PAL_MODE_INPUT_PULLUP.
|
||||
* - @p PAL_MODE_INPUT_PULLDOWN.
|
||||
* - @p PAL_MODE_INPUT_ANALOG.
|
||||
* - @p PAL_MODE_OUTPUT_PUSHPULL.
|
||||
* - @p PAL_MODE_OUTPUT_OPENDRAIN.
|
||||
* - @p PAL_MODE_ALTERNATE (non standard).
|
||||
* .
|
||||
* Any attempt to setup an invalid mode is ignored.
|
||||
*
|
||||
* @section mk20d5_pal_4 Suboptimal behavior
|
||||
* The MK20D5 GPIO is less than optimal in several areas, the limitations
|
||||
* should be taken in account while using the PAL driver:
|
||||
* - Pad/port toggling operations are not atomic.
|
||||
* - Pad/group mode setup is not atomic.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_PWM MK20D5 PWM Support
|
||||
* @details The MK20D5 PWM driver uses the TIMx peripherals.
|
||||
*
|
||||
* @section mk20d5_pwm_1 Supported HW resources
|
||||
* - TIM1.
|
||||
* - TIM2.
|
||||
* - TIM3.
|
||||
* - TIM4.
|
||||
* - TIM5.
|
||||
* - TIM8.
|
||||
* .
|
||||
* @section mk20d5_pwm_2 MK20D5 PWM driver implementation features
|
||||
* - Each timer can be independently enabled and programmed. Unused
|
||||
* peripherals are left in low power mode.
|
||||
* - Four independent PWM channels per timer.
|
||||
* - Programmable TIMx interrupts priority level.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_SDC MK20D5 SDC Support
|
||||
* @details The MK20D5 SDC driver uses the SDIO peripheral.
|
||||
*
|
||||
* @section mk20d5_sdc_1 Supported HW resources
|
||||
* - SDIO.
|
||||
* - DMA2.
|
||||
* .
|
||||
* @section mk20d5_sdc_2 MK20D5 SDC driver implementation features
|
||||
* - Clock stop for reduced power usage when the driver is in stop state.
|
||||
* - Programmable interrupt priority.
|
||||
* - DMA is used for receiving and transmitting.
|
||||
* - Programmable DMA bus priority for each DMA channel.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_SERIAL MK20D5 Serial Support
|
||||
* @details The MK20D5 Serial driver uses the USART/UART peripherals in a
|
||||
* buffered, interrupt driven, implementation.
|
||||
*
|
||||
* @section mk20d5_serial_1 Supported HW resources
|
||||
* The serial driver can support any of the following hardware resources:
|
||||
* - USART1.
|
||||
* - USART2.
|
||||
* - USART3.
|
||||
* - UART4.
|
||||
* - UART5.
|
||||
* - USART6.
|
||||
* .
|
||||
* @section mk20d5_serial_2 MK20D5 Serial driver implementation features
|
||||
* - Clock stop for reduced power usage when the driver is in stop state.
|
||||
* - Each UART/USART can be independently enabled and programmed. Unused
|
||||
* peripherals are left in low power mode.
|
||||
* - Fully interrupt driven.
|
||||
* - Programmable priority levels for each UART/USART.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_SPI MK20D5 SPI Support
|
||||
* @details The SPI driver supports the MK20D5 SPI peripherals using DMA
|
||||
* channels for maximum performance.
|
||||
*
|
||||
* @section mk20d5_spi_1 Supported HW resources
|
||||
* - SPI1.
|
||||
* - SPI2.
|
||||
* - SPI3.
|
||||
* - DMA1.
|
||||
* - DMA2.
|
||||
* .
|
||||
* @section mk20d5_spi_2 MK20D5 SPI driver implementation features
|
||||
* - Clock stop for reduced power usage when the driver is in stop state.
|
||||
* - Each SPI can be independently enabled and programmed. Unused
|
||||
* peripherals are left in low power mode.
|
||||
* - Programmable interrupt priority levels for each SPI.
|
||||
* - DMA is used for receiving and transmitting.
|
||||
* - Programmable DMA bus priority for each DMA channel.
|
||||
* - Programmable DMA interrupt priority for each DMA channel.
|
||||
* - Programmable DMA error hook.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_UART MK20D5 UART Support
|
||||
* @details The UART driver supports the MK20D5 USART peripherals using DMA
|
||||
* channels for maximum performance.
|
||||
*
|
||||
* @section mk20d5_uart_1 Supported HW resources
|
||||
* The UART driver can support any of the following hardware resources:
|
||||
* - USART1.
|
||||
* - USART2.
|
||||
* - USART3.
|
||||
* - DMA1.
|
||||
* - DMA2.
|
||||
* .
|
||||
* @section mk20d5_uart_2 MK20D5 UART driver implementation features
|
||||
* - Clock stop for reduced power usage when the driver is in stop state.
|
||||
* - Each UART/USART can be independently enabled and programmed. Unused
|
||||
* peripherals are left in low power mode.
|
||||
* - Programmable interrupt priority levels for each UART/USART.
|
||||
* - DMA is used for receiving and transmitting.
|
||||
* - Programmable DMA bus priority for each DMA channel.
|
||||
* - Programmable DMA interrupt priority for each DMA channel.
|
||||
* - Programmable DMA error hook.
|
||||
* .
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_PLATFORM_DRIVERS MK20D5 Platform Drivers
|
||||
* @details Platform support drivers. Platform drivers do not implement HAL
|
||||
* standard driver templates, their role is to support platform
|
||||
* specific functionalities.
|
||||
*
|
||||
* @ingroup MK20D5_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_DMA MK20D5 DMA Support
|
||||
* @details This DMA helper driver is used by the other drivers in order to
|
||||
* access the shared DMA resources in a consistent way.
|
||||
*
|
||||
* @section mk20d5_dma_1 Supported HW resources
|
||||
* The DMA driver can support any of the following hardware resources:
|
||||
* - DMA1.
|
||||
* - DMA2.
|
||||
* .
|
||||
* @section mk20d5_dma_2 MK20D5 DMA driver implementation features
|
||||
* - Exports helper functions/macros to the other drivers that share the
|
||||
* DMA resource.
|
||||
* - Automatic DMA clock stop when not in use by any driver.
|
||||
* - DMA streams and interrupt vectors sharing among multiple drivers.
|
||||
* .
|
||||
* @ingroup MK20D5_PLATFORM_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_ISR MK20D5 ISR Support
|
||||
* @details This ISR helper driver is used by the other drivers in order to
|
||||
* map ISR names to physical vector names.
|
||||
*
|
||||
* @ingroup MK20D5_PLATFORM_DRIVERS
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MK20D5_RCC MK20D5 RCC Support
|
||||
* @details This RCC helper driver is used by the other drivers in order to
|
||||
* access the shared RCC resources in a consistent way.
|
||||
*
|
||||
* @section mk20d5_rcc_1 Supported HW resources
|
||||
* - RCC.
|
||||
* .
|
||||
* @section mk20d5_rcc_2 MK20D5 RCC driver implementation features
|
||||
* - Peripherals reset.
|
||||
* - Peripherals clock enable.
|
||||
* - Peripherals clock disable.
|
||||
* .
|
||||
* @ingroup MK20D5_PLATFORM_DRIVERS
|
||||
*/
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
# List of all platform files.
|
||||
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/K20x/hal_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/K20x/pal_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/K20x/serial_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/K20x/spi_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/LLD/i2c_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/LLD/ext_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/LLD/adc_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/K20x/gpt_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/K20x/st_lld.c
|
||||
|
||||
# Required include directories
|
||||
PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/K20x \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/LLD
|
||||
|
|
@ -0,0 +1,327 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file K20x/serial_lld.c
|
||||
* @brief Kinetis K20x Serial Driver subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup SERIAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "osal.h"
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
|
||||
|
||||
#include "mk20d5.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief SD1 driver identifier.
|
||||
*/
|
||||
#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__)
|
||||
SerialDriver SD1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__)
|
||||
SerialDriver SD2;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__)
|
||||
SerialDriver SD3;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Driver default configuration.
|
||||
*/
|
||||
static const SerialConfig default_config = {
|
||||
38400
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Common IRQ handler.
|
||||
* @note Tries hard to clear all the pending interrupt sources, we don't
|
||||
* want to go through the whole ISR and have another interrupt soon
|
||||
* after.
|
||||
*
|
||||
* @param[in] u pointer to an UART I/O block
|
||||
* @param[in] sdp communication channel associated to the UART
|
||||
*/
|
||||
static void serve_interrupt(SerialDriver *sdp) {
|
||||
UART_TypeDef *u = sdp->uart;
|
||||
uint8_t s1 = u->S1;
|
||||
|
||||
if (s1 & UARTx_S1_RDRF) {
|
||||
osalSysLockFromISR();
|
||||
if (iqIsEmptyI(&sdp->iqueue))
|
||||
chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE);
|
||||
if (iqPutI(&sdp->iqueue, u->D) < Q_OK)
|
||||
chnAddFlagsI(sdp, SD_OVERRUN_ERROR);
|
||||
osalSysUnlockFromISR();
|
||||
}
|
||||
|
||||
if (s1 & UARTx_S1_TDRE) {
|
||||
msg_t b;
|
||||
|
||||
osalSysLockFromISR();
|
||||
b = oqGetI(&sdp->oqueue);
|
||||
osalSysUnlockFromISR();
|
||||
|
||||
if (b < Q_OK) {
|
||||
osalSysLockFromISR();
|
||||
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
|
||||
osalSysUnlockFromISR();
|
||||
u->C2 &= ~UARTx_C2_TIE;
|
||||
} else {
|
||||
u->D = b;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Attempts a TX preload
|
||||
*/
|
||||
static void preload(SerialDriver *sdp) {
|
||||
UART_TypeDef *u = sdp->uart;
|
||||
|
||||
if (u->S1 & UARTx_S1_TDRE) {
|
||||
msg_t b = oqGetI(&sdp->oqueue);
|
||||
if (b < Q_OK) {
|
||||
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
|
||||
return;
|
||||
}
|
||||
u->D = b;
|
||||
u->C2 |= UARTx_C2_TIE;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Driver output notification.
|
||||
*/
|
||||
#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__)
|
||||
static void notify1(io_queue_t *qp)
|
||||
{
|
||||
(void)qp;
|
||||
preload(&SD1);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__)
|
||||
static void notify2(io_queue_t *qp)
|
||||
{
|
||||
(void)qp;
|
||||
preload(&SD2);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__)
|
||||
static void notify3(io_queue_t *qp)
|
||||
{
|
||||
(void)qp;
|
||||
preload(&SD3);
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Common UART configuration.
|
||||
*
|
||||
*/
|
||||
static void configure_uart(UART_TypeDef *uart, const SerialConfig *config)
|
||||
{
|
||||
uint32_t divisor = (KINETIS_SYSCLK_FREQUENCY * 2 + 1) / config->sc_speed;
|
||||
|
||||
/* Disable UART while configuring */
|
||||
uart->C2 &= ~(UARTx_C2_RE | UARTx_C2_TE);
|
||||
uart->C1 = 0;
|
||||
|
||||
uart->BDH = UARTx_BDH_SBR(divisor >> 13) | (uart->BDH & ~UARTx_BDH_SBR_MASK);
|
||||
uart->BDL = divisor >> 5;
|
||||
uart->C4 = UARTx_C4_BRFA(divisor) | (uart->C4 & ~UARTx_C4_BRFA_MASK);
|
||||
|
||||
uart->C2 |= UARTx_C2_RE | UARTx_C2_RIE | UARTx_C2_TE;
|
||||
uart->C3 = UARTx_C3_ORIE | UARTx_C3_NEIE | UARTx_C3_FEIE | UARTx_C3_PEIE;
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* TODO:
|
||||
* UART0_Error is Vector84
|
||||
* UART1_Error is Vector8C
|
||||
* UART2_Error is Vector94
|
||||
*/
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__)
|
||||
OSAL_IRQ_HANDLER(Vector80) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
serve_interrupt(&SD1);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__)
|
||||
OSAL_IRQ_HANDLER(Vector88) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
serve_interrupt(&SD2);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__)
|
||||
OSAL_IRQ_HANDLER(Vector90) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
serve_interrupt(&SD3);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_init(void) {
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0
|
||||
/* Driver initialization.*/
|
||||
sdObjectInit(&SD1, NULL, notify1);
|
||||
SD1.uart = UART0;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1
|
||||
/* Driver initialization.*/
|
||||
sdObjectInit(&SD2, NULL, notify2);
|
||||
SD2.uart = UART1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2
|
||||
/* Driver initialization.*/
|
||||
sdObjectInit(&SD3, NULL, notify3);
|
||||
SD3.uart = UART2;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver configuration and (re)start.
|
||||
*
|
||||
* @param[in] sdp pointer to a @p SerialDriver object
|
||||
* @param[in] config the architecture-dependent serial driver configuration.
|
||||
* If this parameter is set to @p NULL then a default
|
||||
* configuration is used.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
|
||||
|
||||
if (config == NULL)
|
||||
config = &default_config;
|
||||
|
||||
if (sdp->state == SD_STOP) {
|
||||
/* Enables the peripheral.*/
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0
|
||||
if (sdp == &SD1) {
|
||||
SIM->SCGC4 |= SIM_SCGC4_UART0;
|
||||
configure_uart(sdp->uart, config);
|
||||
nvicEnableVector(UART0Status_IRQn, KINETIS_SERIAL_UART0_PRIORITY);
|
||||
}
|
||||
#endif /* KINETIS_SERIAL_USE_UART0 */
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1
|
||||
if (sdp == &SD2) {
|
||||
SIM->SCGC4 |= SIM_SCGC4_UART1;
|
||||
configure_uart(sdp->uart, config);
|
||||
nvicEnableVector(UART1Status_IRQn, KINETIS_SERIAL_UART1_PRIORITY);
|
||||
}
|
||||
#endif /* KINETIS_SERIAL_USE_UART1 */
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2
|
||||
if (sdp == &SD3) {
|
||||
SIM->SCGC4 |= SIM_SCGC4_UART2;
|
||||
configure_uart(sdp->uart, config);
|
||||
nvicEnableVector(UART2Status_IRQn, KINETIS_SERIAL_UART2_PRIORITY);
|
||||
}
|
||||
#endif /* KINETIS_SERIAL_USE_UART2 */
|
||||
|
||||
}
|
||||
/* Configures the peripheral.*/
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver stop.
|
||||
* @details De-initializes the USART, stops the associated clock, resets the
|
||||
* interrupt vector.
|
||||
*
|
||||
* @param[in] sdp pointer to a @p SerialDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_stop(SerialDriver *sdp) {
|
||||
|
||||
if (sdp->state == SD_READY) {
|
||||
/* TODO: Resets the peripheral.*/
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0
|
||||
if (sdp == &SD1) {
|
||||
nvicDisableVector(UART0Status_IRQn);
|
||||
SIM->SCGC4 &= ~SIM_SCGC4_UART0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1
|
||||
if (sdp == &SD2) {
|
||||
nvicDisableVector(UART1Status_IRQn);
|
||||
SIM->SCGC4 &= ~SIM_SCGC4_UART1;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2
|
||||
if (sdp == &SD3) {
|
||||
nvicDisableVector(UART2Status_IRQn);
|
||||
SIM->SCGC4 &= ~SIM_SCGC4_UART2;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_SERIAL */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,163 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file K20x/serial_lld.h
|
||||
* @brief Kinetis K20x Serial Driver subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup SERIAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _SERIAL_LLD_H_
|
||||
#define _SERIAL_LLD_H_
|
||||
|
||||
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief SD1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for SD1 is included.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_USE_UART0) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_USE_UART0 FALSE
|
||||
#endif
|
||||
/**
|
||||
* @brief SD2 driver enable switch.
|
||||
* @details If set to @p TRUE the support for SD2 is included.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_USE_UART1) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_USE_UART1 FALSE
|
||||
#endif
|
||||
/**
|
||||
* @brief SD3 driver enable switch.
|
||||
* @details If set to @p TRUE the support for SD3 is included.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_USE_UART2) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_USE_UART2 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART0 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_UART0_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_UART0_PRIORITY 12
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART1 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_UART1_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_UART1_PRIORITY 12
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART2 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_UART2_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_UART2_PRIORITY 12
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Generic Serial Driver configuration structure.
|
||||
* @details An instance of this structure must be passed to @p sdStart()
|
||||
* in order to configure and start a serial driver operations.
|
||||
* @note Implementations may extend this structure to contain more,
|
||||
* architecture dependent, fields.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Bit rate.
|
||||
*/
|
||||
uint32_t sc_speed;
|
||||
/* End of the mandatory fields.*/
|
||||
} SerialConfig;
|
||||
|
||||
/**
|
||||
* @brief @p SerialDriver specific data.
|
||||
*/
|
||||
#define _serial_driver_data \
|
||||
_base_asynchronous_channel_data \
|
||||
/* Driver state.*/ \
|
||||
sdstate_t state; \
|
||||
/* Input queue.*/ \
|
||||
input_queue_t iqueue; \
|
||||
/* Output queue.*/ \
|
||||
output_queue_t oqueue; \
|
||||
/* Input circular buffer.*/ \
|
||||
uint8_t ib[SERIAL_BUFFERS_SIZE]; \
|
||||
/* Output circular buffer.*/ \
|
||||
uint8_t ob[SERIAL_BUFFERS_SIZE]; \
|
||||
/* End of the mandatory fields.*/ \
|
||||
/* Pointer to the UART registers block.*/ \
|
||||
UART_TypeDef *uart;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0 && !defined(__DOXYGEN__)
|
||||
extern SerialDriver SD1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1 && !defined(__DOXYGEN__)
|
||||
extern SerialDriver SD2;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2 && !defined(__DOXYGEN__)
|
||||
extern SerialDriver SD3;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void sd_lld_init(void);
|
||||
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
|
||||
void sd_lld_stop(SerialDriver *sdp);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_SERIAL */
|
||||
|
||||
#endif /* _SERIAL_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,418 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/spi_lld.c
|
||||
* @brief KINETIS SPI subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_SPI || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(KINETIS_SPI_USE_SPI0)
|
||||
#define KINETIS_SPI_USE_SPI0 TRUE
|
||||
#endif
|
||||
|
||||
#if !defined(KINETIS_SPI0_RX_DMA_IRQ_PRIORITY)
|
||||
#define KINETIS_SPI0_RX_DMA_IRQ_PRIORITY 8
|
||||
#endif
|
||||
|
||||
#if !defined(KINETIS_SPI0_RX_DMAMUX_CHANNEL)
|
||||
#define KINETIS_SPI0_RX_DMAMUX_CHANNEL 0
|
||||
#endif
|
||||
|
||||
#if !defined(KINETIS_SPI0_RX_DMA_CHANNEL)
|
||||
#define KINETIS_SPI0_RX_DMA_CHANNEL 0
|
||||
#endif
|
||||
|
||||
#if !defined(KINETIS_SPI0_TX_DMAMUX_CHANNEL)
|
||||
#define KINETIS_SPI0_TX_DMAMUX_CHANNEL 1
|
||||
#endif
|
||||
|
||||
#if !defined(KINETIS_SPI0_TX_DMA_CHANNEL)
|
||||
#define KINETIS_SPI0_TX_DMA_CHANNEL 1
|
||||
#endif
|
||||
|
||||
#define DMAMUX_SPI_RX_SOURCE 16
|
||||
#define DMAMUX_SPI_TX_SOURCE 17
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @brief SPI0 driver identifier.*/
|
||||
#if KINETIS_SPI_USE_SPI0 || defined(__DOXYGEN__)
|
||||
SPIDriver SPID1;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Use a dummy byte as the source/destination when a buffer is not provided */
|
||||
/* Note: The MMC driver relies on 0xFF being sent for dummy bytes. */
|
||||
static volatile uint16_t dmaRxDummy;
|
||||
static uint16_t dmaTxDummy = 0xFFFF;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static void spi_start_xfer(SPIDriver *spip, bool polling)
|
||||
{
|
||||
/*
|
||||
* Enable the DSPI peripheral in master mode.
|
||||
* Clear the TX and RX FIFOs.
|
||||
* */
|
||||
spip->spi->MCR = SPIx_MCR_MSTR | SPIx_MCR_CLR_TXF | SPIx_MCR_CLR_RXF;
|
||||
|
||||
/* If we are not polling then enable DMA */
|
||||
if (!polling) {
|
||||
|
||||
/* Enable receive dma and transmit dma */
|
||||
spip->spi->RSER = SPIx_RSER_RFDF_DIRS | SPIx_RSER_RFDF_RE |
|
||||
SPIx_RSER_TFFF_RE | SPIx_RSER_TFFF_DIRS;
|
||||
|
||||
/* Configure RX DMA */
|
||||
if (spip->rxbuf) {
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DADDR = (uint32_t)spip->rxbuf;
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DOFF = spip->word_size;
|
||||
} else {
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DADDR = (uint32_t)&dmaRxDummy;
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DOFF = 0;
|
||||
}
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].BITER_ELINKNO = spip->count;
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].CITER_ELINKNO = spip->count;
|
||||
|
||||
/* Enable Request Register (ERQ) for RX by writing 0 to SERQ */
|
||||
DMA->SERQ = KINETIS_SPI0_RX_DMA_CHANNEL;
|
||||
|
||||
/* Configure TX DMA */
|
||||
if (spip->txbuf) {
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SADDR = (uint32_t)spip->txbuf;
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SOFF = spip->word_size;
|
||||
} else {
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SADDR = (uint32_t)&dmaTxDummy;
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SOFF = 0;
|
||||
}
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].BITER_ELINKNO = spip->count;
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].CITER_ELINKNO = spip->count;
|
||||
|
||||
/* Enable Request Register (ERQ) for TX by writing 1 to SERQ */
|
||||
DMA->SERQ = KINETIS_SPI0_TX_DMA_CHANNEL;
|
||||
}
|
||||
}
|
||||
|
||||
static void spi_stop_xfer(SPIDriver *spip)
|
||||
{
|
||||
/* Halt the DSPI peripheral */
|
||||
spip->spi->MCR = SPIx_MCR_MSTR | SPIx_MCR_HALT;
|
||||
|
||||
/* Clear all the flags which are currently set. */
|
||||
spip->spi->SR |= spip->spi->SR;
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
OSAL_IRQ_HANDLER(Vector40) {
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
/* Clear bit 0 in Interrupt Request Register (INT) by writing 0 to CINT */
|
||||
DMA->CINT = KINETIS_SPI0_RX_DMA_CHANNEL;
|
||||
|
||||
spi_stop_xfer(&SPID1);
|
||||
|
||||
_spi_isr_code(&SPID1);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level SPI driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_init(void) {
|
||||
#if KINETIS_SPI_USE_SPI0
|
||||
spiObjectInit(&SPID1);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the SPI peripheral.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_start(SPIDriver *spip) {
|
||||
|
||||
/* If in stopped state then enables the SPI and DMA clocks.*/
|
||||
if (spip->state == SPI_STOP) {
|
||||
|
||||
#if KINETIS_SPI_USE_SPI0
|
||||
if (&SPID1 == spip) {
|
||||
|
||||
/* Enable the clock for SPI0 */
|
||||
SIM->SCGC6 |= SIM_SCGC6_SPI0;
|
||||
|
||||
SPID1.spi = SPI0;
|
||||
|
||||
if (spip->config->tar0) {
|
||||
spip->spi->CTAR[0] = spip->config->tar0;
|
||||
} else {
|
||||
spip->spi->CTAR[0] = KINETIS_SPI_TAR0_DEFAULT;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
nvicEnableVector(DMA0_IRQn, KINETIS_SPI0_RX_DMA_IRQ_PRIORITY);
|
||||
|
||||
SIM->SCGC6 |= SIM_SCGC6_DMAMUX;
|
||||
SIM->SCGC7 |= SIM_SCGC7_DMA;
|
||||
|
||||
/* Clear DMA error flags */
|
||||
DMA->ERR = 0x0F;
|
||||
|
||||
/* Rx, select SPI Rx FIFO */
|
||||
DMAMUX->CHCFG[KINETIS_SPI0_RX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL |
|
||||
DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_RX_SOURCE);
|
||||
|
||||
/* Tx, select SPI Tx FIFO */
|
||||
DMAMUX->CHCFG[KINETIS_SPI0_TX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL |
|
||||
DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_TX_SOURCE);
|
||||
|
||||
/* Extract the frame size from the TAR */
|
||||
uint16_t frame_size = ((spip->spi->CTAR[0] >> SPIx_CTARn_FMSZ_SHIFT) &
|
||||
SPIx_CTARn_FMSZ_MASK) + 1;
|
||||
|
||||
/* DMA transfer size is 16 bits for a frame size > 8 bits */
|
||||
uint16_t dma_size = frame_size > 8 ? 1 : 0;
|
||||
|
||||
/* DMA word size is 2 for a 16 bit frame size */
|
||||
spip->word_size = frame_size > 8 ? 2 : 1;
|
||||
|
||||
/* configure DMA RX fixed values */
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SADDR = (uint32_t)&SPI0->POPR;
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SOFF = 0;
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SLAST = 0;
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DLASTSGA = 0;
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) |
|
||||
DMA_ATTR_DSIZE(dma_size);
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size;
|
||||
DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK |
|
||||
DMA_CSR_INTMAJOR_MASK;
|
||||
|
||||
/* configure DMA TX fixed values */
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SLAST = 0;
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DADDR = (uint32_t)&SPI0->PUSHR;
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DOFF = 0;
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DLASTSGA = 0;
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) |
|
||||
DMA_ATTR_DSIZE(dma_size);
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size;
|
||||
DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the SPI peripheral.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_stop(SPIDriver *spip) {
|
||||
|
||||
/* If in ready state then disables the SPI clock.*/
|
||||
if (spip->state == SPI_READY) {
|
||||
|
||||
nvicDisableVector(DMA0_IRQn);
|
||||
|
||||
SIM->SCGC7 &= ~SIM_SCGC7_DMA;
|
||||
SIM->SCGC6 &= ~SIM_SCGC6_DMAMUX;
|
||||
|
||||
#if KINETIS_SPI_USE_SPI0
|
||||
if (&SPID1 == spip) {
|
||||
/* SPI halt.*/
|
||||
spip->spi->MCR |= SPIx_MCR_HALT;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Disable the clock for SPI0 */
|
||||
SIM->SCGC6 &= ~SIM_SCGC6_SPI0;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Asserts the slave select signal and prepares for transfers.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_select(SPIDriver *spip) {
|
||||
|
||||
palClearPad(spip->config->ssport, spip->config->sspad);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deasserts the slave select signal.
|
||||
* @details The previously selected peripheral is unselected.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_unselect(SPIDriver *spip) {
|
||||
|
||||
palSetPad(spip->config->ssport, spip->config->sspad);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Ignores data on the SPI bus.
|
||||
* @details This asynchronous function starts the transmission of a series of
|
||||
* idle words on the SPI bus and ignores the received data.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
* @param[in] n number of words to be ignored
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_ignore(SPIDriver *spip, size_t n) {
|
||||
|
||||
spip->count = n;
|
||||
spip->rxbuf = NULL;
|
||||
spip->txbuf = NULL;
|
||||
|
||||
spi_start_xfer(spip, false);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Exchanges data on the SPI bus.
|
||||
* @details This asynchronous function starts a simultaneous transmit/receive
|
||||
* operation.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
* @note The buffers are organized as uint8_t arrays for data sizes below or
|
||||
* equal to 8 bits else it is organized as uint16_t arrays.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
* @param[in] n number of words to be exchanged
|
||||
* @param[in] txbuf the pointer to the transmit buffer
|
||||
* @param[out] rxbuf the pointer to the receive buffer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_exchange(SPIDriver *spip, size_t n,
|
||||
const void *txbuf, void *rxbuf) {
|
||||
|
||||
spip->count = n;
|
||||
spip->rxbuf = rxbuf;
|
||||
spip->txbuf = txbuf;
|
||||
|
||||
spi_start_xfer(spip, false);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sends data over the SPI bus.
|
||||
* @details This asynchronous function starts a transmit operation.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
* @note The buffers are organized as uint8_t arrays for data sizes below or
|
||||
* equal to 8 bits else it is organized as uint16_t arrays.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
* @param[in] n number of words to send
|
||||
* @param[in] txbuf the pointer to the transmit buffer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
|
||||
|
||||
spip->count = n;
|
||||
spip->rxbuf = NULL;
|
||||
spip->txbuf = (void *)txbuf;
|
||||
|
||||
spi_start_xfer(spip, false);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receives data from the SPI bus.
|
||||
* @details This asynchronous function starts a receive operation.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
* @note The buffers are organized as uint8_t arrays for data sizes below or
|
||||
* equal to 8 bits else it is organized as uint16_t arrays.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
* @param[in] n number of words to receive
|
||||
* @param[out] rxbuf the pointer to the receive buffer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
|
||||
|
||||
spip->count = n;
|
||||
spip->rxbuf = rxbuf;
|
||||
spip->txbuf = NULL;
|
||||
|
||||
spi_start_xfer(spip, false);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Exchanges one frame using a polled wait.
|
||||
* @details This synchronous function exchanges one frame using a polled
|
||||
* synchronization method. This function is useful when exchanging
|
||||
* small amount of data on high speed channels, usually in this
|
||||
* situation is much more efficient just wait for completion using
|
||||
* polling than suspending the thread waiting for an interrupt.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object
|
||||
* @param[in] frame the data frame to send over the SPI bus
|
||||
* @return The received data frame from the SPI bus.
|
||||
*/
|
||||
uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) {
|
||||
|
||||
spi_start_xfer(spip, true);
|
||||
|
||||
spip->spi->PUSHR = SPIx_PUSHR_TXDATA(frame);
|
||||
|
||||
while ((spip->spi->SR & SPIx_SR_RFDF) == 0)
|
||||
;
|
||||
|
||||
frame = spip->spi->POPR;
|
||||
|
||||
spi_stop_xfer(spip);
|
||||
|
||||
return frame;
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_SPI */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,230 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/spi_lld.h
|
||||
* @brief KINETIS SPI subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup SPI
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _SPI_LLD_H_
|
||||
#define _SPI_LLD_H_
|
||||
|
||||
#if HAL_USE_SPI || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief SPI0 driver enable switch.
|
||||
* @details If set to @p TRUE the support for SPI0 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(KINETIS_SPI_USE_SPI0) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SPI_USE_SPI0 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief SPI0 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_SPI_SPI0_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SPI_SPI0_IRQ_PRIORITY 10
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define KINETIS_HAS_SPI0 TRUE
|
||||
|
||||
#if KINETIS_SPI_USE_SPI0 && !KINETIS_HAS_SPI0
|
||||
#error "SPI0 not present in the selected device"
|
||||
#endif
|
||||
|
||||
#if !KINETIS_SPI_USE_SPI0
|
||||
#error "SPI driver activated but no SPI peripheral assigned"
|
||||
#endif
|
||||
|
||||
#if KINETIS_SPI_USE_SPI0 && \
|
||||
!OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_SPI_SPI0_IRQ_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to SPI0"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing an SPI driver.
|
||||
*/
|
||||
typedef struct SPIDriver SPIDriver;
|
||||
|
||||
/**
|
||||
* @brief SPI notification callback type.
|
||||
*
|
||||
* @param[in] spip pointer to the @p SPIDriver object triggering the
|
||||
* callback
|
||||
*/
|
||||
typedef void (*spicallback_t)(SPIDriver *spip);
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Operation complete callback or @p NULL.
|
||||
*/
|
||||
spicallback_t end_cb;
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief The chip select line port - when not using pcs.
|
||||
*/
|
||||
ioportid_t ssport;
|
||||
/**
|
||||
* @brief The chip select line pad number - when not using pcs.
|
||||
*/
|
||||
uint16_t sspad;
|
||||
/**
|
||||
* @brief SPI initialization data.
|
||||
*/
|
||||
uint32_t tar0;
|
||||
} SPIConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing a SPI driver.
|
||||
*/
|
||||
struct SPIDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
spistate_t state;
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const SPIConfig *config;
|
||||
#if SPI_USE_WAIT || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Waiting thread.
|
||||
*/
|
||||
thread_reference_t thread;
|
||||
#endif /* SPI_USE_WAIT */
|
||||
#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Mutex protecting the bus.
|
||||
*/
|
||||
mutex_t mutex;
|
||||
#endif /* SPI_USE_MUTUAL_EXCLUSION */
|
||||
#if defined(SPI_DRIVER_EXT_FIELDS)
|
||||
SPI_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief Pointer to the SPIx registers block.
|
||||
*/
|
||||
SPI_TypeDef *spi;
|
||||
/**
|
||||
* @brief Number of bytes/words of data to transfer.
|
||||
*/
|
||||
size_t count;
|
||||
/**
|
||||
* @brief Word size in bytes.
|
||||
*/
|
||||
size_t word_size;
|
||||
/**
|
||||
* @brief Pointer to the buffer with data to send.
|
||||
*/
|
||||
const uint8_t *txbuf;
|
||||
/**
|
||||
* @brief Pointer to the buffer to put received data.
|
||||
*/
|
||||
uint8_t *rxbuf;
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* TAR settings for n bits at SYSCLK / 2 */
|
||||
#define KINETIS_SPI_TAR_SYSCLK_DIV_2(n)\
|
||||
SPIx_CTARn_FMSZ((n) - 1) | \
|
||||
SPIx_CTARn_CPOL | \
|
||||
SPIx_CTARn_CPHA | \
|
||||
SPIx_CTARn_DBR | \
|
||||
SPIx_CTARn_PBR(0) | \
|
||||
SPIx_CTARn_BR(0) | \
|
||||
SPIx_CTARn_CSSCK(0) | \
|
||||
SPIx_CTARn_ASC(0) | \
|
||||
SPIx_CTARn_DT(0)
|
||||
|
||||
/* TAR settings for n bits at SYSCLK / 4096 for debugging */
|
||||
#define KINETIS_SPI_TAR_SYSCLK_DIV_4096(n) \
|
||||
SPIx_CTARn_FMSZ(((n) - 1)) | \
|
||||
SPIx_CTARn_CPOL | \
|
||||
SPIx_CTARn_CPHA | \
|
||||
SPIx_CTARn_PBR(0) | \
|
||||
SPIx_CTARn_BR(0xB) | \
|
||||
SPIx_CTARn_CSSCK(0xB) | \
|
||||
SPIx_CTARn_ASC(0x7) | \
|
||||
SPIx_CTARn_DT(0xB)
|
||||
|
||||
#define KINETIS_SPI_TAR_8BIT_FAST KINETIS_SPI_TAR_SYSCLK_DIV_2(8)
|
||||
#define KINETIS_SPI_TAR_8BIT_SLOW KINETIS_SPI_TAR_SYSCLK_DIV_4096(8)
|
||||
|
||||
#define KINETIS_SPI_TAR0_DEFAULT KINETIS_SPI_TAR_SYSCLK_DIV_2(8)
|
||||
#define KINETIS_SPI_TAR1_DEFAULT KINETIS_SPI_TAR_SYSCLK_DIV_2(8)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_SPI_USE_SPI0 && !defined(__DOXYGEN__)
|
||||
extern SPIDriver SPID1;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void spi_lld_init(void);
|
||||
void spi_lld_start(SPIDriver *spip);
|
||||
void spi_lld_stop(SPIDriver *spip);
|
||||
void spi_lld_select(SPIDriver *spip);
|
||||
void spi_lld_unselect(SPIDriver *spip);
|
||||
void spi_lld_ignore(SPIDriver *spip, size_t n);
|
||||
void spi_lld_exchange(SPIDriver *spip, size_t n,
|
||||
const void *txbuf, void *rxbuf);
|
||||
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
|
||||
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
|
||||
uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_SPI */
|
||||
|
||||
#endif /* _SPI_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,98 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/KL2x/st_lld.c
|
||||
* @brief ST Driver subsystem low level driver code.
|
||||
*
|
||||
* @addtogroup ST
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief System Timer vector.
|
||||
* @details This interrupt is used for system tick in periodic mode.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(SysTick_Handler) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
osalSysLockFromISR();
|
||||
osalOsTimerHandlerI();
|
||||
osalSysUnlockFromISR();
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level ST driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void st_lld_init(void) {
|
||||
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
|
||||
/* Periodic systick mode, the Cortex-Mx internal systick timer is used
|
||||
in this mode.*/
|
||||
SysTick->LOAD = (KINETIS_SYSCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1;
|
||||
SysTick->VAL = 0;
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||||
SysTick_CTRL_ENABLE_Msk |
|
||||
SysTick_CTRL_TICKINT_Msk;
|
||||
|
||||
/* IRQ enabled.*/
|
||||
nvicSetSystemHandlerPriority(HANDLER_SYSTICK, KINETIS_ST_IRQ_PRIORITY);
|
||||
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
|
||||
}
|
||||
|
||||
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,156 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/st_lld.h
|
||||
* @brief ST Driver subsystem low level driver header.
|
||||
* @details This header is designed to be include-able without having to
|
||||
* include other files from the HAL.
|
||||
*
|
||||
* @addtogroup ST
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _ST_LLD_H_
|
||||
#define _ST_LLD_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief SysTick timer IRQ priority.
|
||||
*/
|
||||
#if !defined(KINETIS_ST_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_ST_IRQ_PRIORITY 8
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void st_lld_init(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver inline functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Returns the time counter value.
|
||||
*
|
||||
* @return The counter value.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline systime_t st_lld_get_counter(void) {
|
||||
|
||||
return (systime_t)0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts the alarm.
|
||||
* @note Makes sure that no spurious alarms are triggered after
|
||||
* this call.
|
||||
*
|
||||
* @param[in] time the time to be set for the first alarm
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void st_lld_start_alarm(systime_t time) {
|
||||
|
||||
(void)time;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stops the alarm interrupt.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void st_lld_stop_alarm(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets the alarm time.
|
||||
*
|
||||
* @param[in] time the time to be set for the next alarm
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void st_lld_set_alarm(systime_t time) {
|
||||
|
||||
(void)time;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the current alarm time.
|
||||
*
|
||||
* @return The currently set alarm time.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline systime_t st_lld_get_alarm(void) {
|
||||
|
||||
return (systime_t)0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Determines if the alarm is active.
|
||||
*
|
||||
* @return The alarm status.
|
||||
* @retval false if the alarm is not active.
|
||||
* @retval true is the alarm is active
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline bool st_lld_is_alarm_active(void) {
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
#endif /* _ST_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,307 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2013-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/hal_lld.c
|
||||
* @brief Kinetis KL2x HAL Driver subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "osal.h"
|
||||
#include "hal.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __CC_ARM
|
||||
__attribute__ ((section(".ARM.__at_0x400")))
|
||||
#else
|
||||
__attribute__ ((used, section(".cfmconfig")))
|
||||
#endif
|
||||
const uint8_t _cfm[0x10] = {
|
||||
0xFF, /* NV_BACKKEY3: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY2: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY1: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY0: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY7: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY6: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY5: KEY=0xFF */
|
||||
0xFF, /* NV_BACKKEY4: KEY=0xFF */
|
||||
0xFF, /* NV_FPROT3: PROT=0xFF */
|
||||
0xFF, /* NV_FPROT2: PROT=0xFF */
|
||||
0xFF, /* NV_FPROT1: PROT=0xFF */
|
||||
0xFF, /* NV_FPROT0: PROT=0xFF */
|
||||
0x7E, /* NV_FSEC: KEYEN=1,MEEN=3,FSLACC=3,SEC=2 */
|
||||
0xFF, /* NV_FOPT: ??=1,??=1,FAST_INIT=1,LPBOOT1=1,RESET_PIN_CFG=1,
|
||||
NMI_DIS=1,EZPORT_DIS=1,LPBOOT0=1 */
|
||||
0xFF,
|
||||
0xFF
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level HAL driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void hal_lld_init(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief KL2x clocks and PLL initialization.
|
||||
* @note All the involved constants come from the file @p board.h.
|
||||
* @note This function should be invoked just after the system reset.
|
||||
*
|
||||
* @special
|
||||
*/
|
||||
void kl2x_clock_init(void) {
|
||||
#if !KINETIS_NO_INIT
|
||||
/* Disable COP watchdog */
|
||||
SIM->COPC = 0;
|
||||
|
||||
/* Enable PORTA */
|
||||
SIM->SCGC5 |= SIM_SCGC5_PORTA;
|
||||
|
||||
/* --- MCG mode: FEI (default out of reset) ---
|
||||
f_MCGOUTCLK = f_int * F
|
||||
F is the FLL factor selected by C4[DRST_DRS] and C4[DMX32] bits.
|
||||
Typical f_MCGOUTCLK = 21 MHz immediately after reset.
|
||||
C4[DMX32]=0 and C4[DRST_DRS]=00 => FLL factor=640.
|
||||
C3[SCTRIM] and C4[SCFTRIM] factory trim values apply to f_int. */
|
||||
|
||||
/* System oscillator drives 32 kHz clock (OSC32KSEL=0) */
|
||||
SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
|
||||
|
||||
#if KINETIS_MCG_MODE == KINETIS_MCG_MODE_FEI
|
||||
/* This is the default mode at reset. */
|
||||
/* The MCGOUTCLK is divided by OUTDIV1 and OUTDIV4:
|
||||
* OUTDIV1 (divider for core/system and bus/flash clock)
|
||||
* OUTDIV4 (additional divider for bus/flash clock) */
|
||||
SIM->CLKDIV1 =
|
||||
SIM_CLKDIV1_OUTDIV1(1) | /* OUTDIV1 = divide-by-2 => 24 MHz */
|
||||
SIM_CLKDIV1_OUTDIV4(0); /* OUTDIV4 = divide-by-1 => 24 MHz */
|
||||
|
||||
#elif KINETIS_MCG_MODE == KINETIS_MCG_MODE_FEE
|
||||
/*
|
||||
* FLL Enabled External (FEE) MCG Mode
|
||||
* 24 MHz core, 12 MHz bus - using 32.768 kHz crystal with FLL.
|
||||
* f_MCGOUTCLK = (f_ext / FLL_R) * F
|
||||
* = (32.768 kHz ) *
|
||||
* FLL_R is the reference divider selected by C1[FRDIV]
|
||||
* F is the FLL factor selected by C4[DRST_DRS] and C4[DMX32].
|
||||
*
|
||||
* Then the core/system and bus/flash clocks are divided:
|
||||
* f_SYS = f_MCGOUTCLK / OUTDIV1 = 48 MHz / 1 = 48 MHz
|
||||
* f_BUS = f_MCGOUTCLK / OUTDIV1 / OUTDIV4 = MHz / 4 = 24 MHz
|
||||
*/
|
||||
|
||||
SIM->SOPT2 =
|
||||
SIM_SOPT2_TPMSRC(1); /* MCGFLLCLK clock or MCGPLLCLK/2 */
|
||||
/* PLLFLLSEL=0 -> MCGFLLCLK */
|
||||
|
||||
/* The MCGOUTCLK is divided by OUTDIV1 and OUTDIV4:
|
||||
* OUTDIV1 (divider for core/system and bus/flash clock)
|
||||
* OUTDIV4 (additional divider for bus/flash clock) */
|
||||
SIM->CLKDIV1 =
|
||||
SIM_CLKDIV1_OUTDIV1(KINETIS_MCG_FLL_OUTDIV1 - 1) |
|
||||
SIM_CLKDIV1_OUTDIV4(KINETIS_MCG_FLL_OUTDIV4 - 1);
|
||||
|
||||
/* EXTAL0 and XTAL0 */
|
||||
PORTA->PCR[18] &= ~0x01000700; /* Set PA18 to analog (default) */
|
||||
PORTA->PCR[19] &= ~0x01000700; /* Set PA19 to analog (default) */
|
||||
|
||||
OSC0->CR = 0;
|
||||
|
||||
/* From KL25P80M48SF0RM section 24.5.1.1 "Initializing the MCG". */
|
||||
/* To change from FEI mode to FEE mode: */
|
||||
/* (1) Select the external clock source in C2 register.
|
||||
Use low-power OSC mode (HGO0=0) which enables internal feedback
|
||||
resistor, for 32.768 kHz crystal configuration. */
|
||||
MCG->C2 =
|
||||
MCG_C2_RANGE0(0) | /* low frequency range (<= 40 kHz) */
|
||||
MCG_C2_EREFS0; /* external reference (using a crystal) */
|
||||
/* (2) Write to C1 to select the clock mode. */
|
||||
MCG->C1 = /* Clear the IREFS bit to switch to the external reference. */
|
||||
MCG_C1_CLKS_FLLPLL | /* Use FLL for system clock, MCGCLKOUT. */
|
||||
MCG_C1_FRDIV(0); /* Don't divide 32kHz ERCLK FLL reference. */
|
||||
MCG->C6 = 0; /* PLLS=0: Select FLL as MCG source, not PLL */
|
||||
|
||||
/* Loop until S[OSCINIT0] is 1, indicating the
|
||||
crystal selected by C2[EREFS0] has been initialized. */
|
||||
while ((MCG->S & MCG_S_OSCINIT0) == 0)
|
||||
;
|
||||
/* Loop until S[IREFST] is 0, indicating the
|
||||
external reference is the current reference clock source. */
|
||||
while ((MCG->S & MCG_S_IREFST) != 0)
|
||||
; /* Wait until external reference clock is FLL reference. */
|
||||
/* (1)(e) Loop until S[CLKST] indicates FLL feeds MCGOUTCLK. */
|
||||
while ((MCG->S & MCG_S_CLKST_MASK) != MCG_S_CLKST_FLL)
|
||||
; /* Wait until FLL has been selected. */
|
||||
|
||||
/* --- MCG mode: FEE --- */
|
||||
/* Set frequency range for DCO output (MCGFLLCLK). */
|
||||
MCG->C4 = (KINETIS_MCG_FLL_DMX32 ? MCG_C4_DMX32 : 0) |
|
||||
MCG_C4_DRST_DRS(KINETIS_MCG_FLL_DRS);
|
||||
|
||||
/* Wait for the FLL lock time; t[fll_acquire][max] = 1 ms */
|
||||
/* TODO - not implemented - is it required? Freescale example code
|
||||
seems to omit it. */
|
||||
|
||||
#elif KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE
|
||||
/*
|
||||
* PLL Enabled External (PEE) MCG Mode
|
||||
* 48 MHz core, 24 MHz bus - using 8 MHz crystal with PLL.
|
||||
* f_MCGOUTCLK = (OSCCLK / PLL_R) * M
|
||||
* = 8 MHz / 2 * 24 = 96 MHz
|
||||
* PLL_R is the reference divider selected by C5[PRDIV0]
|
||||
* M is the multiplier selected by C6[VDIV0]
|
||||
*
|
||||
* Then the core/system and bus/flash clocks are divided:
|
||||
* f_SYS = f_MCGOUTCLK / OUTDIV1 = 96 MHz / 2 = 48 MHz
|
||||
* f_BUS = f_MCGOUTCLK / OUTDIV1 / OUTDIV4 = 96 MHz / 4 = 24 MHz
|
||||
*/
|
||||
|
||||
/* The MCGOUTCLK is divided by OUTDIV1 and OUTDIV4:
|
||||
* OUTDIV1 (divider for core/system and bus/flash clock)
|
||||
* OUTDIV4 (additional divider for bus/flash clock) */
|
||||
SIM->CLKDIV1 =
|
||||
SIM_CLKDIV1_OUTDIV1(1) | /* OUTDIV1 = divide-by-2 => 48 MHz */
|
||||
SIM_CLKDIV1_OUTDIV4(1); /* OUTDIV4 = divide-by-2 => 24 MHz */
|
||||
|
||||
SIM->SOPT2 =
|
||||
SIM_SOPT2_TPMSRC(1) | /* MCGFLLCLK clock or MCGPLLCLK/2 */
|
||||
SIM_SOPT2_PLLFLLSEL; /* PLLFLLSEL=MCGPLLCLK/2 */
|
||||
|
||||
/* EXTAL0 and XTAL0 */
|
||||
PORTA->PCR[18] &= ~0x01000700; /* Set PA18 to analog (default) */
|
||||
PORTA->PCR[19] &= ~0x01000700; /* Set PA19 to analog (default) */
|
||||
|
||||
OSC0->CR = 0;
|
||||
|
||||
/* From KL25P80M48SF0RM section 24.5.1.1 "Initializing the MCG". */
|
||||
/* To change from FEI mode to FBE mode: */
|
||||
/* (1) Select the external clock source in C2 register.
|
||||
Use low-power OSC mode (HGO0=0) which enables internal feedback
|
||||
resistor since FRDM-KL25Z has feedback resistor R25 unpopulated.
|
||||
Use high-gain mode by setting C2[HGO0] instead if external
|
||||
feedback resistor Rf is installed. */
|
||||
MCG->C2 =
|
||||
MCG_C2_RANGE0(2) | /* very high frequency range */
|
||||
MCG_C2_EREFS0; /* external reference (using a crystal) */
|
||||
/* (2) Write to C1 to select the clock mode. */
|
||||
MCG->C1 = /* Clear the IREFS bit to switch to the external reference. */
|
||||
MCG_C1_CLKS_ERCLK | /* Use ERCLK for system clock, MCGCLKOUT. */
|
||||
MCG_C1_FRDIV(3); /* Divide ERCLK / 256 for FLL reference. */
|
||||
/* Note: FLL reference frequency must be 31.25 kHz to 39.0625 kHz.
|
||||
8 MHz / 256 = 31.25 kHz. */
|
||||
MCG->C4 &= ~(MCG_C4_DMX32 | MCG_C4_DRST_DRS_MASK);
|
||||
MCG->C6 = 0; /* PLLS=0: Select FLL as MCG source, not PLL */
|
||||
|
||||
/* (3) Once configuration is set, wait for MCG mode change. */
|
||||
|
||||
/* From KL25P80M48SF0RM section 24.5.31: */
|
||||
/* (1)(c) Loop until S[OSCINIT0] is 1, indicating the
|
||||
crystal selected by C2[EREFS0] has been initialized. */
|
||||
while ((MCG->S & MCG_S_OSCINIT0) == 0)
|
||||
;
|
||||
/* (1)(d) Loop until S[IREFST] is 0, indicating the
|
||||
external reference is the current reference clock source. */
|
||||
while ((MCG->S & MCG_S_IREFST) != 0)
|
||||
; /* Wait until external reference clock is FLL reference. */
|
||||
/* (1)(e) Loop until S[CLKST] is 2'b10, indicating
|
||||
the external reference clock is selected to feed MCGOUTCLK. */
|
||||
while ((MCG->S & MCG_S_CLKST_MASK) != MCG_S_CLKST_ERCLK)
|
||||
; /* Wait until external reference clock has been selected. */
|
||||
|
||||
/* --- MCG mode: FBE (FLL bypassed, external crystal) ---
|
||||
Now the MCG is in FBE mode.
|
||||
Although the FLL is bypassed, it is still on. */
|
||||
|
||||
/* (2) Then configure C5[PRDIV0] to generate the
|
||||
correct PLL reference frequency. */
|
||||
MCG->C5 = MCG_C5_PRDIV0(1); /* PLL External Reference Divide by 2 */
|
||||
/* (3) Then from FBE transition to PBE mode. */
|
||||
/* (3)(b) C6[PLLS]=1 to select PLL. */
|
||||
/* (3)(b) C6[VDIV0]=5'b0000 (x24) 2 MHz * 24 = 48 MHz. */
|
||||
MCG->C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0);
|
||||
/* (3)(d) Loop until S[PLLST], indicating PLL
|
||||
is the PLLS clock source. */
|
||||
while ((MCG->S & MCG_S_PLLST) == 0)
|
||||
; /* wait until PLL is the PLLS clock source. */
|
||||
/* (3)(e) Loop until S[LOCK0] is set, indicating the PLL has acquired lock. */
|
||||
/* PLL selected as MCG source. VDIV0=00000 (Multiply=24). */
|
||||
while ((MCG->S & MCG_S_LOCK0) == 0)
|
||||
; /* wait until PLL locked */
|
||||
|
||||
/* --- MCG mode: PBE (PLL bypassed, external crystal) --- */
|
||||
|
||||
/* (4) Transition from PBE mode to PEE mode. */
|
||||
/* (4)(a) C1[CLKS] = 2'b00 to select PLL output as system clock source. */
|
||||
// Switch to PEE mode
|
||||
// Select PLL output (CLKS=0)
|
||||
// FLL external reference divider (FRDIV=3)
|
||||
// External reference clock for FLL (IREFS=0)
|
||||
MCG->C1 = MCG_C1_CLKS(0) |
|
||||
MCG_C1_FRDIV(3);
|
||||
/* (4)(b) Loop until S[CLKST] are 2'b11, indicating the PLL output is selected for MCGOUTCLK. */
|
||||
while ((MCG->S & MCG_S_CLKST_MASK) != MCG_S_CLKST_PLL)
|
||||
; /* wait until clock switched to PLL output */
|
||||
|
||||
/* --- MCG mode: PEE (PLL enabled, external crystal) --- */
|
||||
|
||||
#else /* KINETIS_MCG_MODE != KINETIS_MCG_MODE_PEE */
|
||||
#error Unimplemented KINETIS_MCG_MODE
|
||||
#endif /* KINETIS_MCG_MODE != KINETIS_MCG_MODE_PEE */
|
||||
|
||||
#endif /* !KINETIS_NO_INIT */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Platform early initialization.
|
||||
* @note All the involved constants come from the file @p board.h.
|
||||
* @note This function is meant to be invoked early during the system
|
||||
* initialization, it is usually invoked from the file
|
||||
* @p board.c.
|
||||
*
|
||||
* @special
|
||||
*/
|
||||
void platform_early_init(void) {
|
||||
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,269 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2013-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/hal_lld.h
|
||||
* @brief Kinetis KL2x HAL subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HAL_LLD_H_
|
||||
#define _HAL_LLD_H_
|
||||
|
||||
#include "kl25z.h"
|
||||
#include "kinetis_registry.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Defines the support for realtime counters in the HAL.
|
||||
*/
|
||||
#define HAL_IMPLEMENTS_COUNTERS FALSE
|
||||
|
||||
/**
|
||||
* @name Platform identification
|
||||
* @{
|
||||
*/
|
||||
#define PLATFORM_NAME "Kinetis"
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @brief Maximum system and core clock (f_SYS) frequency.
|
||||
*/
|
||||
#define KINETIS_SYSCLK_MAX 48000000
|
||||
|
||||
/**
|
||||
* @brief Maximum bus clock (f_BUS) frequency.
|
||||
*/
|
||||
#define KINETIS_BUSCLK_MAX 24000000
|
||||
|
||||
/**
|
||||
* @name Internal clock sources
|
||||
* @{
|
||||
*/
|
||||
#define KINETIS_IRCLK_F 4000000 /**< Fast internal reference clock, factory trimmed. */
|
||||
#define KINETIS_IRCLK_S 32768 /**< Slow internal reference clock, factory trimmed. */
|
||||
/** @} */
|
||||
|
||||
#define KINETIS_MCG_MODE_FEI 1 /**< FLL Engaged Internal. */
|
||||
#define KINETIS_MCG_MODE_FEE 2 /**< FLL Engaged External. */
|
||||
#define KINETIS_MCG_MODE_FBI 3 /**< FLL Bypassed Internal. */
|
||||
#define KINETIS_MCG_MODE_FBE 4 /**< FLL Bypassed External. */
|
||||
#define KINETIS_MCG_MODE_PEE 5 /**< PLL Engaged External. */
|
||||
#define KINETIS_MCG_MODE_PBE 6 /**< PLL Bypassed External. */
|
||||
#define KINETIS_MCG_MODE_BLPI 7 /**< Bypassed Low Power Internal. */
|
||||
#define KINETIS_MCG_MODE_BLPE 8 /**< Bypassed Low Power External. */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Disables the MCG/system clock initialization in the HAL.
|
||||
*/
|
||||
#if !defined(KINETIS_NO_INIT) || defined(__DOXYGEN__)
|
||||
#define KINETIS_NO_INIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief MCG mode selection.
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_MODE) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Clock divider for core/system and bus/flash clocks (OUTDIV1).
|
||||
* @note The allowed range is 1...16.
|
||||
* @note The default value is calculated for a 48 MHz system clock
|
||||
* from a 96 MHz PLL output.
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_FLL_OUTDIV1) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Additional clock divider bus/flash clocks (OUTDIV4).
|
||||
* @note The allowed range is 1...8.
|
||||
* @note This divider is on top of the OUTDIV1 divider.
|
||||
* @note The default value is calculated for 24 MHz bus/flash clocks
|
||||
* from a 96 MHz PLL output and 48 MHz core/system clock.
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_FLL_OUTDIV4) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief FLL DCO tuning enable for 32.768 kHz reference.
|
||||
* @note Set to 1 for fine-tuning DCO for maximum frequency with
|
||||
* a 32.768 kHz reference.
|
||||
* @note The default value is for a 32.768 kHz external crystal.
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_FLL_DMX32) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_FLL_DMX32 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief FLL DCO range selection.
|
||||
* @note The allowed range is 0...3.
|
||||
* @note The default value is calculated for 48 MHz FLL output
|
||||
* from a 32.768 kHz external crystal.
|
||||
* (DMX32 && DRST_DRS=1 => F=1464; 32.768 kHz * F ~= 48 MHz.)
|
||||
*
|
||||
*/
|
||||
#if !defined(KINETIS_MCG_FLL_DRS) || defined(__DOXYGEN__)
|
||||
#define KINETIS_MCG_FLL_DRS 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief MCU system/core clock frequency.
|
||||
*/
|
||||
#if !defined(KINETIS_SYSCLK_FREQUENCY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SYSCLK_FREQUENCY 48000000UL
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief MCU bus/flash clock frequency.
|
||||
*/
|
||||
#if !defined(KINETIS_BUSCLK_FREQUENCY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_MCG_FLL_OUTDIV4)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART0 clock frequency.
|
||||
* @note The default value is based on 96 MHz PLL/2 source.
|
||||
* If you use a different source, such as the FLL,
|
||||
* you must set this properly.
|
||||
*/
|
||||
#if !defined(KINETIS_UART0_CLOCK_FREQ) || defined(__DOXYGEN__)
|
||||
#define KINETIS_UART0_CLOCK_FREQ KINETIS_SYSCLK_FREQUENCY
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART0 clock source.
|
||||
* @note The default value is to use PLL/2 or FLL source.
|
||||
*/
|
||||
#if !defined(KINETIS_UART0_CLOCK_SRC) || defined(__DOXYGEN__)
|
||||
#define KINETIS_UART0_CLOCK_SRC 1
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(KINETIS_SYSCLK_FREQUENCY)
|
||||
#error KINETIS_SYSCLK_FREQUENCY must be defined
|
||||
#endif
|
||||
|
||||
#if KINETIS_SYSCLK_FREQUENCY <= 0 || KINETIS_SYSCLK_FREQUENCY > KINETIS_SYSCLK_MAX
|
||||
#error KINETIS_SYSCLK_FREQUENCY out of range
|
||||
#endif
|
||||
|
||||
#if !defined(KINETIS_BUSCLK_FREQUENCY)
|
||||
#error KINETIS_BUSCLK_FREQUENCY must be defined
|
||||
#endif
|
||||
|
||||
#if KINETIS_BUSCLK_FREQUENCY <= 0 || KINETIS_BUSCLK_FREQUENCY > KINETIS_BUSCLK_MAX
|
||||
#error KINETIS_BUSCLK_FREQUENCY out of range
|
||||
#endif
|
||||
|
||||
#if !(defined(KINETIS_MCG_FLL_OUTDIV1) && \
|
||||
KINETIS_MCG_FLL_OUTDIV1 >= 1 && KINETIS_MCG_FLL_OUTDIV1 <= 16)
|
||||
#error KINETIS_MCG_FLL_OUTDIV1 must be 1 through 16
|
||||
#endif
|
||||
|
||||
#if !(defined(KINETIS_MCG_FLL_OUTDIV4) && \
|
||||
KINETIS_MCG_FLL_OUTDIV4 >= 1 && KINETIS_MCG_FLL_OUTDIV4 <= 8)
|
||||
#error KINETIS_MCG_FLL_OUTDIV4 must be 1 through 8
|
||||
#endif
|
||||
|
||||
#if !(KINETIS_MCG_FLL_DMX32 == 0 || KINETIS_MCG_FLL_DMX32 == 1)
|
||||
#error Invalid KINETIS_MCG_FLL_DMX32 value, must be 0 or 1
|
||||
#endif
|
||||
|
||||
#if !(0 <= KINETIS_MCG_FLL_DRS && KINETIS_MCG_FLL_DRS <= 3)
|
||||
#error Invalid KINETIS_MCG_FLL_DRS value, must be 0...3
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type representing a system clock frequency.
|
||||
*/
|
||||
typedef uint32_t halclock_t;
|
||||
|
||||
/**
|
||||
* @brief Type of the realtime free counter value.
|
||||
*/
|
||||
typedef uint32_t halrtcnt_t;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Returns the current value of the system free running counter.
|
||||
* @note This service is implemented by returning the content of the
|
||||
* DWT_CYCCNT register.
|
||||
*
|
||||
* @return The value of the system free running counter of
|
||||
* type halrtcnt_t.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define hal_lld_get_counter_value() 0
|
||||
|
||||
/**
|
||||
* @brief Realtime counter frequency.
|
||||
* @note The DWT_CYCCNT register is incremented directly by the system
|
||||
* clock so this function returns STM32_HCLK.
|
||||
*
|
||||
* @return The realtime counter frequency of type halclock_t.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define hal_lld_get_counter_frequency() 0
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void hal_lld_init(void);
|
||||
void kl2x_clock_init(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _HAL_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/kinetis_registry.h
|
||||
* @brief KL2x capabilities registry.
|
||||
*
|
||||
* @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _KINETIS_REGISTRY_H_
|
||||
#define _KINETIS_REGISTRY_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Platform capabilities. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name KL2x capabilities
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* EXT attributes.*/
|
||||
#define KINETIS_PORTA_IRQ_VECTOR VectorB8
|
||||
#define KINETIS_PORTD_IRQ_VECTOR VectorBC
|
||||
|
||||
/* ADC attributes.*/
|
||||
#define KINETIS_HAS_ADC0 TRUE
|
||||
#define KINETIS_ADC0_IRQ_VECTOR Vector7C
|
||||
|
||||
/* I2C attributes.*/
|
||||
#define KINETIS_I2C0_IRQ_VECTOR Vector60
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* _KINETIS_REGISTRY_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,120 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Adam J. Porter
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/kinetis_tpm.h
|
||||
* @brief Kinetis TPM registers layout header.
|
||||
*
|
||||
* @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _KINETIS_TPM_H_
|
||||
#define _KINETIS_TPM_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name TPM_SC register
|
||||
* @{
|
||||
*/
|
||||
#define TPM_SC_CMOD_DISABLE (0 << 3)
|
||||
#define TPM_SC_CMOD_LPTPM_CLK (1 << 3)
|
||||
#define TPM_SC_CMOD_LPTPM_EXTCLK (2 << 3)
|
||||
#define TPM_SC_CPWMS (1 << 5)
|
||||
#define TPM_SC_TOIE (1 << 6)
|
||||
#define TPM_SC_TOF (1 << 7)
|
||||
#define TPM_SC_DMA (1 << 8)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name TPM_MOD register
|
||||
* @{
|
||||
*/
|
||||
#define TPM_MOD_MASK (0xFFFF)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name TPM_CnSC register
|
||||
* @{
|
||||
*/
|
||||
#define TPM_CnSC_DMA (1 << 0)
|
||||
#define TPM_CnSC_ELSA (1 << 2)
|
||||
#define TPM_CnSC_ELSB (1 << 3)
|
||||
#define TPM_CnSC_MSA (1 << 4)
|
||||
#define TPM_CnSC_MSB (1 << 5)
|
||||
#define TPM_CnSC_CHIE (1 << 6)
|
||||
#define TPM_CnSC_CHF (1 << 7)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name TPM_CnV register
|
||||
* @{
|
||||
*/
|
||||
#define TPM_CnV_VAL_MASK (0xFFFF)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name TPM_STATUS register
|
||||
* @{
|
||||
*/
|
||||
#define TPM_STATUS_CH0F (1 << 0)
|
||||
#define TPM_STATUS_CH1F (1 << 1)
|
||||
#define TPM_STATUS_CH2F (1 << 2)
|
||||
#define TPM_STATUS_CH3F (1 << 3)
|
||||
#define TPM_STATUS_CH4F (1 << 4)
|
||||
#define TPM_STATUS_CH5F (1 << 5)
|
||||
#define TPM_STATUS_TOF (1 << 8)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name TPM_CONF register
|
||||
* @{
|
||||
*/
|
||||
#define TPM_CONF_DOZEEN (1 << 5)
|
||||
#define TPM_CONF_DBGMODE_CONT (3 << 6)
|
||||
#define TPM_CONF_DBGMODE_PAUSE (0 << 6)
|
||||
#define TPM_CONF_GTBEEN (1 << 9)
|
||||
#define TPM_CONF_CSOT (1 << 16)
|
||||
#define TPM_CONF_CSOO (1 << 17)
|
||||
#define TPM_CONF_CROT (1 << 18)
|
||||
#define TPM_CONF_TRGSEL(n) ((n) << 24)
|
||||
/** @{ */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
#endif /* _KINETIS_TPM_H_ */
|
||||
|
||||
/** @} */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,225 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2013..2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/pal_lld.c
|
||||
* @brief Kinetis KL2x PAL subsystem low level driver.
|
||||
*
|
||||
* @addtogroup PAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "osal.h"
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief STM32 I/O ports configuration.
|
||||
* @details Ports A-D(E, F, G, H) clocks enabled.
|
||||
*
|
||||
* @param[in] config the STM32 ports configuration
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _pal_lld_init(const PALConfig *config) {
|
||||
|
||||
int i, j;
|
||||
|
||||
/* Enable clocking of all Ports */
|
||||
SIM->SCGC5 |= SIM_SCGC5_PORTA |
|
||||
SIM_SCGC5_PORTB |
|
||||
SIM_SCGC5_PORTC |
|
||||
SIM_SCGC5_PORTD |
|
||||
SIM_SCGC5_PORTE;
|
||||
|
||||
for (i = 0; i < TOTAL_PORTS; i++) {
|
||||
for (j = 0; j < PADS_PER_PORT; j++) {
|
||||
pal_lld_setpadmode(config->ports[i].port,
|
||||
j,
|
||||
config->ports[i].pads[j]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Pads mode setup.
|
||||
* @details This function programs a pads group belonging to the same port
|
||||
* with the specified mode.
|
||||
*
|
||||
* @param[in] port the port identifier
|
||||
* @param[in] mask the group mask
|
||||
* @param[in] mode the mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _pal_lld_setgroupmode(ioportid_t port,
|
||||
ioportmask_t mask,
|
||||
iomode_t mode) {
|
||||
|
||||
(void)port;
|
||||
(void)mask;
|
||||
(void)mode;
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads a logical state from an I/O pad.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @return The logical state.
|
||||
* @retval PAL_LOW low logical state.
|
||||
* @retval PAL_HIGH high logical state.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
uint8_t pal_lld_readpad(ioportid_t port, uint8_t pad)
|
||||
{
|
||||
return (port->PDIR & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes a logical state on an output pad.
|
||||
* @note This function is not meant to be invoked directly by the
|
||||
* application code.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] bit logical value, the value must be @p PAL_LOW or
|
||||
* @p PAL_HIGH
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pal_lld_writepad(ioportid_t port, uint8_t pad, uint8_t bit)
|
||||
{
|
||||
if (bit == PAL_HIGH)
|
||||
port->PDOR |= ((uint32_t) 1 << pad);
|
||||
else
|
||||
port->PDOR &= ~((uint32_t) 1 << pad);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Pad mode setup.
|
||||
* @details This function programs a pad with the specified mode.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
* @note Programming an unknown or unsupported mode is silently ignored.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] mode pad mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode)
|
||||
{
|
||||
PORT_TypeDef *portcfg = NULL;
|
||||
|
||||
osalDbgAssert(pad <= 31, "pal_lld_setpadmode() - invalid pad");
|
||||
|
||||
if (mode == PAL_MODE_OUTPUT_PUSHPULL)
|
||||
port->PDDR |= ((uint32_t) 1 << pad);
|
||||
else
|
||||
port->PDDR &= ~((uint32_t) 1 << pad);
|
||||
|
||||
if (port == IOPORT1)
|
||||
portcfg = PORTA;
|
||||
else if (port == IOPORT2)
|
||||
portcfg = PORTB;
|
||||
else if (port == IOPORT3)
|
||||
portcfg = PORTC;
|
||||
else if (port == IOPORT4)
|
||||
portcfg = PORTD;
|
||||
else if (port == IOPORT5)
|
||||
portcfg = PORTE;
|
||||
|
||||
osalDbgAssert(portcfg != NULL, "pal_lld_setpadmode() - invalid port");
|
||||
|
||||
switch (mode) {
|
||||
case PAL_MODE_RESET:
|
||||
case PAL_MODE_INPUT:
|
||||
case PAL_MODE_OUTPUT_PUSHPULL:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(1);
|
||||
break;
|
||||
case PAL_MODE_INPUT_PULLUP:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(1) | PORTx_PCRn_PE | PORTx_PCRn_PS;
|
||||
break;
|
||||
case PAL_MODE_INPUT_PULLDOWN:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(1) | PORTx_PCRn_PE;
|
||||
break;
|
||||
case PAL_MODE_UNCONNECTED:
|
||||
case PAL_MODE_INPUT_ANALOG:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(0);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_1:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(1);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_2:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(2);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_3:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(3);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_4:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(4);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_5:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(5);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_6:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(6);
|
||||
break;
|
||||
case PAL_MODE_ALTERNATIVE_7:
|
||||
portcfg->PCR[pad] = PORTx_PCRn_MUX(7);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_PAL */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,331 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2013-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/pal_lld.h
|
||||
* @brief Kinetis KL2x PAL subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup PAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _PAL_LLD_H_
|
||||
#define _PAL_LLD_H_
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Unsupported modes and specific modes */
|
||||
/*===========================================================================*/
|
||||
|
||||
#undef PAL_MODE_OUTPUT_OPENDRAIN
|
||||
|
||||
#define PAL_MODE_ALTERNATIVE_1 0x10
|
||||
#define PAL_MODE_ALTERNATIVE_2 0x11
|
||||
#define PAL_MODE_ALTERNATIVE_3 0x12
|
||||
#define PAL_MODE_ALTERNATIVE_4 0x13
|
||||
#define PAL_MODE_ALTERNATIVE_5 0x14
|
||||
#define PAL_MODE_ALTERNATIVE_6 0x15
|
||||
#define PAL_MODE_ALTERNATIVE_7 0x16
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I/O Ports Types and constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define TOTAL_PORTS 5
|
||||
#define PADS_PER_PORT 32
|
||||
|
||||
/**
|
||||
* @brief Digital I/O port sized unsigned type.
|
||||
*/
|
||||
typedef uint32_t ioportmask_t;
|
||||
|
||||
/**
|
||||
* @brief Digital I/O modes.
|
||||
*/
|
||||
typedef uint8_t iomode_t;
|
||||
|
||||
/**
|
||||
* @brief Port Identifier.
|
||||
* @details This type can be a scalar or some kind of pointer, do not make
|
||||
* any assumption about it, use the provided macros when populating
|
||||
* variables of this type.
|
||||
*/
|
||||
typedef GPIO_TypeDef * ioportid_t;
|
||||
|
||||
typedef struct {
|
||||
ioportid_t port;
|
||||
iomode_t pads[PADS_PER_PORT];
|
||||
} PortConfig;
|
||||
|
||||
/**
|
||||
* @brief Generic I/O ports static initializer.
|
||||
* @details An instance of this structure must be passed to @p palInit() at
|
||||
* system startup time in order to initialized the digital I/O
|
||||
* subsystem. This represents only the initial setup, specific pads
|
||||
* or whole ports can be reprogrammed at later time.
|
||||
* @note Implementations may extend this structure to contain more,
|
||||
* architecture dependent, fields.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
PortConfig ports[TOTAL_PORTS];
|
||||
} PALConfig;
|
||||
|
||||
/**
|
||||
* @brief Width, in bits, of an I/O port.
|
||||
*/
|
||||
#define PAL_IOPORTS_WIDTH 32
|
||||
|
||||
/**
|
||||
* @brief Whole port mask.
|
||||
* @brief This macro specifies all the valid bits into a port.
|
||||
*/
|
||||
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
|
||||
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I/O Ports Identifiers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief First I/O port identifier.
|
||||
* @details Low level drivers can define multiple ports, it is suggested to
|
||||
* use this naming convention.
|
||||
*/
|
||||
#define IOPORT1 GPIOA
|
||||
#define IOPORT2 GPIOB
|
||||
#define IOPORT3 GPIOC
|
||||
#define IOPORT4 GPIOD
|
||||
#define IOPORT5 GPIOE
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Implementation, some of the following macros could be implemented as */
|
||||
/* functions, if so please put them in pal_lld.c. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level PAL subsystem initialization.
|
||||
*
|
||||
* @param[in] config architecture-dependent ports configuration
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_init(config) _pal_lld_init(config)
|
||||
|
||||
/**
|
||||
* @brief Reads the physical I/O port states.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @return The port bits.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readport(port) \
|
||||
(port)->PDIR
|
||||
|
||||
/**
|
||||
* @brief Reads the output latch.
|
||||
* @details The purpose of this function is to read back the latched output
|
||||
* value.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @return The latched logical states.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readlatch(port) \
|
||||
(port)->PDOR
|
||||
|
||||
/**
|
||||
* @brief Writes a bits mask on a I/O port.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be written on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_writeport(port, bits) \
|
||||
(port)->PDOR = (bits)
|
||||
|
||||
/**
|
||||
* @brief Sets a bits mask on a I/O port.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be ORed on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setport(port, bits) \
|
||||
(port)->PSOR = (bits)
|
||||
|
||||
/**
|
||||
* @brief Clears a bits mask on a I/O port.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be cleared on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_clearport(port, bits) \
|
||||
(port)->PCOR = (bits)
|
||||
|
||||
/**
|
||||
* @brief Toggles a bits mask on a I/O port.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be XORed on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_toggleport(port, bits) \
|
||||
(port)->PTOR = (bits)
|
||||
|
||||
/**
|
||||
* @brief Reads a group of bits.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] mask group mask
|
||||
* @param[in] offset group bit offset within the port
|
||||
* @return The group logical states.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readgroup(port, mask, offset) 0
|
||||
|
||||
/**
|
||||
* @brief Writes a group of bits.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] mask group mask
|
||||
* @param[in] offset group bit offset within the port
|
||||
* @param[in] bits bits to be written. Values exceeding the group width
|
||||
* are masked.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_writegroup(port, mask, offset, bits) (void)bits
|
||||
|
||||
/**
|
||||
* @brief Pads group mode setup.
|
||||
* @details This function programs a pads group belonging to the same port
|
||||
* with the specified mode.
|
||||
* @note Programming an unknown or unsupported mode is silently ignored.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] mask group mask
|
||||
* @param[in] offset group bit offset within the port
|
||||
* @param[in] mode group mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setgroupmode(port, mask, offset, mode) \
|
||||
_pal_lld_setgroupmode(port, mask << offset, mode)
|
||||
|
||||
/**
|
||||
* @brief Sets a pad logical state to @p PAL_HIGH.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setpad(port, pad) (port)->PSOR = ((uint32_t) 1 << (pad))
|
||||
|
||||
/**
|
||||
* @brief Clears a pad logical state to @p PAL_LOW.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_clearpad(port, pad) (port)->PCOR = ((uint32_t) 1 << (pad))
|
||||
|
||||
/**
|
||||
* @brief Toggles a pad logical state.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_togglepad(port, pad) (port)->PTOR = ((uint32_t) 1 << (pad))
|
||||
|
||||
/**
|
||||
* @brief Pad mode setup.
|
||||
* @details This function programs a pad with the specified mode.
|
||||
* @note The @ref PAL provides a default software implementation of this
|
||||
* functionality, implement this function if can optimize it by using
|
||||
* special hardware functionalities or special coding.
|
||||
* @note Programming an unknown or unsupported mode is silently ignored.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] mode pad mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setpadmode(port, pad, mode) \
|
||||
_pal_lld_setpadmode(port, pad, mode)
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern const PALConfig pal_default_config;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void _pal_lld_init(const PALConfig *config);
|
||||
void _pal_lld_setgroupmode(ioportid_t port,
|
||||
ioportmask_t mask,
|
||||
iomode_t mode);
|
||||
void pal_lld_setpadmode(ioportid_t port,
|
||||
uint8_t pad,
|
||||
iomode_t mode);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_PAL */
|
||||
|
||||
#endif /* _PAL_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
# List of all platform files.
|
||||
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/KL2x/hal_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/KL2x/pal_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/KL2x/serial_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/LLD/i2c_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/LLD/ext_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/LLD/adc_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/KL2x/pwm_lld.c \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/KL2x/st_lld.c
|
||||
|
||||
# Required include directories
|
||||
PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/KL2x \
|
||||
${CHIBIOS}/os/hal/ports/KINETIS/LLD
|
||||
|
|
@ -0,0 +1,400 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Adam J. Porter
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/pwm_lld.c
|
||||
* @brief KINETIS PWM subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup PWM
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define KINETIS_TPM0_CHANNELS 6
|
||||
#define KINETIS_TPM1_CHANNELS 2
|
||||
#define KINETIS_TPM2_CHANNELS 2
|
||||
|
||||
#define KINETIS_TPM0_HANDLER Vector84
|
||||
#define KINETIS_TPM1_HANDLER Vector88
|
||||
#define KINETIS_TPM2_HANDLER Vector8C
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief PWMD1 driver identifier.
|
||||
* @note The driver PWMD1 allocates the timer TPM0 when enabled.
|
||||
*/
|
||||
#if KINETIS_PWM_USE_TPM0 || defined(__DOXYGEN__)
|
||||
PWMDriver PWMD1;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD2 driver identifier.
|
||||
* @note The driver PWMD2 allocates the timer TPM1 when enabled.
|
||||
*/
|
||||
#if KINETIS_PWM_USE_TPM1 || defined(__DOXYGEN__)
|
||||
PWMDriver PWMD2;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD3 driver identifier.
|
||||
* @note The driver PWMD3 allocates the timer TPM2 when enabled.
|
||||
*/
|
||||
#if KINETIS_PWM_USE_TPM2 || defined(__DOXYGEN__)
|
||||
PWMDriver PWMD3;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static void pwm_lld_serve_interrupt(PWMDriver *pwmp) {
|
||||
uint32_t sr;
|
||||
|
||||
sr = pwmp->tpm->STATUS;
|
||||
pwmp->tpm->STATUS = 0xFFFFFFFF;
|
||||
|
||||
if (((sr & TPM_SC_TOF) != 0) &&
|
||||
(pwmp->config->callback != NULL))
|
||||
pwmp->config->callback(pwmp);
|
||||
if (((sr & TPM_STATUS_CH0F) != 0) &&
|
||||
(pwmp->config->channels[0].callback != NULL))
|
||||
pwmp->config->channels[0].callback(pwmp);
|
||||
if (((sr & TPM_STATUS_CH1F) != 0) &&
|
||||
(pwmp->config->channels[1].callback != NULL))
|
||||
pwmp->config->channels[1].callback(pwmp);
|
||||
if (((sr & TPM_STATUS_CH2F) != 0) &&
|
||||
(pwmp->config->channels[2].callback != NULL))
|
||||
pwmp->config->channels[2].callback(pwmp);
|
||||
if (((sr & TPM_STATUS_CH3F) != 0) &&
|
||||
(pwmp->config->channels[3].callback != NULL))
|
||||
pwmp->config->channels[3].callback(pwmp);
|
||||
if (((sr & TPM_STATUS_CH4F) != 0) &&
|
||||
(pwmp->config->channels[4].callback != NULL))
|
||||
pwmp->config->channels[4].callback(pwmp);
|
||||
if (((sr & TPM_STATUS_CH5F) != 0) &&
|
||||
(pwmp->config->channels[5].callback != NULL))
|
||||
pwmp->config->channels[5].callback(pwmp);
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_PWM_USE_TPM0
|
||||
/**
|
||||
* @brief TPM0 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(KINETIS_TPM0_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
pwm_lld_serve_interrupt(&PWMD1);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_PWM_USE_TPM0 */
|
||||
|
||||
#if KINETIS_PWM_USE_TPM1
|
||||
/**
|
||||
* @brief TPM1 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(KINETIS_TPM1_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
pwm_lld_serve_interrupt(&PWMD2);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_PWM_USE_TPM1 */
|
||||
|
||||
#if KINETIS_PWM_USE_TPM2
|
||||
/**
|
||||
* @brief TPM2 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(KINETIS_TPM2_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
pwm_lld_serve_interrupt(&PWMD3);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_PWM_USE_TPM2 */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level PWM driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_init(void) {
|
||||
|
||||
#if KINETIS_PWM_USE_TPM0
|
||||
pwmObjectInit(&PWMD1);
|
||||
PWMD1.channels = KINETIS_TPM0_CHANNELS;
|
||||
PWMD1.tpm = TPM0;
|
||||
#endif
|
||||
|
||||
#if KINETIS_PWM_USE_TPM1
|
||||
pwmObjectInit(&PWMD2);
|
||||
PWMD2.channels = KINETIS_TPM1_CHANNELS;
|
||||
PWMD2.tpm = TPM1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_PWM_USE_TPM2
|
||||
pwmObjectInit(&PWMD3);
|
||||
PWMD3.channels = KINETIS_TPM2_CHANNELS;
|
||||
PWMD3.tpm = TPM2;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the PWM peripheral.
|
||||
* @note Starting a driver that is already in the @p PWM_READY state
|
||||
* disables all the active channels.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_start(PWMDriver *pwmp) {
|
||||
uint32_t psc;
|
||||
int i;
|
||||
|
||||
if (pwmp->state == PWM_STOP) {
|
||||
/* Clock activation and timer reset.*/
|
||||
#if KINETIS_PWM_USE_TPM0
|
||||
if (&PWMD1 == pwmp) {
|
||||
SIM->SCGC6 |= SIM_SCGC6_TPM0;
|
||||
nvicEnableVector(TPM0_IRQn, KINETIS_PWM_TPM0_IRQ_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_PWM_USE_TPM1
|
||||
if (&PWMD2 == pwmp) {
|
||||
SIM->SCGC6 |= SIM_SCGC6_TPM1;
|
||||
nvicEnableVector(TPM1_IRQn, KINETIS_PWM_TPM1_IRQ_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_PWM_USE_TPM2
|
||||
if (&PWMD3 == pwmp) {
|
||||
SIM->SCGC6 |= SIM_SCGC6_TPM2;
|
||||
nvicEnableVector(TPM2_IRQn, KINETIS_PWM_TPM2_IRQ_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Disable LPTPM counter.*/
|
||||
pwmp->tpm->SC = 0;
|
||||
/* Clear count register.*/
|
||||
pwmp->tpm->CNT = 0;
|
||||
|
||||
/* Prescaler value calculation.*/
|
||||
psc = (KINETIS_SYSCLK_FREQUENCY / pwmp->config->frequency);
|
||||
/* Prescaler must be power of two between 1 and 128.*/
|
||||
osalDbgAssert(psc <= 128 && !(psc & (psc - 1)), "invalid frequency");
|
||||
/* Prescaler register value determination.
|
||||
Prescaler register value conveniently corresponds to bit position,
|
||||
i.e., register value for prescaler CLK/64 is 6 ((1 << 6) == 64).*/
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (psc == (1UL << i)) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* Set prescaler and clock mode.
|
||||
This also sets the following:
|
||||
CPWM up-counting mode
|
||||
Timer overflow interrupt disabled
|
||||
DMA disabled.*/
|
||||
pwmp->tpm->SC = TPM_SC_CMOD_LPTPM_CLK | i;
|
||||
/* Configure period.*/
|
||||
pwmp->tpm->MOD = pwmp->period - 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the PWM peripheral.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_stop(PWMDriver *pwmp) {
|
||||
|
||||
/* If in ready state then disables the PWM clock.*/
|
||||
if (pwmp->state == PWM_READY) {
|
||||
#if KINETIS_PWM_USE_TPM0
|
||||
if (&PWMD1 == pwmp) {
|
||||
SIM->SCGC6 &= ~SIM_SCGC6_TPM0;
|
||||
nvicDisableVector(TPM0_IRQn);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_PWM_USE_TPM1
|
||||
if (&PWMD2 == pwmp) {
|
||||
SIM->SCGC6 &= ~SIM_SCGC6_TPM1;
|
||||
nvicDisableVector(TPM1_IRQn);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_PWM_USE_TPM2
|
||||
if (&PWMD3 == pwmp) {
|
||||
SIM->SCGC6 &= ~SIM_SCGC6_TPM2;
|
||||
nvicDisableVector(TPM2_IRQn);
|
||||
}
|
||||
#endif
|
||||
/* Disable LPTPM counter.*/
|
||||
pwmp->tpm->SC = 0;
|
||||
pwmp->tpm->MOD = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enables a PWM channel.
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @post The channel is active using the specified configuration.
|
||||
* @note The function has effect at the next cycle start.
|
||||
* @note Channel notification is not enabled.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] channel PWM channel identifier (0...channels-1)
|
||||
* @param[in] width PWM pulse width as clock pulses number
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_enable_channel(PWMDriver *pwmp,
|
||||
pwmchannel_t channel,
|
||||
pwmcnt_t width) {
|
||||
uint32_t mode = TPM_CnSC_MSB; /* Edge-aligned PWM mode.*/
|
||||
|
||||
switch (pwmp->config->channels[channel].mode & PWM_OUTPUT_MASK) {
|
||||
case PWM_OUTPUT_ACTIVE_HIGH:
|
||||
mode |= TPM_CnSC_ELSB;
|
||||
break;
|
||||
case PWM_OUTPUT_ACTIVE_LOW:
|
||||
mode |= TPM_CnSC_ELSA;
|
||||
break;
|
||||
}
|
||||
|
||||
if (pwmp->tpm->C[channel].SC & TPM_CnSC_CHIE)
|
||||
mode |= TPM_CnSC_CHIE;
|
||||
|
||||
pwmp->tpm->C[channel].SC = mode;
|
||||
pwmp->tpm->C[channel].V = width;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables a PWM channel and its notification.
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @post The channel is disabled and its output line returned to the
|
||||
* idle state.
|
||||
* @note The function has effect at the next cycle start.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] channel PWM channel identifier (0...channels-1)
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {
|
||||
|
||||
pwmp->tpm->C[channel].SC = 0;
|
||||
pwmp->tpm->C[channel].V = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables the periodic activation edge notification.
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @note If the notification is already enabled then the call has no effect.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) {
|
||||
|
||||
pwmp->tpm->SC |= TPM_SC_TOIE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables the periodic activation edge notification.
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @note If the notification is already disabled then the call has no effect.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) {
|
||||
|
||||
pwmp->tpm->SC &= ~TPM_SC_TOIE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables a channel de-activation edge notification.
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @pre The channel must have been activated using @p pwmEnableChannel().
|
||||
* @note If the notification is already enabled then the call has no effect.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] channel PWM channel identifier (0...channels-1)
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel) {
|
||||
|
||||
pwmp->tpm->C[channel].SC |= TPM_CnSC_CHIE;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables a channel de-activation edge notification.
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @pre The channel must have been activated using @p pwmEnableChannel().
|
||||
* @note If the notification is already disabled then the call has no effect.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] channel PWM channel identifier (0...channels-1)
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel) {
|
||||
|
||||
pwmp->tpm->C[channel].SC &= ~TPM_CnSC_CHIE;
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_PWM */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,243 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Adam J. Porter
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/pwm_lld.h
|
||||
* @brief KINETIS PWM subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup PWM
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _PWM_LLD_H_
|
||||
#define _PWM_LLD_H_
|
||||
|
||||
#include "kinetis_tpm.h"
|
||||
|
||||
#if HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(KINETIS_PWM_USE_TPM0)
|
||||
#define KINETIS_PWM_USE_TPM0 FALSE
|
||||
#endif
|
||||
#if !defined(KINETIS_PWM_USE_TPM1)
|
||||
#define KINETIS_PWM_USE_TPM1 FALSE
|
||||
#endif
|
||||
#if !defined(KINETIS_PWM_USE_TPM2)
|
||||
#define KINETIS_PWM_USE_TPM2 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Number of PWM channels per PWM driver.
|
||||
*/
|
||||
#define PWM_CHANNELS 6
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief If advanced timer features switch.
|
||||
* @details If set to @p TRUE the advanced features for TIM1 and TIM8 are
|
||||
* enabled.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(KINETIS_PWM_USE_ADVANCED) || defined(__DOXYGEN__)
|
||||
#define KINETIS_PWM_USE_ADVANCED FALSE
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Configuration checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !KINETIS_PWM_USE_TPM0 && !KINETIS_PWM_USE_TPM1 && !KINETIS_PWM_USE_TPM2
|
||||
#error "PWM driver activated but no TPM peripheral assigned"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM mode.
|
||||
*/
|
||||
typedef uint32_t pwmmode_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM channel.
|
||||
*/
|
||||
typedef uint8_t pwmchannel_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a channels mask.
|
||||
*/
|
||||
typedef uint32_t pwmchnmsk_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM counter.
|
||||
*/
|
||||
typedef uint16_t pwmcnt_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM driver channel configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Channel active logic level.
|
||||
*/
|
||||
pwmmode_t mode;
|
||||
/**
|
||||
* @brief Channel callback pointer.
|
||||
* @note This callback is invoked on the channel compare event. If set to
|
||||
* @p NULL then the callback is disabled.
|
||||
*/
|
||||
pwmcallback_t callback;
|
||||
/* End of the mandatory fields.*/
|
||||
} PWMChannelConfig;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM driver configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Timer clock in Hz.
|
||||
* @note The low level can use assertions in order to catch invalid
|
||||
* frequency specifications.
|
||||
*/
|
||||
uint32_t frequency;
|
||||
/**
|
||||
* @brief PWM period in ticks.
|
||||
* @note The low level can use assertions in order to catch invalid
|
||||
* period specifications.
|
||||
*/
|
||||
pwmcnt_t period;
|
||||
/**
|
||||
* @brief Periodic callback pointer.
|
||||
* @note This callback is invoked on PWM counter reset. If set to
|
||||
* @p NULL then the callback is disabled.
|
||||
*/
|
||||
pwmcallback_t callback;
|
||||
/**
|
||||
* @brief Channels configurations.
|
||||
*/
|
||||
PWMChannelConfig channels[PWM_CHANNELS];
|
||||
/* End of the mandatory fields.*/
|
||||
} PWMConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing a PWM driver.
|
||||
*/
|
||||
struct PWMDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
pwmstate_t state;
|
||||
/**
|
||||
* @brief Current driver configuration data.
|
||||
*/
|
||||
const PWMConfig *config;
|
||||
/**
|
||||
* @brief Current PWM period in ticks.
|
||||
*/
|
||||
pwmcnt_t period;
|
||||
/**
|
||||
* @brief Mask of the enabled channels.
|
||||
*/
|
||||
pwmchnmsk_t enabled;
|
||||
/**
|
||||
* @brief Number of channels in this instance.
|
||||
*/
|
||||
pwmchannel_t channels;
|
||||
#if defined(PWM_DRIVER_EXT_FIELDS)
|
||||
PWM_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief Pointer to the TPM registers block.
|
||||
*/
|
||||
TPM_TypeDef *tpm;
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Changes the period the PWM peripheral.
|
||||
* @details This function changes the period of a PWM unit that has already
|
||||
* been activated using @p pwmStart().
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @post The PWM unit period is changed to the new value.
|
||||
* @note The function has effect at the next cycle start.
|
||||
* @note If a period is specified that is shorter than the pulse width
|
||||
* programmed in one of the channels then the behavior is not
|
||||
* guaranteed.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] period new cycle time in ticks
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pwm_lld_change_period(pwmp, period) \
|
||||
((pwmp)->tpm->MOD = ((period) - 1))
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_PWM_USE_TPM0 || defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD1;
|
||||
#endif
|
||||
#if KINETIS_PWM_USE_TPM1 || defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD2;
|
||||
#endif
|
||||
#if KINETIS_PWM_USE_TPM2 || defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD3;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void pwm_lld_init(void);
|
||||
void pwm_lld_start(PWMDriver *pwmp);
|
||||
void pwm_lld_stop(PWMDriver *pwmp);
|
||||
void pwm_lld_enable_channel(PWMDriver *pwmp,
|
||||
pwmchannel_t channel,
|
||||
pwmcnt_t width);
|
||||
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel);
|
||||
void pwm_lld_enable_periodic_notification(PWMDriver *pwmp);
|
||||
void pwm_lld_disable_periodic_notification(PWMDriver *pwmp);
|
||||
void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel);
|
||||
void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_PWM */
|
||||
|
||||
#endif /* _PWM_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,353 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2013-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/serial_lld.c
|
||||
* @brief Kinetis KL2x Serial Driver subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup SERIAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "osal.h"
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
|
||||
|
||||
#include "kl25z.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief SD1 driver identifier.
|
||||
*/
|
||||
#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__)
|
||||
SerialDriver SD1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__)
|
||||
SerialDriver SD2;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__)
|
||||
SerialDriver SD3;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Driver default configuration.
|
||||
*/
|
||||
static const SerialConfig default_config = {
|
||||
38400
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Common IRQ handler.
|
||||
* @note Tries hard to clear all the pending interrupt sources, we don't
|
||||
* want to go through the whole ISR and have another interrupt soon
|
||||
* after.
|
||||
*
|
||||
* @param[in] u pointer to an UART I/O block
|
||||
* @param[in] sdp communication channel associated to the UART
|
||||
*/
|
||||
static void serve_interrupt(SerialDriver *sdp) {
|
||||
UARTLP_TypeDef *u = sdp->uart;
|
||||
|
||||
if (u->S1 & UARTx_S1_RDRF) {
|
||||
osalSysLockFromISR();
|
||||
if (iqIsEmptyI(&sdp->iqueue))
|
||||
chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE);
|
||||
if (iqPutI(&sdp->iqueue, u->D) < Q_OK)
|
||||
chnAddFlagsI(sdp, SD_OVERRUN_ERROR);
|
||||
osalSysUnlockFromISR();
|
||||
}
|
||||
|
||||
if (u->S1 & UARTx_S1_TDRE) {
|
||||
msg_t b;
|
||||
|
||||
osalSysLockFromISR();
|
||||
b = oqGetI(&sdp->oqueue);
|
||||
osalSysUnlockFromISR();
|
||||
|
||||
if (b < Q_OK) {
|
||||
osalSysLockFromISR();
|
||||
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
|
||||
osalSysUnlockFromISR();
|
||||
u->C2 &= ~UARTx_C2_TIE;
|
||||
} else {
|
||||
u->D = b;
|
||||
}
|
||||
}
|
||||
|
||||
if (u->S1 & UARTx_S1_IDLE)
|
||||
u->S1 = UARTx_S1_IDLE; // Clear IDLE (S1 bits are write-1-to-clear).
|
||||
|
||||
if (u->S1 & (UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF)) {
|
||||
// FIXME: need to add set_error()
|
||||
// Clear flags (S1 bits are write-1-to-clear).
|
||||
u->S1 = UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Attempts a TX preload
|
||||
*/
|
||||
static void preload(SerialDriver *sdp) {
|
||||
UARTLP_TypeDef *u = sdp->uart;
|
||||
|
||||
if (u->S1 & UARTx_S1_TDRE) {
|
||||
msg_t b = oqGetI(&sdp->oqueue);
|
||||
if (b < Q_OK) {
|
||||
chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
|
||||
return;
|
||||
}
|
||||
u->D = b;
|
||||
u->C2 |= UARTx_C2_TIE;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Driver output notification.
|
||||
*/
|
||||
#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__)
|
||||
static void notify1(io_queue_t *qp)
|
||||
{
|
||||
(void)qp;
|
||||
preload(&SD1);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__)
|
||||
static void notify2(io_queue_t *qp)
|
||||
{
|
||||
(void)qp;
|
||||
preload(&SD2);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__)
|
||||
static void notify3(io_queue_t *qp)
|
||||
{
|
||||
(void)qp;
|
||||
preload(&SD3);
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Common UART configuration.
|
||||
*
|
||||
*/
|
||||
static void configure_uart(UARTLP_TypeDef *uart, const SerialConfig *config)
|
||||
{
|
||||
uint32_t uart_clock;
|
||||
|
||||
uart->C1 = 0;
|
||||
uart->C3 = UARTx_C3_ORIE | UARTx_C3_NEIE | UARTx_C3_FEIE | UARTx_C3_PEIE;
|
||||
uart->S1 = UARTx_S1_IDLE | UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF;
|
||||
while (uart->S1 & UARTx_S1_RDRF) {
|
||||
(void)uart->D;
|
||||
}
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0
|
||||
if (uart == UART0) {
|
||||
/* UART0 can be clocked from several sources. */
|
||||
uart_clock = KINETIS_UART0_CLOCK_FREQ;
|
||||
}
|
||||
#endif
|
||||
#if KINETIS_SERIAL_USE_UART1
|
||||
if (uart == UART1) {
|
||||
uart_clock = KINETIS_BUSCLK_FREQUENCY;
|
||||
}
|
||||
#endif
|
||||
#if KINETIS_SERIAL_USE_UART2
|
||||
if (uart == UART2) {
|
||||
uart_clock = KINETIS_BUSCLK_FREQUENCY;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* FIXME: change fixed OSR = 16 to dynamic value based on baud */
|
||||
uint16_t divisor = (uart_clock / 16) / config->sc_speed;
|
||||
uart->C4 = UARTx_C4_OSR & (16 - 1);
|
||||
uart->BDH = (divisor >> 8) & UARTx_BDH_SBR;
|
||||
uart->BDL = (divisor & UARTx_BDL_SBR);
|
||||
|
||||
uart->C2 = UARTx_C2_RE | UARTx_C2_RIE | UARTx_C2_TE;
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__)
|
||||
OSAL_IRQ_HANDLER(Vector70) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
serve_interrupt(&SD1);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__)
|
||||
OSAL_IRQ_HANDLER(Vector74) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
serve_interrupt(&SD2);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__)
|
||||
OSAL_IRQ_HANDLER(Vector78) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
serve_interrupt(&SD3);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_init(void) {
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0
|
||||
/* Driver initialization.*/
|
||||
sdObjectInit(&SD1, NULL, notify1);
|
||||
SD1.uart = UART0;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1
|
||||
/* Driver initialization.*/
|
||||
sdObjectInit(&SD2, NULL, notify2);
|
||||
SD2.uart = UART1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2
|
||||
/* Driver initialization.*/
|
||||
sdObjectInit(&SD3, NULL, notify3);
|
||||
SD3.uart = UART2;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver configuration and (re)start.
|
||||
*
|
||||
* @param[in] sdp pointer to a @p SerialDriver object
|
||||
* @param[in] config the architecture-dependent serial driver configuration.
|
||||
* If this parameter is set to @p NULL then a default
|
||||
* configuration is used.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
|
||||
|
||||
if (config == NULL)
|
||||
config = &default_config;
|
||||
|
||||
if (sdp->state == SD_STOP) {
|
||||
/* Enables the peripheral.*/
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0
|
||||
if (sdp == &SD1) {
|
||||
SIM->SCGC4 |= SIM_SCGC4_UART0;
|
||||
SIM->SOPT2 =
|
||||
(SIM->SOPT2 & ~SIM_SOPT2_UART0SRC_MASK) |
|
||||
SIM_SOPT2_UART0SRC(KINETIS_UART0_CLOCK_SRC);
|
||||
configure_uart(sdp->uart, config);
|
||||
nvicEnableVector(UART0_IRQn, KINETIS_SERIAL_UART0_PRIORITY);
|
||||
}
|
||||
#endif /* KINETIS_SERIAL_USE_UART0 */
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1
|
||||
if (sdp == &SD2) {
|
||||
SIM->SCGC4 |= SIM_SCGC4_UART1;
|
||||
configure_uart(sdp->uart, config);
|
||||
nvicEnableVector(UART1_IRQn, KINETIS_SERIAL_UART1_PRIORITY);
|
||||
}
|
||||
#endif /* KINETIS_SERIAL_USE_UART1 */
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2
|
||||
if (sdp == &SD3) {
|
||||
SIM->SCGC4 |= SIM_SCGC4_UART2;
|
||||
configure_uart(sdp->uart, config);
|
||||
nvicEnableVector(UART2_IRQn, KINETIS_SERIAL_UART2_PRIORITY);
|
||||
}
|
||||
#endif /* KINETIS_SERIAL_USE_UART2 */
|
||||
|
||||
}
|
||||
/* Configures the peripheral.*/
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Low level serial driver stop.
|
||||
* @details De-initializes the USART, stops the associated clock, resets the
|
||||
* interrupt vector.
|
||||
*
|
||||
* @param[in] sdp pointer to a @p SerialDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void sd_lld_stop(SerialDriver *sdp) {
|
||||
|
||||
if (sdp->state == SD_READY) {
|
||||
/* TODO: Resets the peripheral.*/
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0
|
||||
if (sdp == &SD1) {
|
||||
nvicDisableVector(UART0_IRQn);
|
||||
SIM->SCGC4 &= ~SIM_SCGC4_UART0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1
|
||||
if (sdp == &SD2) {
|
||||
nvicDisableVector(UART1_IRQn);
|
||||
SIM->SCGC4 &= ~SIM_SCGC4_UART1;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2
|
||||
if (sdp == &SD3) {
|
||||
nvicDisableVector(UART2_IRQn);
|
||||
SIM->SCGC4 &= ~SIM_SCGC4_UART2;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_SERIAL */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,163 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2013-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KL2x/serial_lld.h
|
||||
* @brief Kinetis KL2x Serial Driver subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup SERIAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _SERIAL_LLD_H_
|
||||
#define _SERIAL_LLD_H_
|
||||
|
||||
#if HAL_USE_SERIAL || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief SD1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for SD1 is included.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_USE_UART0) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_USE_UART0 FALSE
|
||||
#endif
|
||||
/**
|
||||
* @brief SD2 driver enable switch.
|
||||
* @details If set to @p TRUE the support for SD2 is included.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_USE_UART1) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_USE_UART1 FALSE
|
||||
#endif
|
||||
/**
|
||||
* @brief SD3 driver enable switch.
|
||||
* @details If set to @p TRUE the support for SD3 is included.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_USE_UART2) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_USE_UART2 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART0 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_UART0_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_UART0_PRIORITY 12
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART1 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_UART1_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_UART1_PRIORITY 12
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief UART2 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_SERIAL_UART2_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_SERIAL_UART2_PRIORITY 12
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Generic Serial Driver configuration structure.
|
||||
* @details An instance of this structure must be passed to @p sdStart()
|
||||
* in order to configure and start a serial driver operations.
|
||||
* @note Implementations may extend this structure to contain more,
|
||||
* architecture dependent, fields.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Bit rate.
|
||||
*/
|
||||
uint32_t sc_speed;
|
||||
/* End of the mandatory fields.*/
|
||||
} SerialConfig;
|
||||
|
||||
/**
|
||||
* @brief @p SerialDriver specific data.
|
||||
*/
|
||||
#define _serial_driver_data \
|
||||
_base_asynchronous_channel_data \
|
||||
/* Driver state.*/ \
|
||||
sdstate_t state; \
|
||||
/* Input queue.*/ \
|
||||
input_queue_t iqueue; \
|
||||
/* Output queue.*/ \
|
||||
output_queue_t oqueue; \
|
||||
/* Input circular buffer.*/ \
|
||||
uint8_t ib[SERIAL_BUFFERS_SIZE]; \
|
||||
/* Output circular buffer.*/ \
|
||||
uint8_t ob[SERIAL_BUFFERS_SIZE]; \
|
||||
/* End of the mandatory fields.*/ \
|
||||
/* Pointer to the UART registers block.*/ \
|
||||
UARTLP_TypeDef *uart;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART0 && !defined(__DOXYGEN__)
|
||||
extern SerialDriver SD1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART1 && !defined(__DOXYGEN__)
|
||||
extern SerialDriver SD2;
|
||||
#endif
|
||||
|
||||
#if KINETIS_SERIAL_USE_UART2 && !defined(__DOXYGEN__)
|
||||
extern SerialDriver SD3;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void sd_lld_init(void);
|
||||
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
|
||||
void sd_lld_stop(SerialDriver *sdp);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_SERIAL */
|
||||
|
||||
#endif /* _SERIAL_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,98 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/KL2x/st_lld.c
|
||||
* @brief ST Driver subsystem low level driver code.
|
||||
*
|
||||
* @addtogroup ST
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief System Timer vector.
|
||||
* @details This interrupt is used for system tick in periodic mode.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(SysTick_Handler) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
osalSysLockFromISR();
|
||||
osalOsTimerHandlerI();
|
||||
osalSysUnlockFromISR();
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level ST driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void st_lld_init(void) {
|
||||
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
|
||||
/* Periodic systick mode, the Cortex-Mx internal systick timer is used
|
||||
in this mode.*/
|
||||
SysTick->LOAD = (KINETIS_SYSCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1;
|
||||
SysTick->VAL = 0;
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||||
SysTick_CTRL_ENABLE_Msk |
|
||||
SysTick_CTRL_TICKINT_Msk;
|
||||
|
||||
/* IRQ enabled.*/
|
||||
nvicSetSystemHandlerPriority(HANDLER_SYSTICK, KINETIS_ST_IRQ_PRIORITY);
|
||||
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
|
||||
}
|
||||
|
||||
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,156 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/st_lld.h
|
||||
* @brief ST Driver subsystem low level driver header.
|
||||
* @details This header is designed to be include-able without having to
|
||||
* include other files from the HAL.
|
||||
*
|
||||
* @addtogroup ST
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _ST_LLD_H_
|
||||
#define _ST_LLD_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief SysTick timer IRQ priority.
|
||||
*/
|
||||
#if !defined(KINETIS_ST_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_ST_IRQ_PRIORITY 8
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void st_lld_init(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver inline functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Returns the time counter value.
|
||||
*
|
||||
* @return The counter value.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline systime_t st_lld_get_counter(void) {
|
||||
|
||||
return (systime_t)0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts the alarm.
|
||||
* @note Makes sure that no spurious alarms are triggered after
|
||||
* this call.
|
||||
*
|
||||
* @param[in] time the time to be set for the first alarm
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void st_lld_start_alarm(systime_t time) {
|
||||
|
||||
(void)time;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stops the alarm interrupt.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void st_lld_stop_alarm(void) {
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sets the alarm time.
|
||||
*
|
||||
* @param[in] time the time to be set for the next alarm
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline void st_lld_set_alarm(systime_t time) {
|
||||
|
||||
(void)time;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the current alarm time.
|
||||
*
|
||||
* @return The currently set alarm time.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline systime_t st_lld_get_alarm(void) {
|
||||
|
||||
return (systime_t)0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Determines if the alarm is active.
|
||||
*
|
||||
* @return The alarm status.
|
||||
* @retval false if the alarm is not active.
|
||||
* @retval true is the alarm is active
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static inline bool st_lld_is_alarm_active(void) {
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
#endif /* _ST_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,258 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/LLD/adc_lld.c
|
||||
* @brief KINETIS ADC subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup ADC
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_ADC || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define ADC_CHANNEL_MASK 0x1f
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @brief ADC1 driver identifier.*/
|
||||
#if KINETIS_ADC_USE_ADC0 || defined(__DOXYGEN__)
|
||||
ADCDriver ADCD1;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static void calibrate(ADCDriver *adcp) {
|
||||
|
||||
/* Clock Divide by 8, Use Bus Clock Div 2 */
|
||||
/* At 48MHz this results in ADCCLK of 48/8/2 == 3MHz */
|
||||
adcp->adc->CFG1 = ADCx_CFG1_ADIV(ADCx_CFG1_ADIV_DIV_8) |
|
||||
ADCx_CFG1_ADICLK(ADCx_CFG1_ADIVCLK_BUS_CLOCK_DIV_2);
|
||||
|
||||
/* Use software trigger and disable DMA etc. */
|
||||
adcp->adc->SC2 = 0;
|
||||
|
||||
/* Enable Hardware Average, Average 32 Samples, Calibrate */
|
||||
adcp->adc->SC3 = ADCx_SC3_AVGE |
|
||||
ADCx_SC3_AVGS(ADCx_SC3_AVGS_AVERAGE_32_SAMPLES) |
|
||||
ADCx_SC3_CAL;
|
||||
|
||||
/* FIXME: May take several ms. Use an interrupt instead of busy wait */
|
||||
/* Wait for calibration completion */
|
||||
while (!(adcp->adc->SC1A & ADCx_SC1n_COCO))
|
||||
;
|
||||
|
||||
uint16_t gain = ((adcp->adc->CLP0 + adcp->adc->CLP1 + adcp->adc->CLP2 +
|
||||
adcp->adc->CLP3 + adcp->adc->CLP4 + adcp->adc->CLPS) / 2) | 0x8000;
|
||||
adcp->adc->PG = gain;
|
||||
|
||||
gain = ((adcp->adc->CLM0 + adcp->adc->CLM1 + adcp->adc->CLM2 +
|
||||
adcp->adc->CLM3 + adcp->adc->CLM4 + adcp->adc->CLMS) / 2) | 0x8000;
|
||||
adcp->adc->MG = gain;
|
||||
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_ADC_USE_ADC0 || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief ADC interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(KINETIS_ADC0_IRQ_VECTOR) {
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
ADCDriver *adcp = &ADCD1;
|
||||
|
||||
/* Disable Interrupt, Disable Channel */
|
||||
adcp->adc->SC1A = ADCx_SC1n_ADCH(ADCx_SC1n_ADCH_DISABLED);
|
||||
|
||||
/* Read the sample into the buffer */
|
||||
adcp->samples[adcp->current_index++] = adcp->adc->RA;
|
||||
|
||||
bool more = true;
|
||||
|
||||
/* At the end of the buffer then we may be finished */
|
||||
if (adcp->current_index == adcp->number_of_samples) {
|
||||
_adc_isr_full_code(&ADCD1);
|
||||
|
||||
adcp->current_index = 0;
|
||||
|
||||
/* We are never finished in circular mode */
|
||||
more = ADCD1.grpp->circular;
|
||||
}
|
||||
|
||||
if (more) {
|
||||
|
||||
/* Signal half completion in circular mode. */
|
||||
if (ADCD1.grpp->circular &&
|
||||
(adcp->current_index == (adcp->number_of_samples / 2))) {
|
||||
|
||||
_adc_isr_half_code(&ADCD1);
|
||||
}
|
||||
|
||||
/* Skip to the next channel */
|
||||
do {
|
||||
adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK;
|
||||
} while (((1 << adcp->current_channel) & adcp->grpp->channel_mask) == 0);
|
||||
|
||||
/* Enable Interrupt, Select the Channel */
|
||||
adcp->adc->SC1A = ADCx_SC1n_AIEN | ADCx_SC1n_ADCH(adcp->current_channel);
|
||||
}
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level ADC driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void adc_lld_init(void) {
|
||||
|
||||
#if KINETIS_ADC_USE_ADC0
|
||||
/* Driver initialization.*/
|
||||
adcObjectInit(&ADCD1);
|
||||
#endif
|
||||
|
||||
/* The shared vector is initialized on driver initialization and never
|
||||
disabled.*/
|
||||
nvicEnableVector(ADC0_IRQn, KINETIS_ADC_IRQ_PRIORITY);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the ADC peripheral.
|
||||
*
|
||||
* @param[in] adcp pointer to the @p ADCDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void adc_lld_start(ADCDriver *adcp) {
|
||||
|
||||
/* If in stopped state then enables the ADC clock.*/
|
||||
if (adcp->state == ADC_STOP) {
|
||||
SIM->SCGC6 |= SIM_SCGC6_ADC0;
|
||||
|
||||
#if KINETIS_ADC_USE_ADC0
|
||||
if (&ADCD1 == adcp) {
|
||||
adcp->adc = ADC0;
|
||||
if (adcp->config->calibrate) {
|
||||
calibrate(adcp);
|
||||
}
|
||||
}
|
||||
#endif /* KINETIS_ADC_USE_ADC0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the ADC peripheral.
|
||||
*
|
||||
* @param[in] adcp pointer to the @p ADCDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void adc_lld_stop(ADCDriver *adcp) {
|
||||
|
||||
/* If in ready state then disables the ADC clock.*/
|
||||
if (adcp->state == ADC_READY) {
|
||||
SIM->SCGC6 &= ~SIM_SCGC6_ADC0;
|
||||
|
||||
#if KINETIS_ADC_USE_ADC0
|
||||
if (&ADCD1 == adcp) {
|
||||
/* Disable Interrupt, Disable Channel */
|
||||
adcp->adc->SC1A = ADCx_SC1n_ADCH(ADCx_SC1n_ADCH_DISABLED);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts an ADC conversion.
|
||||
*
|
||||
* @param[in] adcp pointer to the @p ADCDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void adc_lld_start_conversion(ADCDriver *adcp) {
|
||||
const ADCConversionGroup *grpp = adcp->grpp;
|
||||
|
||||
/* Enable the Bandgap Buffer if channel mask includes BANDGAP */
|
||||
if (grpp->channel_mask & ADC_BANDGAP) {
|
||||
PMC->REGSC |= PMC_REGSC_BGBE;
|
||||
}
|
||||
|
||||
adcp->number_of_samples = adcp->depth * grpp->num_channels;
|
||||
adcp->current_index = 0;
|
||||
|
||||
/* Skip to the next channel */
|
||||
adcp->current_channel = 0;
|
||||
while (((1 << adcp->current_channel) & grpp->channel_mask) == 0) {
|
||||
adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK;
|
||||
}
|
||||
|
||||
/* Set clock speed and conversion size */
|
||||
adcp->adc->CFG1 = grpp->cfg1;
|
||||
|
||||
/* Set averaging */
|
||||
adcp->adc->SC3 = grpp->sc3;
|
||||
|
||||
/* Enable Interrupt, Select Channel */
|
||||
adcp->adc->SC1A = ADCx_SC1n_AIEN | ADCx_SC1n_ADCH(adcp->current_channel);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stops an ongoing conversion.
|
||||
*
|
||||
* @param[in] adcp pointer to the @p ADCDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void adc_lld_stop_conversion(ADCDriver *adcp) {
|
||||
const ADCConversionGroup *grpp = adcp->grpp;
|
||||
|
||||
/* Disable the Bandgap buffer if channel mask includes BANDGAP */
|
||||
if (grpp->channel_mask & ADC_BANDGAP) {
|
||||
/* Clear BGBE, ACKISO is w1c, avoid setting */
|
||||
PMC->REGSC &= ~(PMC_REGSC_BGBE | PMC_REGSC_ACKISO);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_ADC */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,360 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/LLD/adc_lld.h
|
||||
* @brief KINETIS ADC subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup ADC
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _ADC_LLD_H_
|
||||
#define _ADC_LLD_H_
|
||||
|
||||
#if HAL_USE_ADC || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Absolute Maximum Ratings
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief Minimum ADC clock frequency.
|
||||
*/
|
||||
#define KINETIS_ADCCLK_MIN 600000
|
||||
|
||||
/**
|
||||
* @brief Maximum ADC clock frequency.
|
||||
*/
|
||||
#define KINETIS_ADCCLK_MAX 36000000
|
||||
|
||||
#define ADCx_SC3_AVGS_AVERAGE_4_SAMPLES 0
|
||||
#define ADCx_SC3_AVGS_AVERAGE_8_SAMPLES 1
|
||||
#define ADCx_SC3_AVGS_AVERAGE_16_SAMPLES 2
|
||||
#define ADCx_SC3_AVGS_AVERAGE_32_SAMPLES 3
|
||||
|
||||
#define ADCx_CFG1_ADIV_DIV_1 0
|
||||
#define ADCx_CFG1_ADIV_DIV_2 1
|
||||
#define ADCx_CFG1_ADIV_DIV_4 2
|
||||
#define ADCx_CFG1_ADIV_DIV_8 3
|
||||
|
||||
#define ADCx_CFG1_ADIVCLK_BUS_CLOCK 0
|
||||
#define ADCx_CFG1_ADIVCLK_BUS_CLOCK_DIV_2 1
|
||||
#define ADCx_CFG1_ADIVCLK_BUS_ALTCLK 2
|
||||
#define ADCx_CFG1_ADIVCLK_BUS_ADACK 3
|
||||
|
||||
#define ADCx_CFG1_MODE_8_OR_9_BITS 0
|
||||
#define ADCx_CFG1_MODE_12_OR_13_BITS 1
|
||||
#define ADCx_CFG1_MODE_10_OR_11_BITS 2
|
||||
#define ADCx_CFG1_MODE_16_BITS 3
|
||||
|
||||
#define ADCx_SC1n_ADCH_DAD0 0
|
||||
#define ADCx_SC1n_ADCH_DAD1 1
|
||||
#define ADCx_SC1n_ADCH_DAD2 2
|
||||
#define ADCx_SC1n_ADCH_DAD3 3
|
||||
#define ADCx_SC1n_ADCH_DADP0 0
|
||||
#define ADCx_SC1n_ADCH_DADP1 1
|
||||
#define ADCx_SC1n_ADCH_DADP2 2
|
||||
#define ADCx_SC1n_ADCH_DADP3 3
|
||||
#define ADCx_SC1n_ADCH_AD4 4
|
||||
#define ADCx_SC1n_ADCH_AD5 5
|
||||
#define ADCx_SC1n_ADCH_AD6 6
|
||||
#define ADCx_SC1n_ADCH_AD7 7
|
||||
#define ADCx_SC1n_ADCH_AD8 8
|
||||
#define ADCx_SC1n_ADCH_AD9 9
|
||||
#define ADCx_SC1n_ADCH_AD10 10
|
||||
#define ADCx_SC1n_ADCH_AD11 11
|
||||
#define ADCx_SC1n_ADCH_AD12 12
|
||||
#define ADCx_SC1n_ADCH_AD13 13
|
||||
#define ADCx_SC1n_ADCH_AD14 14
|
||||
#define ADCx_SC1n_ADCH_AD15 15
|
||||
#define ADCx_SC1n_ADCH_AD16 16
|
||||
#define ADCx_SC1n_ADCH_AD17 17
|
||||
#define ADCx_SC1n_ADCH_AD18 18
|
||||
#define ADCx_SC1n_ADCH_AD19 19
|
||||
#define ADCx_SC1n_ADCH_AD20 20
|
||||
#define ADCx_SC1n_ADCH_AD21 21
|
||||
#define ADCx_SC1n_ADCH_AD22 22
|
||||
#define ADCx_SC1n_ADCH_AD23 23
|
||||
#define ADCx_SC1n_ADCH_TEMP_SENSOR 26
|
||||
#define ADCx_SC1n_ADCH_BANDGAP 27
|
||||
#define ADCx_SC1n_ADCH_VREFSH 29
|
||||
#define ADCx_SC1n_ADCH_VREFSL 30
|
||||
#define ADCx_SC1n_ADCH_DISABLED 31
|
||||
|
||||
#define ADC_DAD0 (1 << ADCx_SC1n_ADCH_DAD0)
|
||||
#define ADC_DAD1 (1 << ADCx_SC1n_ADCH_DAD1)
|
||||
#define ADC_DAD2 (1 << ADCx_SC1n_ADCH_DAD2)
|
||||
#define ADC_DAD3 (1 << ADCx_SC1n_ADCH_DAD3)
|
||||
#define ADC_DADP0 (1 << ADCx_SC1n_ADCH_DADP0)
|
||||
#define ADC_DADP1 (1 << ADCx_SC1n_ADCH_DADP1)
|
||||
#define ADC_DADP2 (1 << ADCx_SC1n_ADCH_DADP2)
|
||||
#define ADC_DADP3 (1 << ADCx_SC1n_ADCH_DADP3)
|
||||
#define ADC_AD4 (1 << ADCx_SC1n_ADCH_AD4)
|
||||
#define ADC_AD5 (1 << ADCx_SC1n_ADCH_AD5)
|
||||
#define ADC_AD6 (1 << ADCx_SC1n_ADCH_AD6)
|
||||
#define ADC_AD7 (1 << ADCx_SC1n_ADCH_AD7)
|
||||
#define ADC_AD8 (1 << ADCx_SC1n_ADCH_AD8)
|
||||
#define ADC_AD9 (1 << ADCx_SC1n_ADCH_AD9)
|
||||
#define ADC_AD10 (1 << ADCx_SC1n_ADCH_AD10)
|
||||
#define ADC_AD11 (1 << ADCx_SC1n_ADCH_AD11)
|
||||
#define ADC_AD12 (1 << ADCx_SC1n_ADCH_AD12)
|
||||
#define ADC_AD13 (1 << ADCx_SC1n_ADCH_AD13)
|
||||
#define ADC_AD14 (1 << ADCx_SC1n_ADCH_AD14)
|
||||
#define ADC_AD15 (1 << ADCx_SC1n_ADCH_AD15)
|
||||
#define ADC_AD16 (1 << ADCx_SC1n_ADCH_AD16)
|
||||
#define ADC_AD17 (1 << ADCx_SC1n_ADCH_AD17)
|
||||
#define ADC_AD18 (1 << ADCx_SC1n_ADCH_AD18)
|
||||
#define ADC_AD19 (1 << ADCx_SC1n_ADCH_AD19)
|
||||
#define ADC_AD20 (1 << ADCx_SC1n_ADCH_AD20)
|
||||
#define ADC_AD21 (1 << ADCx_SC1n_ADCH_AD21)
|
||||
#define ADC_AD22 (1 << ADCx_SC1n_ADCH_AD22)
|
||||
#define ADC_AD23 (1 << ADCx_SC1n_ADCH_AD23)
|
||||
#define ADC_TEMP_SENSOR (1 << ADCx_SC1n_ADCH_TEMP_SENSOR)
|
||||
#define ADC_BANDGAP (1 << ADCx_SC1n_ADCH_BANDGAP)
|
||||
#define ADC_VREFSH (1 << ADCx_SC1n_ADCH_VREFSH)
|
||||
#define ADC_VREFSL (1 << ADCx_SC1n_ADCH_VREFSL)
|
||||
#define ADC_DISABLED (1 << ADCx_SC1n_ADCH_DISABLED)
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief ADC1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for ADC1 is included.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#if !defined(KINETIS_ADC_USE_ADC0) || defined(__DOXYGEN__)
|
||||
#define KINETIS_ADC_USE_ADC0 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief ADC interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_ADC_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_ADC_IRQ_PRIORITY 5
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_ADC_USE_ADC0 && !KINETIS_HAS_ADC0
|
||||
#error "ADC1 not present in the selected device"
|
||||
#endif
|
||||
|
||||
#if !KINETIS_ADC_USE_ADC0
|
||||
#error "ADC driver activated but no ADC peripheral assigned"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief ADC sample data type.
|
||||
*/
|
||||
typedef uint16_t adcsample_t;
|
||||
|
||||
/**
|
||||
* @brief Channels number in a conversion group.
|
||||
*/
|
||||
typedef uint16_t adc_channels_num_t;
|
||||
|
||||
/**
|
||||
* @brief Possible ADC failure causes.
|
||||
* @note Error codes are architecture dependent and should not relied
|
||||
* upon.
|
||||
*/
|
||||
typedef enum {
|
||||
ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */
|
||||
ADC_ERR_OVERFLOW = 1 /**< ADC overflow condition. */
|
||||
} adcerror_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing an ADC driver.
|
||||
*/
|
||||
typedef struct ADCDriver ADCDriver;
|
||||
|
||||
/**
|
||||
* @brief ADC notification callback type.
|
||||
*
|
||||
* @param[in] adcp pointer to the @p ADCDriver object triggering the
|
||||
* callback
|
||||
* @param[in] buffer pointer to the most recent samples data
|
||||
* @param[in] n number of buffer rows available starting from @p buffer
|
||||
*/
|
||||
typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n);
|
||||
|
||||
/**
|
||||
* @brief ADC error callback type.
|
||||
*
|
||||
* @param[in] adcp pointer to the @p ADCDriver object triggering the
|
||||
* callback
|
||||
* @param[in] err ADC error code
|
||||
*/
|
||||
typedef void (*adcerrorcallback_t)(ADCDriver *adcp, adcerror_t err);
|
||||
|
||||
/**
|
||||
* @brief Conversion group configuration structure.
|
||||
* @details This implementation-dependent structure describes a conversion
|
||||
* operation.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Enables the circular buffer mode for the group.
|
||||
*/
|
||||
bool circular;
|
||||
/**
|
||||
* @brief Number of the analog channels belonging to the conversion group.
|
||||
*/
|
||||
adc_channels_num_t num_channels;
|
||||
/**
|
||||
* @brief Callback function associated to the group or @p NULL.
|
||||
*/
|
||||
adccallback_t end_cb;
|
||||
/**
|
||||
* @brief Error callback or @p NULL.
|
||||
*/
|
||||
adcerrorcallback_t error_cb;
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief Bitmask of channels for ADC conversion.
|
||||
*/
|
||||
uint32_t channel_mask;
|
||||
/**
|
||||
* @brief ADC CFG1 register initialization data.
|
||||
* @note All the required bits must be defined into this field.
|
||||
*/
|
||||
uint32_t cfg1;
|
||||
/**
|
||||
* @brief ADC SC3 register initialization data.
|
||||
* @note All the required bits must be defined into this field.
|
||||
*/
|
||||
uint32_t sc3;
|
||||
} ADCConversionGroup;
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
* @note It could be empty on some architectures.
|
||||
*/
|
||||
typedef struct {
|
||||
/* Perform first time calibration */
|
||||
bool calibrate;
|
||||
} ADCConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing an ADC driver.
|
||||
*/
|
||||
struct ADCDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
adcstate_t state;
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const ADCConfig *config;
|
||||
/**
|
||||
* @brief Current samples buffer pointer or @p NULL.
|
||||
*/
|
||||
adcsample_t *samples;
|
||||
/**
|
||||
* @brief Current samples buffer depth or @p 0.
|
||||
*/
|
||||
size_t depth;
|
||||
/**
|
||||
* @brief Current conversion group pointer or @p NULL.
|
||||
*/
|
||||
const ADCConversionGroup *grpp;
|
||||
#if ADC_USE_WAIT || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Waiting thread.
|
||||
*/
|
||||
thread_reference_t thread;
|
||||
#endif
|
||||
#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Mutex protecting the peripheral.
|
||||
*/
|
||||
mutex_t mutex;
|
||||
#endif /* ADC_USE_MUTUAL_EXCLUSION */
|
||||
#if defined(ADC_DRIVER_EXT_FIELDS)
|
||||
ADC_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief Pointer to the ADCx registers block.
|
||||
*/
|
||||
ADC_TypeDef *adc;
|
||||
/**
|
||||
* @brief Number of samples expected.
|
||||
*/
|
||||
size_t number_of_samples;
|
||||
/**
|
||||
* @brief Current position in the buffer.
|
||||
*/
|
||||
size_t current_index;
|
||||
/**
|
||||
* @brief Current channel index into group channel_mask.
|
||||
*/
|
||||
size_t current_channel;
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_ADC_USE_ADC0 && !defined(__DOXYGEN__)
|
||||
extern ADCDriver ADCD1;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void adc_lld_init(void);
|
||||
void adc_lld_start(ADCDriver *adcp);
|
||||
void adc_lld_stop(ADCDriver *adcp);
|
||||
void adc_lld_start_conversion(ADCDriver *adcp);
|
||||
void adc_lld_stop_conversion(ADCDriver *adcp);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_ADC */
|
||||
|
||||
#endif /* _ADC_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,361 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/LLD/ext_lld.c
|
||||
* @brief KINETIS EXT subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup EXT
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_EXT || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define PCR_IRQC_DISABLED 0x0
|
||||
#define PCR_IRQC_DMA_RISING_EDGE 0x1
|
||||
#define PCR_IRQC_DMA_FALLING_EDGE 0x2
|
||||
#define PCR_IRQC_DMA_EITHER_EDGE 0x3
|
||||
|
||||
#define PCR_IRQC_LOGIC_ZERO 0x8
|
||||
#define PCR_IRQC_RISING_EDGE 0x9
|
||||
#define PCR_IRQC_FALLING_EDGE 0xA
|
||||
#define PCR_IRQC_EITHER_EDGE 0xB
|
||||
#define PCR_IRQC_LOGIC_ONE 0xC
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief EXTD1 driver identifier.
|
||||
*/
|
||||
EXTDriver EXTD1;
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* A channel map for each channel.
|
||||
*
|
||||
* The index is the pin number.
|
||||
* The result is the channel for that pin.
|
||||
*/
|
||||
#if KINETIS_EXT_PORTA_WIDTH > 0
|
||||
uint8_t porta_channel_map[KINETIS_EXT_PORTA_WIDTH];
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTB_WIDTH > 0
|
||||
uint8_t portb_channel_map[KINETIS_EXT_PORTB_WIDTH];
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTC_WIDTH > 0
|
||||
uint8_t portc_channel_map[KINETIS_EXT_PORTC_WIDTH];
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTD_WIDTH > 0
|
||||
uint8_t portd_channel_map[KINETIS_EXT_PORTD_WIDTH];
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTE_WIDTH > 0
|
||||
uint8_t porte_channel_map[KINETIS_EXT_PORTE_WIDTH];
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables EXTI IRQ sources.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static void ext_lld_exti_irq_enable(void) {
|
||||
|
||||
#if KINETIS_EXT_PORTA_WIDTH > 0
|
||||
nvicEnableVector(PINA_IRQn, KINETIS_EXT_PORTA_IRQ_PRIORITY);
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTB_WIDTH > 0
|
||||
nvicEnableVector(PINB_IRQn, KINETIS_EXT_PORTB_IRQ_PRIORITY);
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTC_WIDTH > 0
|
||||
nvicEnableVector(PINC_IRQn, KINETIS_EXT_PORTC_IRQ_PRIORITY);
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTD_WIDTH > 0
|
||||
nvicEnableVector(PIND_IRQn, KINETIS_EXT_PORTD_IRQ_PRIORITY);
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTE_WIDTH > 0
|
||||
nvicEnableVector(PINE_IRQn, KINETIS_EXT_PORTE_IRQ_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables EXTI IRQ sources.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
static void ext_lld_exti_irq_disable(void) {
|
||||
|
||||
#if KINETIS_EXT_PORTA_WIDTH > 0
|
||||
nvicDisableVector(PINA_IRQn);
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTB_WIDTH > 0
|
||||
nvicDisableVector(PINB_IRQn);
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTC_WIDTH > 0
|
||||
nvicDisableVector(PINC_IRQn);
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTD_WIDTH > 0
|
||||
nvicDisableVector(PIND_IRQn);
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTE_WIDTH > 0
|
||||
nvicDisableVector(PINE_IRQn);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*
|
||||
* Generic interrupt handler.
|
||||
*/
|
||||
static inline void irq_handler(PORT_TypeDef * const port, const unsigned port_width, const uint8_t *channel_map) {
|
||||
unsigned pin;
|
||||
uint32_t isfr = port->ISFR;
|
||||
|
||||
/* Clear all pending interrupts on this port. */
|
||||
port->ISFR = 0xFFFFFFFF;
|
||||
|
||||
for (pin = 0; pin < port_width; pin++) {
|
||||
if (isfr & (1 << pin)) {
|
||||
expchannel_t channel = channel_map[pin];
|
||||
EXTD1.config->channels[channel].cb(&EXTD1, channel);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief PORTA interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
#if defined(KINETIS_PORTA_IRQ_VECTOR) && KINETIS_EXT_PORTA_WIDTH > 0
|
||||
OSAL_IRQ_HANDLER(KINETIS_PORTA_IRQ_VECTOR) {
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
irq_handler(PORTA, KINETIS_EXT_PORTA_WIDTH, porta_channel_map);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_EXT_PORTA_WIDTH > 0 */
|
||||
|
||||
/**
|
||||
* @brief PORTB interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
#if defined(KINETIS_PORTB_IRQ_VECTOR) && KINETIS_EXT_PORTB_WIDTH > 0
|
||||
OSAL_IRQ_HANDLER(KINETIS_PORTB_IRQ_VECTOR) {
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
irq_handler(PORTB, KINETIS_EXT_PORTB_WIDTH, portb_channel_map);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_EXT_PORTB_WIDTH > 0 */
|
||||
|
||||
/**
|
||||
* @brief PORTC interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
#if defined(KINETIS_PORTC_IRQ_VECTOR) && KINETIS_EXT_PORTC_WIDTH > 0
|
||||
OSAL_IRQ_HANDLER(KINETIS_PORTC_IRQ_VECTOR) {
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
irq_handler(PORTC, KINETIS_EXT_PORTC_WIDTH, portc_channel_map);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_EXT_PORTC_WIDTH > 0 */
|
||||
|
||||
/**
|
||||
* @brief PORTD interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
#if defined(KINETIS_PORTD_IRQ_VECTOR) && KINETIS_EXT_PORTD_WIDTH > 0
|
||||
OSAL_IRQ_HANDLER(KINETIS_PORTD_IRQ_VECTOR) {
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
irq_handler(PORTD, KINETIS_EXT_PORTD_WIDTH, portd_channel_map);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_EXT_PORTD_WIDTH > 0 */
|
||||
|
||||
/**
|
||||
* @brief PORTE interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
#if defined(KINETIS_PORTE_IRQ_VECTOR) && KINETIS_EXT_PORTE_WIDTH > 0
|
||||
OSAL_IRQ_HANDLER(KINETIS_PORTE_IRQ_VECTOR) {
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
irq_handler(PORTE, KINETIS_EXT_PORTE_WIDTH, porte_channel_map);
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* KINETIS_EXT_PORTE_WIDTH > 0 */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level EXT driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void ext_lld_init(void) {
|
||||
|
||||
/* Driver initialization.*/
|
||||
extObjectInit(&EXTD1);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the EXT peripheral.
|
||||
*
|
||||
* @param[in] extp pointer to the @p EXTDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void ext_lld_start(EXTDriver *extp) {
|
||||
expchannel_t channel;
|
||||
|
||||
if (extp->state == EXT_STOP)
|
||||
ext_lld_exti_irq_enable();
|
||||
|
||||
/* Configuration of automatic channels.*/
|
||||
for (channel = 0; channel < EXT_MAX_CHANNELS; channel++) {
|
||||
|
||||
uint32_t mode = extp->config->channels[channel].mode;
|
||||
PORT_TypeDef *port = extp->config->channels[channel].port;
|
||||
uint32_t pin = extp->config->channels[channel].pin;
|
||||
|
||||
/* Initialize the channel map */
|
||||
#if KINETIS_EXT_PORTA_WIDTH > 0
|
||||
if (port == PORTA)
|
||||
porta_channel_map[pin] = channel;
|
||||
else
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTB_WIDTH > 0
|
||||
if (port == PORTB)
|
||||
portb_channel_map[pin] = channel;
|
||||
else
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTC_WIDTH > 0
|
||||
if (port == PORTC)
|
||||
portc_channel_map[pin] = channel;
|
||||
else
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTD_WIDTH > 0
|
||||
if (port == PORTD)
|
||||
portd_channel_map[pin] = channel;
|
||||
else
|
||||
#endif
|
||||
#if KINETIS_EXT_PORTE_WIDTH > 0
|
||||
if (port == PORTE)
|
||||
porte_channel_map[pin] = channel;
|
||||
else
|
||||
#endif
|
||||
{}
|
||||
|
||||
if (mode & EXT_CH_MODE_AUTOSTART)
|
||||
ext_lld_channel_enable(extp, channel);
|
||||
else if (port != NULL)
|
||||
ext_lld_channel_disable(extp, channel);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the EXT peripheral.
|
||||
*
|
||||
* @param[in] extp pointer to the @p EXTDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void ext_lld_stop(EXTDriver *extp) {
|
||||
|
||||
if (extp->state == EXT_ACTIVE)
|
||||
ext_lld_exti_irq_disable();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables an EXT channel.
|
||||
*
|
||||
* @param[in] extp pointer to the @p EXTDriver object
|
||||
* @param[in] channel channel to be enabled
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) {
|
||||
|
||||
uint32_t irqc;
|
||||
uint32_t mode = extp->config->channels[channel].mode;
|
||||
if (mode & EXT_CH_MODE_RISING_EDGE)
|
||||
irqc = PCR_IRQC_RISING_EDGE;
|
||||
else if (extp->config->channels[channel].mode & EXT_CH_MODE_FALLING_EDGE)
|
||||
irqc = PCR_IRQC_FALLING_EDGE;
|
||||
else if (extp->config->channels[channel].mode & EXT_CH_MODE_BOTH_EDGES)
|
||||
irqc = PCR_IRQC_EITHER_EDGE;
|
||||
else
|
||||
irqc = PCR_IRQC_DISABLED;
|
||||
|
||||
PORT_TypeDef *port = extp->config->channels[channel].port;
|
||||
uint32_t pin = extp->config->channels[channel].pin;
|
||||
|
||||
uint32_t pcr = port->PCR[pin];
|
||||
|
||||
/* Clear all the IRQC bits */
|
||||
pcr &= ~PORTx_PCRn_IRQC_MASK;
|
||||
/* Set the required IRQC bits */
|
||||
pcr |= PORTx_PCRn_IRQC(irqc);
|
||||
|
||||
port->PCR[pin] = pcr;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disables an EXT channel.
|
||||
*
|
||||
* @param[in] extp pointer to the @p EXTDriver object
|
||||
* @param[in] channel channel to be disabled
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) {
|
||||
|
||||
PORT_TypeDef *port = extp->config->channels[channel].port;
|
||||
uint32_t pin = extp->config->channels[channel].pin;
|
||||
port->PCR[pin] |= PORTx_PCRn_IRQC(PCR_IRQC_DISABLED);
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_EXT */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,188 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/LLD/ext_lld.h
|
||||
* @brief KINETIS EXT subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup EXT
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _EXT_LLD_H_
|
||||
#define _EXT_LLD_H_
|
||||
|
||||
#if HAL_USE_EXT || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of EXT channels required.
|
||||
*/
|
||||
#define EXT_MAX_CHANNELS KINETIS_EXTI_NUM_CHANNELS
|
||||
|
||||
/**
|
||||
* @name KINETIS-specific EXT channel modes
|
||||
* @{
|
||||
*/
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief PORTA interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_EXT_PORTA_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_EXT_PORTA_IRQ_PRIORITY 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PORTB interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_EXT_PORTB_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_EXT_PORTB_IRQ_PRIORITY 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PORTC interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_EXT_PORTC_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_EXT_PORTC_IRQ_PRIORITY 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PORTD interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_EXT_PORTD_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_EXT_PORTD_IRQ_PRIORITY 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PORTE interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(KINETIS_EXT_PORTE_IRQ_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define KINETIS_EXT_PORTE_IRQ_PRIORITY 3
|
||||
#endif
|
||||
/** @} */
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief EXT channel identifier.
|
||||
*/
|
||||
typedef uint32_t expchannel_t;
|
||||
|
||||
/**
|
||||
* @brief Type of an EXT generic notification callback.
|
||||
*
|
||||
* @param[in] extp pointer to the @p EXPDriver object triggering the
|
||||
* callback
|
||||
*/
|
||||
typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel);
|
||||
|
||||
/**
|
||||
* @brief Channel configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Channel mode.
|
||||
*/
|
||||
uint32_t mode;
|
||||
/**
|
||||
* @brief Channel callback.
|
||||
*/
|
||||
extcallback_t cb;
|
||||
|
||||
/**
|
||||
* @brief Port.
|
||||
*/
|
||||
PORT_TypeDef *port;
|
||||
|
||||
/**
|
||||
* @brief Pin.
|
||||
*/
|
||||
uint32_t pin;
|
||||
} EXTChannelConfig;
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
* @note It could be empty on some architectures.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Channel configurations.
|
||||
*/
|
||||
EXTChannelConfig channels[EXT_MAX_CHANNELS];
|
||||
/* End of the mandatory fields.*/
|
||||
} EXTConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing an EXT driver.
|
||||
*/
|
||||
struct EXTDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
extstate_t state;
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const EXTConfig *config;
|
||||
/* End of the mandatory fields.*/
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern EXTDriver EXTD1;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void ext_lld_init(void);
|
||||
void ext_lld_start(EXTDriver *extp);
|
||||
void ext_lld_stop(EXTDriver *extp);
|
||||
void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel);
|
||||
void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_EXT */
|
||||
|
||||
#endif /* _EXT_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,415 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/i2c_lld.c
|
||||
* @brief KINETIS I2C subsystem low level driver source.
|
||||
*
|
||||
* @addtogroup I2C
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "osal.h"
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_I2C || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief I2C0 driver identifier.
|
||||
*/
|
||||
#if KINETIS_I2C_USE_I2C0 || defined(__DOXYGEN__)
|
||||
I2CDriver I2CD1;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C1 driver identifier.
|
||||
*/
|
||||
#if KINETIS_I2C_USE_I2C1 || defined(__DOXYGEN__)
|
||||
I2CDriver I2CD2;
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
void config_frequency(I2CDriver *i2cp) {
|
||||
|
||||
/* Each index in the table corresponds to a a frequency
|
||||
* divider used to generate the SCL clock from the main
|
||||
* system clock.
|
||||
*/
|
||||
uint16_t icr_table[] = {
|
||||
/* 0x00 - 0x0F */
|
||||
20,22,24,26,28,30,34,40,28,32,36,40,44,48,56,68,
|
||||
/* 0x10 - 0x1F */
|
||||
48,56,64,72,80,88,104,128,80,96,112,128,144,160,192,240,
|
||||
/* 0x20 - 0x2F */
|
||||
160,192,224,256,288,320,384,480,320,384,448,512,576,640,768,960,
|
||||
/* 0x30 - 0x3F */
|
||||
640,768,896,1024,1152,1280,1536,1920,1280,1536,1792,2048,2304,2560,3072,3840,
|
||||
};
|
||||
|
||||
int length = sizeof(icr_table) / sizeof(icr_table[0]);
|
||||
uint16_t divisor;
|
||||
uint8_t i = 0, index = 0;
|
||||
uint16_t best, diff;
|
||||
|
||||
if (i2cp->config != NULL)
|
||||
divisor = KINETIS_SYSCLK_FREQUENCY / i2cp->config->clock;
|
||||
else
|
||||
divisor = KINETIS_SYSCLK_FREQUENCY / 100000;
|
||||
|
||||
best = ~0;
|
||||
index = 0;
|
||||
/* Tries to find the SCL clock which is the closest
|
||||
* approximation to the clock passed in config. To
|
||||
* stay on the safe side, only values that generate
|
||||
* lower frequency are used.
|
||||
*/
|
||||
for (i = 0; i < length; i++) {
|
||||
if (icr_table[i] >= divisor) {
|
||||
diff = icr_table[i] - divisor;
|
||||
if (diff < best) {
|
||||
best = diff;
|
||||
index = i;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
i2cp->i2c->F = index;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Common IRQ handler.
|
||||
* @note Tries hard to clear all the pending interrupt sources, we don't
|
||||
* want to go through the whole ISR and have another interrupt soon
|
||||
* after.
|
||||
*
|
||||
* @param[in] i2cp pointer to an I2CDriver
|
||||
*/
|
||||
static void serve_interrupt(I2CDriver *i2cp) {
|
||||
|
||||
I2C_TypeDef *i2c = i2cp->i2c;
|
||||
intstate_t state = i2cp->intstate;
|
||||
|
||||
if (i2c->S & I2Cx_S_ARBL) {
|
||||
|
||||
i2cp->errors |= I2C_ARBITRATION_LOST;
|
||||
i2c->S |= I2Cx_S_ARBL;
|
||||
|
||||
} else if (state == STATE_SEND) {
|
||||
|
||||
if (i2c->S & I2Cx_S_RXAK)
|
||||
i2cp->errors |= I2C_ACK_FAILURE;
|
||||
else if (i2cp->txbuf != NULL && i2cp->txidx < i2cp->txbytes)
|
||||
i2c->D = i2cp->txbuf[i2cp->txidx++];
|
||||
else
|
||||
i2cp->intstate = STATE_STOP;
|
||||
|
||||
} else if (state == STATE_DUMMY) {
|
||||
|
||||
if (i2c->S & I2Cx_S_RXAK)
|
||||
i2cp->errors |= I2C_ACK_FAILURE;
|
||||
else {
|
||||
i2c->C1 &= ~I2Cx_C1_TX;
|
||||
|
||||
if (i2cp->rxbytes > 1)
|
||||
i2c->C1 &= ~I2Cx_C1_TXAK;
|
||||
else
|
||||
i2c->C1 |= I2Cx_C1_TXAK;
|
||||
(void) i2c->D;
|
||||
i2cp->intstate = STATE_RECV;
|
||||
}
|
||||
|
||||
} else if (state == STATE_RECV) {
|
||||
|
||||
if (i2cp->rxbytes > 1) {
|
||||
if (i2cp->rxidx == (i2cp->rxbytes - 2))
|
||||
i2c->C1 |= I2Cx_C1_TXAK;
|
||||
else
|
||||
i2c->C1 &= ~I2Cx_C1_TXAK;
|
||||
}
|
||||
|
||||
if (i2cp->rxidx == i2cp->rxbytes - 1)
|
||||
i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST);
|
||||
|
||||
i2cp->rxbuf[i2cp->rxidx++] = i2c->D;
|
||||
|
||||
if (i2cp->rxidx == i2cp->rxbytes)
|
||||
i2cp->intstate = STATE_STOP;
|
||||
}
|
||||
|
||||
/* Reset interrupt flag */
|
||||
i2c->S |= I2Cx_S_IICIF;
|
||||
|
||||
if (i2cp->errors != I2C_NO_ERROR)
|
||||
_i2c_wakeup_error_isr(i2cp);
|
||||
|
||||
if (i2cp->intstate == STATE_STOP)
|
||||
_i2c_wakeup_isr(i2cp);
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if KINETIS_I2C_USE_I2C0 || defined(__DOXYGEN__)
|
||||
|
||||
OSAL_IRQ_HANDLER(KINETIS_I2C0_IRQ_VECTOR) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
serve_interrupt(&I2CD1);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if KINETIS_I2C_USE_I2C1 || defined(__DOXYGEN__)
|
||||
|
||||
/* FIXME: KL2x has I2C1 on Vector64; K2x don't have I2C1! */
|
||||
OSAL_IRQ_HANDLER(Vector64) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
serve_interrupt(&I2CD2);
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Low level I2C driver initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void i2c_lld_init(void) {
|
||||
|
||||
#if KINETIS_I2C_USE_I2C0
|
||||
i2cObjectInit(&I2CD1);
|
||||
I2CD1.thread = NULL;
|
||||
I2CD1.i2c = I2C0;
|
||||
#endif
|
||||
|
||||
#if KINETIS_I2C_USE_I2C1
|
||||
i2cObjectInit(&I2CD2);
|
||||
I2CD2.thread = NULL;
|
||||
I2CD2.i2c = I2C1;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures and activates the I2C peripheral.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void i2c_lld_start(I2CDriver *i2cp) {
|
||||
|
||||
if (i2cp->state == I2C_STOP) {
|
||||
|
||||
/* TODO:
|
||||
* The PORT must be enabled somewhere. The PIN multiplexer
|
||||
* will map the I2C functionality to some PORT which must
|
||||
* than be enabled. The easier way is enabling all PORTs at
|
||||
* startup, which is currently being done in __early_init.
|
||||
*/
|
||||
|
||||
#if KINETIS_I2C_USE_I2C0
|
||||
if (&I2CD1 == i2cp) {
|
||||
SIM->SCGC4 |= SIM_SCGC4_I2C0;
|
||||
nvicEnableVector(I2C0_IRQn, KINETIS_I2C_I2C0_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_I2C_USE_I2C1
|
||||
if (&I2CD2 == i2cp) {
|
||||
SIM->SCGC4 |= SIM_SCGC4_I2C1;
|
||||
nvicEnableVector(I2C1_IRQn, KINETIS_I2C_I2C1_PRIORITY);
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
config_frequency(i2cp);
|
||||
i2cp->i2c->C1 |= I2Cx_C1_IICEN | I2Cx_C1_IICIE;
|
||||
i2cp->intstate = STATE_STOP;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Deactivates the I2C peripheral.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void i2c_lld_stop(I2CDriver *i2cp) {
|
||||
|
||||
if (i2cp->state != I2C_STOP) {
|
||||
|
||||
i2cp->i2c->C1 &= ~(I2Cx_C1_IICEN | I2Cx_C1_IICIE);
|
||||
|
||||
#if KINETIS_I2C_USE_I2C0
|
||||
if (&I2CD1 == i2cp) {
|
||||
SIM->SCGC4 &= ~SIM_SCGC4_I2C0;
|
||||
nvicDisableVector(I2C0_IRQn);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if KINETIS_I2C_USE_I2C1
|
||||
if (&I2CD2 == i2cp) {
|
||||
SIM->SCGC4 &= ~SIM_SCGC4_I2C1;
|
||||
nvicDisableVector(I2C1_IRQn);
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr,
|
||||
const uint8_t *txbuf, size_t txbytes,
|
||||
uint8_t *rxbuf, size_t rxbytes,
|
||||
systime_t timeout) {
|
||||
|
||||
(void)timeout;
|
||||
msg_t msg;
|
||||
|
||||
uint8_t op = (i2cp->intstate == STATE_SEND) ? 0 : 1;
|
||||
|
||||
i2cp->errors = I2C_NO_ERROR;
|
||||
i2cp->addr = addr;
|
||||
|
||||
i2cp->txbuf = txbuf;
|
||||
i2cp->txbytes = txbytes;
|
||||
i2cp->txidx = 0;
|
||||
|
||||
i2cp->rxbuf = rxbuf;
|
||||
i2cp->rxbytes = rxbytes;
|
||||
i2cp->rxidx = 0;
|
||||
|
||||
/* send START */
|
||||
i2cp->i2c->C1 |= I2Cx_C1_MST;
|
||||
i2cp->i2c->C1 |= I2Cx_C1_TX;
|
||||
|
||||
/* FIXME: should not use busy waiting! */
|
||||
while (!(i2cp->i2c->S & I2Cx_S_BUSY));
|
||||
|
||||
i2cp->i2c->D = addr << 1 | op;
|
||||
|
||||
msg = osalThreadSuspendTimeoutS(&i2cp->thread, TIME_INFINITE);
|
||||
|
||||
/* FIXME */
|
||||
//if (i2cp->i2c->S & I2Cx_S_RXAK)
|
||||
// i2cp->errors |= I2C_ACK_FAILURE;
|
||||
|
||||
if (msg == MSG_OK && txbuf != NULL && rxbuf != NULL) {
|
||||
i2cp->i2c->C1 |= I2Cx_C1_RSTA;
|
||||
/* FIXME */
|
||||
while (!(i2cp->i2c->S & I2Cx_S_BUSY));
|
||||
|
||||
i2cp->intstate = STATE_DUMMY;
|
||||
i2cp->i2c->D = i2cp->addr << 1 | 1;
|
||||
|
||||
msg = osalThreadSuspendTimeoutS(&i2cp->thread, TIME_INFINITE);
|
||||
}
|
||||
|
||||
i2cp->i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST);
|
||||
/* FIXME */
|
||||
while (i2cp->i2c->S & I2Cx_S_BUSY);
|
||||
|
||||
return msg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Receives data via the I2C bus as master.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] addr slave device address
|
||||
* @param[out] rxbuf pointer to the receive buffer
|
||||
* @param[in] rxbytes number of bytes to be received
|
||||
* @param[in] timeout the number of ticks before the operation timeouts,
|
||||
* the following special values are allowed:
|
||||
* - @a TIME_INFINITE no timeout.
|
||||
* .
|
||||
* @return The operation status.
|
||||
* @retval MSG_OK if the function succeeded.
|
||||
* @retval MSG_RESET if one or more I2C errors occurred, the errors can
|
||||
* be retrieved using @p i2cGetErrors().
|
||||
* @retval MSG_TIMEOUT if a timeout occurred before operation end. <b>After a
|
||||
* timeout the driver must be stopped and restarted
|
||||
* because the bus is in an uncertain state</b>.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
|
||||
uint8_t *rxbuf, size_t rxbytes,
|
||||
systime_t timeout) {
|
||||
|
||||
i2cp->intstate = STATE_DUMMY;
|
||||
return _i2c_txrx_timeout(i2cp, addr, NULL, 0, rxbuf, rxbytes, timeout);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Transmits data via the I2C bus as master.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
* @param[in] addr slave device address
|
||||
* @param[in] txbuf pointer to the transmit buffer
|
||||
* @param[in] txbytes number of bytes to be transmitted
|
||||
* @param[out] rxbuf pointer to the receive buffer
|
||||
* @param[in] rxbytes number of bytes to be received
|
||||
* @param[in] timeout the number of ticks before the operation timeouts,
|
||||
* the following special values are allowed:
|
||||
* - @a TIME_INFINITE no timeout.
|
||||
* .
|
||||
* @return The operation status.
|
||||
* @retval MSG_OK if the function succeeded.
|
||||
* @retval MSG_RESET if one or more I2C errors occurred, the errors can
|
||||
* be retrieved using @p i2cGetErrors().
|
||||
* @retval MSG_TIMEOUT if a timeout occurred before operation end. <b>After a
|
||||
* timeout the driver must be stopped and restarted
|
||||
* because the bus is in an uncertain state</b>.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
|
||||
const uint8_t *txbuf, size_t txbytes,
|
||||
uint8_t *rxbuf, size_t rxbytes,
|
||||
systime_t timeout) {
|
||||
|
||||
i2cp->intstate = STATE_SEND;
|
||||
return _i2c_txrx_timeout(i2cp, addr, txbuf, txbytes, rxbuf, rxbytes, timeout);
|
||||
}
|
||||
|
||||
#endif /* HAL_USE_I2C */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,208 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014-2015 Fabio Utzig
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file KINETIS/i2c_lld.h
|
||||
* @brief KINETIS I2C subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup I2C
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _I2C_LLD_H_
|
||||
#define _I2C_LLD_H_
|
||||
|
||||
#if HAL_USE_I2C || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#define STATE_STOP 0x00
|
||||
#define STATE_SEND 0x01
|
||||
#define STATE_RECV 0x02
|
||||
#define STATE_DUMMY 0x03
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief I2C0 driver enable switch.
|
||||
* @details If set to @p TRUE the support for I2C0 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(KINETIS_I2C_USE_I2C0) || defined(__DOXYGEN__)
|
||||
#define KINETIS_I2C_USE_I2C0 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for I2C1 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(KINETIS_I2C_USE_I2C1) || defined(__DOXYGEN__)
|
||||
#define KINETIS_I2C_USE_I2C1 FALSE
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* @brief Type representing I2C address. */
|
||||
typedef uint8_t i2caddr_t;
|
||||
|
||||
/* @brief Type of I2C Driver condition flags. */
|
||||
typedef uint32_t i2cflags_t;
|
||||
|
||||
/* @brief Type used to control the ISR state machine. */
|
||||
typedef uint8_t intstate_t;
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
* @note Implementations may extend this structure to contain more,
|
||||
* architecture dependent, fields.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
|
||||
/* @brief Clock to be used for the I2C bus. */
|
||||
uint32_t clock;
|
||||
|
||||
} I2CConfig;
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing an I2C driver.
|
||||
*/
|
||||
typedef struct I2CDriver I2CDriver;
|
||||
|
||||
/**
|
||||
* @brief Structure representing an I2C driver.
|
||||
*/
|
||||
struct I2CDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
i2cstate_t state;
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const I2CConfig *config;
|
||||
/**
|
||||
* @brief Error flags.
|
||||
*/
|
||||
i2cflags_t errors;
|
||||
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
|
||||
#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Mutex protecting the bus.
|
||||
*/
|
||||
mutex_t mutex;
|
||||
#elif CH_CFG_USE_SEMAPHORES
|
||||
semaphore_t semaphore;
|
||||
#endif
|
||||
#endif /* I2C_USE_MUTUAL_EXCLUSION */
|
||||
#if defined(I2C_DRIVER_EXT_FIELDS)
|
||||
I2C_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* @brief Thread waiting for I/O completion. */
|
||||
thread_reference_t thread;
|
||||
/* @brief Current slave address without R/W bit. */
|
||||
i2caddr_t addr;
|
||||
|
||||
/* End of the mandatory fields.*/
|
||||
|
||||
/* @brief Pointer to the buffer with data to send. */
|
||||
const uint8_t *txbuf;
|
||||
/* @brief Number of bytes of data to send. */
|
||||
size_t txbytes;
|
||||
/* @brief Current index in buffer when sending data. */
|
||||
size_t txidx;
|
||||
/* @brief Pointer to the buffer to put received data. */
|
||||
uint8_t *rxbuf;
|
||||
/* @brief Number of bytes of data to receive. */
|
||||
size_t rxbytes;
|
||||
/* @brief Current index in buffer when receiving data. */
|
||||
size_t rxidx;
|
||||
/* @brief Tracks current ISR state. */
|
||||
intstate_t intstate;
|
||||
/* @brief Low-level register access. */
|
||||
I2C_TypeDef *i2c;
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Get errors from I2C driver.
|
||||
*
|
||||
* @param[in] i2cp pointer to the @p I2CDriver object
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define i2c_lld_get_errors(i2cp) ((i2cp)->errors)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
#if KINETIS_I2C_USE_I2C0
|
||||
extern I2CDriver I2CD1;
|
||||
#endif
|
||||
|
||||
#if KINETIS_I2C_USE_I2C1
|
||||
extern I2CDriver I2CD2;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void i2c_lld_init(void);
|
||||
void i2c_lld_start(I2CDriver *i2cp);
|
||||
void i2c_lld_stop(I2CDriver *i2cp);
|
||||
msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
|
||||
const uint8_t *txbuf, size_t txbytes,
|
||||
uint8_t *rxbuf, size_t rxbytes,
|
||||
systime_t timeout);
|
||||
msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
|
||||
uint8_t *rxbuf, size_t rxbytes,
|
||||
systime_t timeout);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_I2C */
|
||||
|
||||
#endif /* _I2C_LLD_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="0.747687884">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.747687884" moduleId="org.eclipse.cdt.core.settings" name="Default">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration buildProperties="" description="" id="0.747687884" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
|
||||
<folderInfo id="0.747687884." name="/" resourcePath="">
|
||||
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.11066026" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
|
||||
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.11066026.1166893629" name=""/>
|
||||
<builder id="org.eclipse.cdt.build.core.settings.default.builder.1831380856" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1419137561" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1364315252" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.718372197" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.479764409" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.754184888" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.852559462" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.937950678" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
<tool id="org.eclipse.cdt.build.core.settings.holder.1605316565" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
|
||||
<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.363143178" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"/>
|
||||
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1077140712" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="RT-FREEDOM-KL25Z-ADC.null.299384367" name="RT-FREEDOM-KL25Z-ADC"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="0.747687884">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="refreshScope"/>
|
||||
</cproject>
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>RT-FREEDOM-KL25Z-ADC</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.core.ccnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
|
|
@ -0,0 +1,205 @@
|
|||
##############################################################################
|
||||
# Build global options
|
||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
|
||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
|
||||
USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||
endif
|
||||
|
||||
# C specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_COPT),)
|
||||
USE_COPT = -std=gnu99
|
||||
endif
|
||||
|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
|
||||
USE_CPPOPT = -fno-rtti
|
||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data
|
||||
ifeq ($(USE_LINK_GC),)
|
||||
USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# Linker extra options here.
|
||||
ifeq ($(USE_LDOPT),)
|
||||
USE_LDOPT =
|
||||
endif
|
||||
|
||||
# Enable this if you want link time optimizations (LTO)
|
||||
ifeq ($(USE_LTO),)
|
||||
USE_LTO = no
|
||||
endif
|
||||
|
||||
# If enabled, this option allows to compile the application in THUMB mode.
|
||||
ifeq ($(USE_THUMB),)
|
||||
USE_THUMB = yes
|
||||
endif
|
||||
|
||||
# Enable this if you want to see the full log while compiling.
|
||||
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||
USE_VERBOSE_COMPILE = no
|
||||
endif
|
||||
|
||||
# If enabled, this option makes the build process faster by not compiling
|
||||
# modules not used in the current configuration.
|
||||
ifeq ($(USE_SMART_BUILD),)
|
||||
USE_SMART_BUILD = yes
|
||||
endif
|
||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
|
||||
|
||||
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||
# the stack used by the main() thread.
|
||||
ifeq ($(USE_PROCESS_STACKSIZE),)
|
||||
USE_PROCESS_STACKSIZE = 0x200
|
||||
endif
|
||||
|
||||
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||
# stack is used for processing interrupts and exceptions.
|
||||
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, sources and paths
|
||||
#
|
||||
|
||||
# Define project name here
|
||||
PROJECT = ch
|
||||
|
||||
# Imported source files and paths
|
||||
CHIBIOS = ../../..
|
||||
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
|
||||
include $(CHIBIOS)/os/hal/hal.mk
|
||||
include $(CHIBIOS)/os/hal/ports/KINETIS/KL2x/platform.mk
|
||||
include $(CHIBIOS)/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk
|
||||
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
|
||||
include $(CHIBIOS)/os/rt/rt.mk
|
||||
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk
|
||||
|
||||
# Define linker script file here
|
||||
LDSCRIPT= $(STARTUPLD)/KL25Z128.ld
|
||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CSRC = $(STARTUPSRC) \
|
||||
$(KERNSRC) \
|
||||
$(PORTSRC) \
|
||||
$(OSALSRC) \
|
||||
$(HALSRC) \
|
||||
$(PLATFORMSRC) \
|
||||
$(BOARDSRC) \
|
||||
main.c
|
||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC =
|
||||
|
||||
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACSRC =
|
||||
|
||||
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACPPSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCPPSRC =
|
||||
|
||||
# List ASM source files here
|
||||
ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
|
||||
|
||||
INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
|
||||
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
|
||||
$(CHIBIOS)/os/various
|
||||
|
||||
#
|
||||
# Project, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Compiler settings
|
||||
#
|
||||
|
||||
MCU = cortex-m0
|
||||
|
||||
#TRGT = arm-elf-
|
||||
TRGT = arm-none-eabi-
|
||||
CC = $(TRGT)gcc
|
||||
CPPC = $(TRGT)g++
|
||||
# Enable loading with g++ only if you need C++ runtime support.
|
||||
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||
# runtime support makes code size explode.
|
||||
LD = $(TRGT)gcc
|
||||
#LD = $(TRGT)g++
|
||||
CP = $(TRGT)objcopy
|
||||
AS = $(TRGT)gcc -x assembler-with-cpp
|
||||
OD = $(TRGT)objdump
|
||||
SZ = $(TRGT)size
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary
|
||||
SREC = $(CP) -O srec
|
||||
|
||||
# ARM-specific options here
|
||||
AOPT =
|
||||
|
||||
# THUMB-specific options here
|
||||
TOPT = -mthumb -DTHUMB
|
||||
|
||||
# Define C warning options here
|
||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||
|
||||
# Define C++ warning options here
|
||||
CPPWARN = -Wall -Wextra -Wundef
|
||||
|
||||
#
|
||||
# Compiler settings
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of user section
|
||||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
||||
# List all user directories here
|
||||
UINCDIR =
|
||||
|
||||
# List the user directory to look for the libraries here
|
||||
ULIBDIR =
|
||||
|
||||
# List all user libraries here
|
||||
ULIBS =
|
||||
|
||||
#
|
||||
# End of user defines
|
||||
##############################################################################
|
||||
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
|
||||
include $(RULESPATH)/rules.mk
|
||||
|
|
@ -0,0 +1,499 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCONF_H_
|
||||
#define _CHCONF_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#define CH_CFG_ST_FREQUENCY 1000
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#define CH_CFG_ST_TIMEDELTA 0
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#define CH_CFG_TIME_QUANTUM 20
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_TM FALSE
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
|
||||
/**
|
||||
* @brief I/O Queues APIs.
|
||||
* @details If enabled then the I/O queues APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_QUEUES TRUE
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the context switch circular trace buffer is
|
||||
* activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_TRACE FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*
|
||||
* @note It is inserted into lock zone.
|
||||
* @note It is also invoked when the threads simply return in order to
|
||||
* terminate.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* _CHCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="com.zylin.embeddedcdt.idleNative">
|
||||
<stringAttribute key="bad_container_name" value="/RT-MCHCK-K20-DMA/deb"/>
|
||||
<booleanAttribute key="com.zylin.embeddedcdt.debugger_app_console" value="false"/>
|
||||
<stringAttribute key="com.zylin.embeddedcdt.debugger_init_commands" value="target extended-remote localhost:3333 monitor reset init load monitor reset halt"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="/Users/derek/Documents/Arm/gcc-arm-none-eabi-4_8-2014q2/bin/arm-none-eabi-gdb"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.GDB_INIT" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.breakpointsFullPath" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="org.eclipse.cdt.debug.mi.core.standardCommandFactory"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.zylin.embeddedcdt.EmbeddedCDebugger"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="*buffer-buffer-adc_end_cb-(format)" val="4"/><content id="sensor-adc_end_cb-(format)" val="0"/></contentList>"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList> <memoryBlockExpressionItem> <expression text="0x1ffff928"/> </memoryBlockExpressionItem> </memoryBlockExpressionList> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="build/ch.elf"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RT-FREEDOM-KL25Z-ADC"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.1185372693"/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/RT-FREEDOM-KL25Z-ADC"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
</launchConfiguration>
|
||||
|
|
@ -0,0 +1,381 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HALCONF_H_
|
||||
#define _HALCONF_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 16 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 256 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial over USB number of buffers.
|
||||
* @note The default is 2 buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define UART_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
#endif /* _HALCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2014 Derek Mulcahy
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#define ADC_GRP1_NUM_CHANNELS 2
|
||||
#define ADC_GRP1_BUF_DEPTH 1
|
||||
|
||||
static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
|
||||
|
||||
static void adc_end_cb(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
|
||||
|
||||
(void)adcp;
|
||||
(void)n;
|
||||
|
||||
/*
|
||||
* The bandgap value represents the ADC reading for 1.0V
|
||||
*/
|
||||
uint16_t sensor = buffer[0];
|
||||
uint16_t bandgap = buffer[1];
|
||||
|
||||
/*
|
||||
* The v25 value is the voltage reading at 25C, it comes from the ADC
|
||||
* electricals table in the processor manual. V25 is in millivolts.
|
||||
*/
|
||||
int32_t v25 = 716;
|
||||
|
||||
/*
|
||||
* The m value is slope of the temperature sensor values, again from
|
||||
* the ADC electricals table in the processor manual.
|
||||
* M in microvolts per degree.
|
||||
*/
|
||||
int32_t m = 1620;
|
||||
|
||||
/*
|
||||
* Divide the temperature sensor reading by the bandgap to get
|
||||
* the voltage for the ambient temperature in millivolts.
|
||||
*/
|
||||
int32_t vamb = (sensor * 1000) / bandgap;
|
||||
|
||||
/*
|
||||
* This formula comes from the reference manual.
|
||||
* Temperature is in millidegrees C.
|
||||
*/
|
||||
int32_t delta = (((vamb - v25) * 1000000) / m);
|
||||
int32_t temp = 25000 - delta;
|
||||
|
||||
if (temp < 19000) {
|
||||
/* Turn just the Blue LED on if less than 19C */
|
||||
palSetPad(GPIOB,18); // Red
|
||||
palSetPad(GPIOB,19); // Green
|
||||
palClearPad(GPIOD,1); // Blue
|
||||
} else if (temp > 28000) {
|
||||
/* Turn just the Red LED on if greater than 28C */
|
||||
palClearPad(GPIOB,18); // Red
|
||||
palSetPad(GPIOB,19); // Green
|
||||
palSetPad(GPIOD,1); // Blue
|
||||
} else {
|
||||
/* Turn just the Green LED on if between 19C and 28C */
|
||||
palSetPad(GPIOB,18); // Red
|
||||
palClearPad(GPIOB,19); // Green
|
||||
palSetPad(GPIOD,1); // Blue
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* ADC conversion group.
|
||||
* Mode: Linear buffer, 8 samples of 1 channel, SW triggered.
|
||||
*/
|
||||
static const ADCConversionGroup adcgrpcfg1 = {
|
||||
false,
|
||||
ADC_GRP1_NUM_CHANNELS,
|
||||
adc_end_cb,
|
||||
NULL,
|
||||
ADC_TEMP_SENSOR | ADC_BANDGAP,
|
||||
/* CFG1 Regiser - ADCCLK = SYSCLK / 16, 16 bits per sample */
|
||||
ADCx_CFG1_ADIV(ADCx_CFG1_ADIV_DIV_8) |
|
||||
ADCx_CFG1_ADICLK(ADCx_CFG1_ADIVCLK_BUS_CLOCK_DIV_2) |
|
||||
ADCx_CFG1_MODE(ADCx_CFG1_MODE_16_BITS),
|
||||
/* SC3 Register - Average 32 readings per sample */
|
||||
ADCx_SC3_AVGE |
|
||||
ADCx_SC3_AVGS(ADCx_SC3_AVGS_AVERAGE_32_SAMPLES)
|
||||
};
|
||||
|
||||
static const ADCConfig adccfg1 = {
|
||||
/* Perform initial calibration */
|
||||
true
|
||||
};
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
|
||||
|
||||
/*
|
||||
* System initializations.
|
||||
* - HAL initialization, this also initializes the configured device drivers
|
||||
* and performs the board-specific initializations.
|
||||
* - Kernel initialization, the main() function becomes a thread and the
|
||||
* RTOS is active.
|
||||
*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
/*
|
||||
* Activates the ADC1 driver.
|
||||
*/
|
||||
adcStart(&ADCD1, &adccfg1);
|
||||
|
||||
while (1) {
|
||||
/*
|
||||
* ADC linear conversion.
|
||||
*/
|
||||
adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH);
|
||||
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _MCUCONF_H_
|
||||
#define _MCUCONF_H_
|
||||
|
||||
/*
|
||||
* STM32F0xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 3...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#define KL2x_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
|
||||
/* Select the MCU clocking mode below by enabling the appropriate block. */
|
||||
|
||||
/* FEI mode */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI
|
||||
#define KINETIS_SYSCLK_FREQUENCY 21000000UL
|
||||
#endif /* 0 */
|
||||
|
||||
/* FEE mode - 24 MHz with external 32.768 kHz crystal */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 0 /* 732x FLL factor */
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 23986176UL /* 32.768 kHz*732 (~24 MHz) */
|
||||
#define KINETIS_UART0_CLOCK_FREQ (32768 * 732) /* FLL output */
|
||||
#define KINETIS_UART0_CLOCK_SRC 1 /* Select FLL clock */
|
||||
#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_MCG_FLL_OUTDIV4)
|
||||
#endif /* 0 */
|
||||
|
||||
/* FEE mode - 48 MHz */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
|
||||
#endif /* 0 */
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define KINETIS_SERIAL_USE_UART0 FALSE
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define KINETIS_ADC_USE_ADC0 TRUE
|
||||
|
||||
#endif /* _MCUCONF_H_ */
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
*****************************************************************************
|
||||
** ChibiOS/RT port for ARM-Cortex-M0+ Freedom Board KL25Z. **
|
||||
*****************************************************************************
|
||||
|
||||
The demo runs on an Freescale Freedom KL25Z board and demonstrates
|
||||
the usage of the ADC.
|
||||
|
||||
It reads the internal temperature sensor. If the temperature drops
|
||||
below 20C (68F) it turns on the blue LED. If the temperature rises
|
||||
above 27C (81F) it turns on the red LED. Otherwise the green LED is
|
||||
illuminated.
|
||||
|
||||
The internal bandgap voltage reference is used to calibrate the
|
||||
results returned from the temperature sensor.
|
||||
|
|
@ -0,0 +1,206 @@
|
|||
##############################################################################
|
||||
# Build global options
|
||||
# NOTE: Can be overridden externally.
|
||||
#
|
||||
|
||||
# Compiler options here.
|
||||
ifeq ($(USE_OPT),)
|
||||
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -DCRT0_INIT_STACKS=0
|
||||
# USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||
endif
|
||||
|
||||
# C specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_COPT),)
|
||||
USE_COPT =
|
||||
endif
|
||||
|
||||
# C++ specific options here (added to USE_OPT).
|
||||
ifeq ($(USE_CPPOPT),)
|
||||
USE_CPPOPT = -fno-rtti
|
||||
endif
|
||||
|
||||
# Enable this if you want the linker to remove unused code and data
|
||||
ifeq ($(USE_LINK_GC),)
|
||||
USE_LINK_GC = yes
|
||||
endif
|
||||
|
||||
# Linker extra options here.
|
||||
ifeq ($(USE_LDOPT),)
|
||||
USE_LDOPT =
|
||||
endif
|
||||
|
||||
# Enable this if you want link time optimizations (LTO)
|
||||
ifeq ($(USE_LTO),)
|
||||
USE_LTO = no
|
||||
endif
|
||||
|
||||
# If enabled, this option allows to compile the application in THUMB mode.
|
||||
ifeq ($(USE_THUMB),)
|
||||
USE_THUMB = yes
|
||||
endif
|
||||
|
||||
# Enable this if you want to see the full log while compiling.
|
||||
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||
USE_VERBOSE_COMPILE = no
|
||||
endif
|
||||
|
||||
# If enabled, this option makes the build process faster by not compiling
|
||||
# modules not used in the current configuration.
|
||||
ifeq ($(USE_SMART_BUILD),)
|
||||
USE_SMART_BUILD = yes
|
||||
endif
|
||||
|
||||
#
|
||||
# Build global options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Architecture or project specific options
|
||||
#
|
||||
|
||||
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||
# the stack used by the main() thread.
|
||||
ifeq ($(USE_PROCESS_STACKSIZE),)
|
||||
USE_PROCESS_STACKSIZE = 0x200
|
||||
endif
|
||||
|
||||
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||
# stack is used for processing interrupts and exceptions.
|
||||
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||
endif
|
||||
|
||||
#
|
||||
# Architecture or project specific options
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Project, sources and paths
|
||||
#
|
||||
|
||||
# Define project name here
|
||||
PROJECT = ch
|
||||
|
||||
# Imported source files and paths
|
||||
CHIBIOS = ../../..
|
||||
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk
|
||||
include $(CHIBIOS)/os/hal/hal.mk
|
||||
include $(CHIBIOS)/os/hal/ports/KINETIS/K20x/platform.mk
|
||||
include $(CHIBIOS)/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk
|
||||
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
|
||||
include $(CHIBIOS)/os/rt/rt.mk
|
||||
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
|
||||
|
||||
# Define linker script file here
|
||||
LDSCRIPT= $(STARTUPLD)/MK20DX128.ld
|
||||
|
||||
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CSRC = $(STARTUPSRC) \
|
||||
$(KERNSRC) \
|
||||
$(PORTSRC) \
|
||||
$(OSALSRC) \
|
||||
$(HALSRC) \
|
||||
$(PLATFORMSRC) \
|
||||
$(BOARDSRC) \
|
||||
main.c
|
||||
|
||||
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||
# setting.
|
||||
CPPSRC =
|
||||
|
||||
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACSRC =
|
||||
|
||||
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
ACPPSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCSRC =
|
||||
|
||||
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||
# option that results in lower performance and larger code size.
|
||||
TCPPSRC =
|
||||
|
||||
# List ASM source files here
|
||||
ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
|
||||
|
||||
INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
|
||||
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
|
||||
$(CHIBIOS)/os/various
|
||||
|
||||
#
|
||||
# Project, sources and paths
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Compiler settings
|
||||
#
|
||||
|
||||
MCU = cortex-m4
|
||||
|
||||
#TRGT = arm-elf-
|
||||
TRGT = arm-none-eabi-
|
||||
CC = $(TRGT)gcc
|
||||
CPPC = $(TRGT)g++
|
||||
# Enable loading with g++ only if you need C++ runtime support.
|
||||
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||
# runtime support makes code size explode.
|
||||
LD = $(TRGT)gcc
|
||||
#LD = $(TRGT)g++
|
||||
CP = $(TRGT)objcopy
|
||||
AS = $(TRGT)gcc -x assembler-with-cpp
|
||||
OD = $(TRGT)objdump
|
||||
SZ = $(TRGT)size
|
||||
HEX = $(CP) -O ihex
|
||||
BIN = $(CP) -O binary
|
||||
SREC = $(CP) -O srec
|
||||
|
||||
# ARM-specific options here
|
||||
AOPT =
|
||||
|
||||
# THUMB-specific options here
|
||||
TOPT = -mthumb -DTHUMB
|
||||
|
||||
# Define C warning options here
|
||||
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||
|
||||
# Define C++ warning options here
|
||||
CPPWARN = -Wall -Wextra -Wundef
|
||||
|
||||
#
|
||||
# Compiler settings
|
||||
##############################################################################
|
||||
|
||||
##############################################################################
|
||||
# Start of user section
|
||||
#
|
||||
|
||||
# List all user C define here, like -D_DEBUG=1
|
||||
UDEFS =
|
||||
|
||||
# Define ASM defines here
|
||||
UADEFS =
|
||||
|
||||
# List all user directories here
|
||||
UINCDIR =
|
||||
|
||||
# List the user directory to look for the libraries here
|
||||
ULIBDIR =
|
||||
|
||||
# List all user libraries here
|
||||
ULIBS =
|
||||
|
||||
#
|
||||
# End of user defines
|
||||
##############################################################################
|
||||
|
||||
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
|
||||
include $(RULESPATH)/rules.mk
|
||||
|
|
@ -0,0 +1,499 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/chconf.h
|
||||
* @brief Configuration file template.
|
||||
* @details A copy of this file must be placed in each project directory, it
|
||||
* contains the application specific kernel settings.
|
||||
*
|
||||
* @addtogroup config
|
||||
* @details Kernel related settings and hooks.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCONF_H_
|
||||
#define _CHCONF_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name System timers settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System time counter resolution.
|
||||
* @note Allowed values are 16 or 32 bits.
|
||||
*/
|
||||
#define CH_CFG_ST_RESOLUTION 32
|
||||
|
||||
/**
|
||||
* @brief System tick frequency.
|
||||
* @details Frequency of the system timer that drives the system ticks. This
|
||||
* setting also defines the system tick time unit.
|
||||
*/
|
||||
#define CH_CFG_ST_FREQUENCY 1000
|
||||
|
||||
/**
|
||||
* @brief Time delta constant for the tick-less mode.
|
||||
* @note If this value is zero then the system uses the classic
|
||||
* periodic tick. This value represents the minimum number
|
||||
* of ticks that is safe to specify in a timeout directive.
|
||||
* The value one is not valid, timeouts are rounded up to
|
||||
* this value.
|
||||
*/
|
||||
#define CH_CFG_ST_TIMEDELTA 0
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel parameters and options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Round robin interval.
|
||||
* @details This constant is the number of system ticks allowed for the
|
||||
* threads before preemption occurs. Setting this value to zero
|
||||
* disables the preemption for threads with equal priority and the
|
||||
* round robin becomes cooperative. Note that higher priority
|
||||
* threads can still preempt, the kernel is always preemptive.
|
||||
* @note Disabling the round robin preemption makes the kernel more compact
|
||||
* and generally faster.
|
||||
* @note The round robin preemption is not supported in tickless mode and
|
||||
* must be set to zero in that case.
|
||||
*/
|
||||
#define CH_CFG_TIME_QUANTUM 20
|
||||
|
||||
/**
|
||||
* @brief Managed RAM size.
|
||||
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||
* then the whole available RAM is used. The core memory is made
|
||||
* available to the heap allocator and/or can be used directly through
|
||||
* the simplified core memory allocator.
|
||||
*
|
||||
* @note In order to let the OS manage the whole RAM the linker script must
|
||||
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||
*/
|
||||
#define CH_CFG_MEMCORE_SIZE 0
|
||||
|
||||
/**
|
||||
* @brief Idle thread automatic spawn suppression.
|
||||
* @details When this option is activated the function @p chSysInit()
|
||||
* does not spawn the idle thread. The application @p main()
|
||||
* function becomes the idle thread and must implement an
|
||||
* infinite loop.
|
||||
*/
|
||||
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Performance options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief OS optimization.
|
||||
* @details If enabled then time efficient rather than space efficient code
|
||||
* is used when two possible implementations exist.
|
||||
*
|
||||
* @note This is not related to the compiler optimization options.
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Subsystem options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Time Measurement APIs.
|
||||
* @details If enabled then the time measurement APIs are included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_TM FALSE
|
||||
|
||||
/**
|
||||
* @brief Threads registry APIs.
|
||||
* @details If enabled then the registry APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_REGISTRY TRUE
|
||||
|
||||
/**
|
||||
* @brief Threads synchronization APIs.
|
||||
* @details If enabled then the @p chThdWait() function is included in
|
||||
* the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_WAITEXIT TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores APIs.
|
||||
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||
|
||||
/**
|
||||
* @brief Semaphores queuing mode.
|
||||
* @details If enabled then the threads are enqueued on semaphores by
|
||||
* priority rather than in FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mutexes APIs.
|
||||
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES TRUE
|
||||
|
||||
/**
|
||||
* @brief Enables recursive behavior on mutexes.
|
||||
* @note Recursive mutexes are heavier and have an increased
|
||||
* memory footprint.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs.
|
||||
* @details If enabled then the conditional variables APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS TRUE
|
||||
|
||||
/**
|
||||
* @brief Conditional Variables APIs with timeout.
|
||||
* @details If enabled then the conditional variables APIs with timeout
|
||||
* specification are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||
*/
|
||||
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs.
|
||||
* @details If enabled then the event flags APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS TRUE
|
||||
|
||||
/**
|
||||
* @brief Events Flags APIs with timeout.
|
||||
* @details If enabled then the events APIs with timeout specification
|
||||
* are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||
*/
|
||||
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages APIs.
|
||||
* @details If enabled then the synchronous messages APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES TRUE
|
||||
|
||||
/**
|
||||
* @brief Synchronous Messages queuing mode.
|
||||
* @details If enabled then messages are served by priority rather than in
|
||||
* FIFO order.
|
||||
*
|
||||
* @note The default is @p FALSE. Enable this if you have special
|
||||
* requirements.
|
||||
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||
*/
|
||||
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||
|
||||
/**
|
||||
* @brief Mailboxes APIs.
|
||||
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||
* included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||
*/
|
||||
#define CH_CFG_USE_MAILBOXES TRUE
|
||||
|
||||
/**
|
||||
* @brief I/O Queues APIs.
|
||||
* @details If enabled then the I/O queues APIs are included in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_QUEUES TRUE
|
||||
|
||||
/**
|
||||
* @brief Core Memory Manager APIs.
|
||||
* @details If enabled then the core memory manager APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMCORE TRUE
|
||||
|
||||
/**
|
||||
* @brief Heap Allocator APIs.
|
||||
* @details If enabled then the memory heap allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||
* @p CH_CFG_USE_SEMAPHORES.
|
||||
* @note Mutexes are recommended.
|
||||
*/
|
||||
#define CH_CFG_USE_HEAP TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Pools Allocator APIs.
|
||||
* @details If enabled then the memory pools allocator APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
*/
|
||||
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||
|
||||
/**
|
||||
* @brief Dynamic Threads APIs.
|
||||
* @details If enabled then the dynamic threads creation APIs are included
|
||||
* in the kernel.
|
||||
*
|
||||
* @note The default is @p TRUE.
|
||||
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||
*/
|
||||
#define CH_CFG_USE_DYNAMIC TRUE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Debug options
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_STATISTICS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_CHECKS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_ASSERTS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the context switch circular trace buffer is
|
||||
* activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_TRACE FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Kernel hooks
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p chThdInit() API.
|
||||
*
|
||||
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*
|
||||
* @note It is inserted into lock zone.
|
||||
* @note It is also invoked when the threads simply return in order to
|
||||
* terminate.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread leave hook.
|
||||
* @note This hook is invoked within a critical zone, no OS functions
|
||||
* should be invoked from here.
|
||||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* _CHCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,381 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file templates/halconf.h
|
||||
* @brief HAL configuration header.
|
||||
* @details HAL configuration file, this file allows to enable or disable the
|
||||
* various device drivers from your application. You may also use
|
||||
* this file in order to override the device drivers default settings.
|
||||
*
|
||||
* @addtogroup HAL_CONF
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _HALCONF_H_
|
||||
#define _HALCONF_H_
|
||||
|
||||
#include "mcuconf.h"
|
||||
|
||||
/**
|
||||
* @brief Enables the PAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PAL TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ADC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ADC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the CAN subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_CAN FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the EXT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_EXT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2C subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2C TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the I2S subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_I2S FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the MMC_SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_MMC_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the PWM subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_PWM FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the RTC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_RTC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SDC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SDC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SERIAL over USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SERIAL_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the SPI subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_SPI FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the UART subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_UART FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the USB subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_USB FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the WDG subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_WDG FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* ADC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* CAN driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Sleep mode related APIs inclusion switch.
|
||||
*/
|
||||
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||
#define CAN_USE_SLEEP_MODE TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* I2C driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||
*/
|
||||
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MAC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_ZERO_COPY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables an event sources for incoming packets.
|
||||
*/
|
||||
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||
#define MAC_USE_EVENTS TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* MMC_SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
* This option is recommended also if the SPI driver does not
|
||||
* use a DMA channel and heavily loads the CPU.
|
||||
*/
|
||||
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define MMC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SDC driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of initialization attempts before rejecting the card.
|
||||
* @note Attempts are performed at 10mS intervals.
|
||||
*/
|
||||
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||
#define SDC_INIT_RETRY 100
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Include support for MMC cards.
|
||||
* @note MMC support is not yet implemented so this option must be kept
|
||||
* at @p FALSE.
|
||||
*/
|
||||
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||
#define SDC_MMC_SUPPORT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Delays insertions.
|
||||
* @details If enabled this options inserts delays into the MMC waiting
|
||||
* routines releasing some extra CPU time for the threads with
|
||||
* lower priority, this may slow down the driver a bit however.
|
||||
*/
|
||||
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||
#define SDC_NICE_WAITING TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Default bit rate.
|
||||
* @details Configuration parameter, this is the baud rate selected for the
|
||||
* default configuration.
|
||||
*/
|
||||
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_DEFAULT_BITRATE 38400
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial buffers size.
|
||||
* @details Configuration parameter, you can change the depth of the queue
|
||||
* buffers depending on the requirements of your application.
|
||||
* @note The default is 16 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_BUFFERS_SIZE 16
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SERIAL_USB driver related setting. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Serial over USB buffers size.
|
||||
* @details Configuration parameter, the buffer size must be a multiple of
|
||||
* the USB data endpoint maximum packet size.
|
||||
* @note The default is 256 bytes for both the transmission and receive
|
||||
* buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Serial over USB number of buffers.
|
||||
* @note The default is 2 buffers.
|
||||
*/
|
||||
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* SPI driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_WAIT TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* UART driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define UART_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* USB driver related settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Enables synchronous APIs.
|
||||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define USB_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
#endif /* _HALCONF_H_ */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
#define MMA8451_ADDR 0x1D
|
||||
#define WHO_AM_I 0x0D
|
||||
|
||||
static bool i2cOk = false;
|
||||
|
||||
static THD_WORKING_AREA(waThread1, 64);
|
||||
static THD_FUNCTION(Thread1, arg) {
|
||||
|
||||
(void)arg;
|
||||
chRegSetThreadName("Blinker");
|
||||
while (TRUE) {
|
||||
if (i2cOk) {
|
||||
palSetPad(IOPORT3, 3);
|
||||
palTogglePad(IOPORT4, 4);
|
||||
} else {
|
||||
palSetPad(IOPORT4, 4);
|
||||
palTogglePad(IOPORT3, 3);
|
||||
}
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
int main(void) {
|
||||
|
||||
uint8_t tx[1], rx[1];
|
||||
|
||||
/*
|
||||
* System initializations.
|
||||
* - HAL initialization, this also initializes the configured device drivers
|
||||
* and performs the board-specific initializations.
|
||||
* - Kernel initialization, the main() function becomes a thread and the
|
||||
* RTOS is active.
|
||||
*/
|
||||
halInit();
|
||||
chSysInit();
|
||||
|
||||
palSetPad(IOPORT3, 3);
|
||||
palSetPad(IOPORT4, 4);
|
||||
palSetPad(IOPORT1, 2);
|
||||
|
||||
i2cStart(&I2CD1, NULL);
|
||||
|
||||
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
|
||||
|
||||
while (1) {
|
||||
tx[0] = WHO_AM_I;
|
||||
i2cMasterTransmitTimeout(&I2CD1, MMA8451_ADDR, tx, 1, rx, 1, TIME_INFINITE);
|
||||
i2cOk = (rx[0] == 0x1A) ? true : false;
|
||||
chThdSleepMilliseconds(2000);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _MCUCONF_H_
|
||||
#define _MCUCONF_H_
|
||||
|
||||
#define K20x_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
|
||||
/* Select the MCU clocking mode below by enabling the appropriate block. */
|
||||
|
||||
/* Enable clock initialization by HAL */
|
||||
#define KINETIS_NO_INIT FALSE
|
||||
|
||||
/* PEE mode - external 8 MHz crystal with PLL for 48 MHz core/system clock. */
|
||||
#if 1
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
|
||||
#define KINETIS_XTAL_FREQUENCY 8000000UL
|
||||
#define KINETIS_SYSCLK_FREQUENCY 48000000UL
|
||||
#endif
|
||||
|
||||
/* FEI mode - 48 MHz with internal 32.768 kHz oscillator */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
|
||||
#endif /* 0 */
|
||||
|
||||
/* FEE mode - 24 MHz with external 32.768 kHz crystal */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 0 /* 732x FLL factor */
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 23986176UL /* 32.768 kHz*732 (~24 MHz) */
|
||||
#define KINETIS_UART0_CLOCK_FREQ (32768 * 732) /* FLL output */
|
||||
#define KINETIS_UART0_CLOCK_SRC 1 /* Select FLL clock */
|
||||
#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_MCG_FLL_OUTDIV4)
|
||||
#endif /* 0 */
|
||||
|
||||
/* FEE mode - 48 MHz */
|
||||
#if 0
|
||||
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
|
||||
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
|
||||
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
|
||||
#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
|
||||
#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
|
||||
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
|
||||
#endif /* 0 */
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define KINETIS_SERIAL_USE_UART0 FALSE
|
||||
#define KINETIS_I2C_USE_I2C0 TRUE
|
||||
#define KINETIS_I2C_I2C0_PRIORITY 8
|
||||
|
||||
#endif /* _MCUCONF_H_ */
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
*********************************************************************
|
||||
** ChibiOS/RT I2C test demo for Freedom Board K20D50M. **
|
||||
*********************************************************************
|
||||
|
||||
** TARGET **
|
||||
|
||||
The test runs on an Freescale Freedom K20D50M board.
|
||||
|
||||
** The Demo **
|
||||
|
||||
This test tries to access the onboard MMA8451 chip using the I2C bus.
|
||||
It sends the command WHO_AM_I which has a standard answer that can be
|
||||
verified. If the correct answer is received the GREEN led will blink.
|
||||
If no answer or invalid answer is received the RED led will blink.
|
||||
|
||||
** Build Procedure **
|
||||
|
||||
This test was built using the ARM GCC toolchain available at:
|
||||
|
||||
https://launchpad.net/gcc-arm-embedded
|
||||
Loading…
Reference in New Issue