diff --git a/os/hal/ports/GD/GD32VF103/gd32_rcu.h b/os/hal/ports/GD/GD32VF103/gd32_rcu.h
index cc565f00..e4025b97 100644
--- a/os/hal/ports/GD/GD32VF103/gd32_rcu.h
+++ b/os/hal/ports/GD/GD32VF103/gd32_rcu.h
@@ -953,24 +953,24 @@
 /** @} */
 
 /**
- * @name    FSMC peripherals specific RCU operations
+ * @name    EXMC peripherals specific RCU operations
  * @{
  */
 /**
- * @brief   Enables the FSMC peripheral clock.
+ * @brief   Enables the EXMC peripheral clock.
  *
  * @param[in] lp        low power enable flag
  *
  * @api
  */
-#define rcuEnableFSMC(lp) rcuEnableAHB(RCU_AHBENR_FSMCEN, lp)
+#define rcuEnableEXMC(lp) rcuEnableAHB(RCU_AHBENR_EXMCEN, lp)
 
 /**
- * @brief   Disables the FSMC peripheral clock.
+ * @brief   Disables the EXMC peripheral clock.
  *
  * @api
  */
-#define rcuDisableFSMC() rcuDisableAHB(RCU_AHBENR_FSMCEN)
+#define rcuDisableEXMC() rcuDisableAHB(RCU_AHBENR_EXMCEN)
 /** @} */
 
 /*===========================================================================*/
diff --git a/os/hal/ports/GD/GD32VF103/gd32_registry.h b/os/hal/ports/GD/GD32VF103/gd32_registry.h
index 08f4ea3d..192698e7 100644
--- a/os/hal/ports/GD/GD32VF103/gd32_registry.h
+++ b/os/hal/ports/GD/GD32VF103/gd32_registry.h
@@ -310,11 +310,11 @@
 /* FWDGT attributes.*/
 #define GD32_HAS_FWDGT                      TRUE
 
-/* FSMC attributes.*/
+/* EXMC attributes.*/
 #if GD32_HAS_EXMC
-    #define GD32_HAS_FSMC                      TRUE
+    #define GD32_HAS_EXMC                      TRUE
 #else
-    #define GD32_HAS_FSMC                      FALSE
+    #define GD32_HAS_EXMC                      FALSE
 #endif
 
 /* CRC attributes.*/
diff --git a/os/hal/ports/GD/GD32VF103/stm32f105xc.h b/os/hal/ports/GD/GD32VF103/stm32f105xc.h
index 8b0f0374..8ca95e5f 100644
--- a/os/hal/ports/GD/GD32VF103/stm32f105xc.h
+++ b/os/hal/ports/GD/GD32VF103/stm32f105xc.h
@@ -3103,7 +3103,7 @@ typedef struct
 /******************  Bit definition for AFIO_PCF1 register  ******************/
 #define AFIO_PCF1_EXMC_NADV_REMAP_Pos       (10U)                             
 #define AFIO_PCF1_EXMC_NADV_REMAP_Msk       (0x1U << AFIO_PCF1_EXMC_NADV_REMAP_Pos) /*!< 0x00000400 */
-#define AFIO_PCF1_EXMC_NADV_REMAP           AFIO_PCF1_EXMC_NADV_REMAP_Msk    /*!< FSMC NADV remapping */
+#define AFIO_PCF1_EXMC_NADV_REMAP           AFIO_PCF1_EXMC_NADV_REMAP_Msk    /*!< EXMC NADV remapping */
 
 /******************************************************************************/
 /*                                                                            */