Remove CAN peripheral not present on this device
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@ -53,11 +53,6 @@ CANDriver CAND1;
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CANDriver CAND2;
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#endif
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/** @brief CAN3 driver identifier.*/
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#if GD32_CAN_USE_CAN3 || defined(__DOXYGEN__)
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CANDriver CAND3;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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@ -99,14 +94,6 @@ static void can_lld_set_filters(CANDriver* canp,
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}
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#endif
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#if GD32_CAN_USE_CAN3
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if (canp == &CAND3) {
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rccEnableCAN3(true);
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/* Filters initialization.*/
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canp->can->FMR = (canp->can->FMR & 0xFFFF0000) | CAN_FMR_FINIT;
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}
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#endif
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if (num > 0) {
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uint32_t i, fmask;
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@ -125,15 +112,6 @@ static void can_lld_set_filters(CANDriver* canp,
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}
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#endif
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#if GD32_CAN_USE_CAN3
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if (canp == &CAND3) {
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for (i = 0; i < GD32_CAN3_MAX_FILTERS; i++) {
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canp->can->sFilterRegister[i].FR1 = 0;
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canp->can->sFilterRegister[i].FR2 = 0;
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}
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}
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#endif
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/* Scanning the filters array.*/
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for (i = 0; i < num; i++) {
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fmask = 1 << cfp->filter;
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@ -180,11 +158,6 @@ static void can_lld_set_filters(CANDriver* canp,
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rccDisableCAN1();
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}
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#endif
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#if GD32_CAN_USE_CAN3
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if (canp == &CAND3) {
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rccDisableCAN3();
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}
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#endif
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}
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/**
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@ -512,97 +485,6 @@ OSAL_IRQ_HANDLER(GD32_CAN1_EWMC_HANDLER) {
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#endif /* !defined(GD32_CAN1_UNIFIED_HANDLER) */
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#endif /* GD32_CAN_USE_CAN2 */
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#if GD32_CAN_USE_CAN3 || defined(__DOXYGEN__)
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#if defined(GD32_CAN3_UNIFIED_HANDLER)
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/**
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* @brief CAN1 unified interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(GD32_CAN3_UNIFIED_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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can_lld_tx_handler(&CAND3);
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can_lld_rx0_handler(&CAND3);
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can_lld_rx1_handler(&CAND3);
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can_lld_sce_handler(&CAND3);
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OSAL_IRQ_EPILOGUE();
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}
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#else /* !defined(GD32_CAN3_UNIFIED_HANDLER) */
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#if !defined(GD32_CAN3_TX_HANDLER)
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#error "GD32_CAN3_TX_HANDLER not defined"
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#endif
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#if !defined(GD32_CAN3_RX0_HANDLER)
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#error "GD32_CAN3_RX0_HANDLER not defined"
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#endif
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#if !defined(GD32_CAN3_RX1_HANDLER)
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#error "GD32_CAN3_RX1_HANDLER not defined"
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#endif
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#if !defined(GD32_CAN3_EWMC_HANDLER)
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#error "GD32_CAN3_EWMC_HANDLER not defined"
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#endif
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/**
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* @brief CAN3 TX interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(GD32_CAN3_TX_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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can_lld_tx_handler(&CAND3);
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OSAL_IRQ_EPILOGUE();
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}
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/**
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* @brief CAN3 RX0 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(GD32_CAN3_RX0_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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can_lld_rx0_handler(&CAND3);
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OSAL_IRQ_EPILOGUE();
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}
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/**
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* @brief CAN1 RX3 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(GD32_CAN3_RX1_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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can_lld_rx1_handler(&CAND3);
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OSAL_IRQ_EPILOGUE();
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}
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/**
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* @brief CAN1 SCE interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(GD32_CAN3_EWMC_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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can_lld_sce_handler(&CAND3);
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* !defined(GD32_CAN0_UNIFIED_HANDLER) */
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#endif /* GD32_CAN_USE_CAN1 */
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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@ -640,20 +522,6 @@ void can_lld_init(void) {
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eclicEnableVector(GD32_CAN1_RX1_NUMBER, GD32_CAN_CAN2_IRQ_PRIORITY, GD32_CAN_CAN2_IRQ_TRIGGER);
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eclicEnableVector(GD32_CAN1_EWMC_NUMBER, GD32_CAN_CAN2_IRQ_PRIORITY, GD32_CAN_CAN2_IRQ_TRIGGER);
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#endif
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#endif
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#if GD32_CAN_USE_CAN3
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/* Driver initialization.*/
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canObjectInit(&CAND3);
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CAND3.can = CAN3;
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#if defined(GD32_CAN3_UNIFIED_NUMBER)
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eclicEnableVector(GD32_CAN3_UNIFIED_NUMBER, GD32_CAN_CAN3_IRQ_PRIORITY, GD32_CAN_CAN3_IRQ_TRIGGER);
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#else
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eclicEnableVector(GD32_CAN3_TX_NUMBER, GD32_CAN_CAN3_IRQ_PRIORITY, GD32_CAN_CAN3_IRQ_TRIGGER);
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eclicEnableVector(GD32_CAN3_RX0_NUMBER, GD32_CAN_CAN3_IRQ_PRIORITY, GD32_CAN_CAN3_IRQ_TRIGGER);
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eclicEnableVector(GD32_CAN3_RX1_NUMBER, GD32_CAN_CAN3_IRQ_PRIORITY, GD32_CAN_CAN3_IRQ_TRIGGER);
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eclicEnableVector(GD32_CAN3_EWMC_NUMBER, GD32_CAN_CAN3_IRQ_PRIORITY, GD32_CAN_CAN3_IRQ_TRIGGER);
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#endif
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#endif
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/* Filters initialization.*/
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@ -664,12 +532,6 @@ void can_lld_init(void) {
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can_lld_set_filters(&CAND1, GD32_CAN_MAX_FILTERS, 0, NULL);
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#endif
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#endif
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#if GD32_HAS_CAN3
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#if GD32_CAN_USE_CAN3
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can_lld_set_filters(&CAND3, GD32_CAN3_MAX_FILTERS, 0, NULL);
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#endif
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#endif
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}
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/**
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@ -695,12 +557,6 @@ void can_lld_start(CANDriver *canp) {
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}
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#endif
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#if GD32_CAN_USE_CAN3
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if (&CAND3 == canp) {
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rccEnableCAN3(true);
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}
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#endif
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/* Configuring CAN. */
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canp->can->MCR = CAN_MCR_INRQ;
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while ((canp->can->MSR & CAN_MSR_INAK) == 0)
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@ -761,14 +617,6 @@ void can_lld_stop(CANDriver *canp) {
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rccDisableCAN2();
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}
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#endif
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#if GD32_CAN_USE_CAN3
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if (&CAND3 == canp) {
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CAN3->MCR = 0x00010002; /* Register reset value. */
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CAN3->IER = 0x00000000; /* All sources disabled. */
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rccDisableCAN3();
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}
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#endif
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}
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}
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@ -1011,20 +859,12 @@ void canSTM32SetFilters(CANDriver *canp, uint32_t can2sb,
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#if GD32_CAN_USE_CAN2
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osalDbgAssert(CAND2.state == CAN_STOP, "invalid state");
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#endif
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#if GD32_CAN_USE_CAN3
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osalDbgAssert(CAND3.state == CAN_STOP, "invalid state");
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#endif
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#if GD32_CAN_USE_CAN1
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if (canp == &CAND1) {
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can_lld_set_filters(canp, can2sb, num, cfp);
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}
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#endif
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#if GD32_CAN_USE_CAN3
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if (canp == &CAND3) {
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can_lld_set_filters(canp, can2sb, num, cfp);
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}
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#endif
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}
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#endif /* HAL_USE_CAN */
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@ -104,14 +104,6 @@
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#define GD32_CAN_USE_CAN2 FALSE
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#endif
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/**
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* @brief CAN3 driver enable switch.
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* @details If set to @p TRUE the support for CAN3 is included.
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*/
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#if !defined(GD32_CAN_USE_CAN3) || defined(__DOXYGEN__)
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#define GD32_CAN_USE_CAN3 FALSE
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#endif
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/**
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* @brief CAN1 interrupt priority level setting.
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*/
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@ -128,14 +120,6 @@
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#endif
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/** @} */
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/**
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* @brief CAN3 interrupt priority level setting.
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*/
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#if !defined(GD32_CAN_CAN3_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define GD32_CAN_CAN3_IRQ_PRIORITY 11
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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@ -148,18 +132,10 @@
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#error "GD32_HAS_CAN2 not defined in registry"
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#endif
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#if !defined(GD32_HAS_CAN3)
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#error "GD32_HAS_CAN3 not defined in registry"
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#endif
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#if (GD32_HAS_CAN1 | GD32_HAS_CAN2) && !defined(GD32_CAN_MAX_FILTERS)
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#error "GD32_CAN_MAX_FILTERS not defined in registry"
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#endif
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#if GD32_HAS_CAN3 && !defined(GD32_CAN3_MAX_FILTERS)
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#error "GD32_CAN3_MAX_FILTERS not defined in registry"
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#endif
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#if GD32_CAN_USE_CAN1 && !GD32_HAS_CAN1
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#error "CAN1 not present in the selected device"
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#endif
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@ -168,11 +144,7 @@
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#error "CAN2 not present in the selected device"
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#endif
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#if GD32_CAN_USE_CAN3 && !GD32_HAS_CAN3
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#error "CAN2 not present in the selected device"
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#endif
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#if !GD32_CAN_USE_CAN1 && !GD32_CAN_USE_CAN2 && !GD32_CAN_USE_CAN3
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#if !GD32_CAN_USE_CAN1 && !GD32_CAN_USE_CAN2
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#error "CAN driver activated but no CAN peripheral assigned"
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#endif
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@ -434,10 +406,6 @@ extern CANDriver CAND1;
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extern CANDriver CAND2;
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#endif
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#if GD32_CAN_USE_CAN3 && !defined(__DOXYGEN__)
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extern CANDriver CAND3;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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