Fixed DMA for 19.1.x

os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c

@@ -303,7 +303,7 @@ void comp_ext_lld_channel_enable(COMPDriver *compp, uint32_t channel) {
   if (channel < 32) {
 #endif
     /* Masked out lines must not be touched by this driver.*/
-    if ((cmask & STM32_EXTI_IMR_MASK) != 0U) {
+    if ((cmask & STM32_EXTI_IMR1_MASK) != 0U) {
       return;
     }
 

os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c

@@ -235,7 +235,7 @@ void crc_lld_start(CRCDriver *crcp) {
  */
 void crc_lld_stop(CRCDriver *crcp) {
 #if CRC_USE_DMA == TRUE
-  dmaStreamRelease(crcp->dma);
+  dmaStreamFree(crcp->dma);
 #else
   (void)crcp;
 #endif

os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c

@@ -328,10 +328,10 @@ void nand_lld_start(NANDDriver *nandp) {
     fsmc_start(&FSMCD1);
 
   if (nandp->state == NAND_STOP) {
-    b = dmaStreamAllocate(nandp->dma,
-                          STM32_EMC_FSMC1_IRQ_PRIORITY,
-                          (stm32_dmaisr_t)nand_lld_serve_transfer_end_irq,
-                          (void *)nandp);
+    b = dmaStreamAlloc(nandp->dma,
+                       STM32_EMC_FSMC1_IRQ_PRIORITY,
+                       (stm32_dmaisr_t)nand_lld_serve_transfer_end_irq,
+                       (void *)nandp);
     osalDbgAssert(!b, "stream already allocated");
 
 #if AHB_TRANSACTION_WIDTH == 4
@@ -377,7 +377,7 @@ void nand_lld_start(NANDDriver *nandp) {
 void nand_lld_stop(NANDDriver *nandp) {
 
   if (nandp->state == NAND_READY) {
-    dmaStreamRelease(nandp->dma);
+    dmaStreamFree(nandp->dma);
     nandp->nand->PCR &= ~FSMC_PCR_PBKEN;
     nand_ready_isr_disable(nandp);
     nandp->isr_handler = NULL;

os/various/fatfs_bindings/fatfs.mk

@@ -4,7 +4,7 @@ FATFSSRC = ${CHIBIOS_CONTRIB}/os/various/fatfs_bindings/fatfs_diskio.c \
            ${CHIBIOS}/ext/fatfs/src/ff.c \
            $(CHIBIOS)/ext/fatfs/src/ffunicode.c
 
-FATFSINC = ${CHIBIOS}/ext/fatfs/src
+FATFSINC = ${CHIBIOS}/ext/fatfs/src ${CHIBIOS_CONTRIB}/os/various/fatfs_bindings
 
 # Shared variables
 ALLCSRC += $(FATFSSRC)