d1c2126d1c
Modified some drivers
2021-09-12 18:02:41 -03:00
cc5a81bf99
Added WB32F3G71xx support
2021-09-12 18:02:41 -03:00
4b24d2e9c0
K60F improvements
2021-09-12 02:59:33 +10:00
9e4deb49e8
Merge pull request #292 from bwisn/bwisn_ht32fixusb
...
HT32: add missing fields in USBEndpointConfig, to make it compatible …
2021-09-11 00:11:00 +02:00
42adcfe526
Fix device numbering
2021-09-09 18:15:14 +09:00
5935e97262
Merge pull request #289 from elfmimi/nuc123-usb-workaround
...
NUMICRO: Workaround for NUC123 USB Endpoint 6 problem
2021-09-03 19:41:08 -07:00
4315298f40
Fix next channel calculation
2021-09-03 15:49:02 +09:00
af3b8d6070
Add ADC low level driver for RP2040
2021-09-02 22:26:14 +09:00
8bc249f5d6
Remove unused code to solve merge conflict
2021-08-30 13:30:13 +09:00
41f2485356
HT32: add missing fields in USBEndpointConfig, to make it compatible with STM32
2021-08-29 16:40:05 +02:00
fc097fa6ac
Add flag default
2021-08-29 15:36:05 +09:00
e6c771a989
Add flag to disable error data sequence interrupt
2021-08-29 11:33:35 +09:00
0458091d42
Fix no need to reset endpoint here
2021-08-29 10:54:29 +09:00
182c3545e5
prepare out endpoint once, not on every call to usb_lld_start_out
2021-08-28 19:26:20 -04:00
b8934a2c9e
fix sending data
2021-08-28 14:35:31 -04:00
4568901a91
ht32: fix GCC 11 misleading indentation error
2021-08-28 10:23:24 -03:00
3ac83b6f69
Merge PR from xyzz
2021-08-28 20:38:22 +09:00
d98bf4c347
Fix set buffer control
2021-08-27 19:20:42 +09:00
b8d011c927
fix buffer offset calculation sending wrong data
...
it didn't include offset from base to USB_DPSRAM->DATA so with offset=0
it ended up sending back stale setup packet data
2021-08-26 23:01:49 -04:00
76053315d9
fix some usb bugs
...
now it can enumerate
2021-08-26 00:51:33 -04:00
fea5fe0b5b
Add USB driver, not working well
2021-08-25 20:15:28 +09:00
e762f8f765
Merge pull request #288 from KarlK90/gd32vf103-fix-adc-dma
...
[GD32VF103] Fix ADC0 DMA stream mapping
2021-08-16 11:10:20 +02:00
a94fead246
Workaround for NUC123 USB Endpoint 6 problem
2021-08-08 22:26:44 +09:00
2935adef79
Create usb_memcpy.S
2021-08-04 00:52:06 -04:00
7bc8efaee4
NUMICRO: Fix trivial but hard to find errors in USB LLD
2021-08-02 21:58:26 +09:00
e4790d23ae
Fix ADC0 DMA stream mapping
2021-07-23 14:05:15 +02:00
1310a8ce93
Merge pull request #287 from snazarkin/crc-patch-1
...
Don't include SW CRC if not requested
2021-07-21 21:00:09 +02:00
aa89629d2f
Merge pull request #285 from AndruPol/chibios-20.3.x
...
fixed erase in hal_efl_lld
2021-07-21 14:00:35 +02:00
3404e4d270
Don't include SW CRC if not requested
...
I've got build failure when enable CRC module on STM32. The reason is SW CRC header is included by default but not by compiler if ChibiOS-Contrib/os/various/ is not included into search path.
The fix includes only requested LL header.
2021-07-19 16:56:32 +03:00
e93de09f00
Replace packed struct definition with CMSIS one
2021-07-12 18:18:43 +01:00
4ace726d62
fixed erase in hal_efl_lld
2021-07-10 20:58:37 +03:00
34591368db
Merge pull request #284 from dron0gus/crc-fix
...
STM32: crc lld: in reversal mode should be changed for tailing half-word and byte
2021-07-10 17:08:30 +02:00
c9ea245068
Merge pull request #282 from AndruPol/chibios-20.3.x
...
nrf52 drivers
2021-07-10 16:57:09 +02:00
d4a0d9f0a9
STM32: crc lld: in reversal mode should be changed for tail
2021-07-05 23:25:28 +03:00
24ec55baa7
Free B4 pin on Longan Nano Board
...
By default B4 has the JTAG NJRST signal with a pull up enabled. On the longan Nano
this PIN is broken out as a regular pin. So we just disable NJRST by default
and make it available as a regular GPIO.
2021-07-03 13:50:03 +02:00
1021a7771f
Rename missed AFIO register names
2021-07-03 13:45:27 +02:00
2fab47aa3b
fixed get_descriptor
2021-07-03 07:34:59 +03:00
9fd3837bbf
changed gpt, added efl driver
2021-07-03 06:26:36 +03:00
f54249ae9a
Merge pull request #281 from AndruPol/chibios-20.3.x
...
added nrf52 uart driver, changed icu, radio drivers
2021-06-30 00:59:10 +02:00
d2ecd3c530
Merge branch 'chibios-20.3.x' into numicro-gross-fix
2021-06-28 22:00:36 +09:00
3dfa6a5905
added nrf52 uart driver, changed icu, radio drivers
2021-05-14 22:04:00 +03:00
e64aa96319
Fix Longan Nano Red LED define
2021-04-20 22:04:07 +02:00
0daa76501f
Add crc driver for gd32vf103
2021-04-20 15:09:07 +02:00
863082ac44
Remove unnecessary if clause
2021-04-15 14:49:43 +02:00
764203444a
Move DMA enable to init code, re-add spurious bus error clearance
2021-04-14 22:16:40 +02:00
6747713b04
Merge branch 'chibios-20.3.x' into nuc123-efl-fix
2021-04-08 20:17:24 +09:00
92eaded978
Merge branch 'chibios-20.3.x' into usbendpoints
2021-04-06 22:09:08 +02:00
31f37e99b0
Fix VBUSSENS for Longan Nano
2021-04-06 14:23:27 +02:00
35a04fc72c
Add myself to copyright notes :-)
2021-04-06 13:38:23 +02:00
d783126f55
Remove duplicate defines
2021-04-06 13:38:23 +02:00
b32f8bbeac
Move ECLIC IRQ triggers to driver files
2021-04-06 13:38:23 +02:00
5557082177
Update longan nano board
2021-04-06 13:38:23 +02:00
6e2b7317b0
Fix periodic tick timer
2021-04-06 13:38:23 +02:00
e90664f460
Add Sipeed Longan Nano Board
2021-04-06 13:38:23 +02:00
fcb66ed300
Add previously undefined constants
2021-04-06 13:38:23 +02:00
2463c10bd6
Explicitly define all capabilities in gd32registry
2021-04-06 13:38:23 +02:00
f39fb50760
Correct default values and usb prescaler defines
2021-04-06 13:38:23 +02:00
5dc6aa1d41
Add SystemCoreClock again
2021-04-06 13:38:23 +02:00
3c39240a6c
Rename STM32 to GD32
2021-04-06 13:38:23 +02:00
f093fe58b5
Remove STM32 registry
2021-04-06 13:38:23 +02:00
93c9c69644
Merge HAL files
2021-04-06 13:38:23 +02:00
cf2e6d4cea
Rename CMSIS header file to gd32vf103.h
2021-04-06 13:38:23 +02:00
4206c0469d
Remove unused RCU_CFG1 defines
2021-04-06 13:38:23 +02:00
e6822d95ed
Rename RCU registers
2021-04-06 13:38:23 +02:00
9ef3cfcc3d
Rename RCU_AHBENR
2021-04-06 13:38:23 +02:00
7262f2ed74
Rename RCU APB1RSTR register and remove unused peripherals
2021-04-06 13:38:23 +02:00
f6d7eda01b
Renumber SPI RCU defines to begin at 0
2021-04-06 13:38:23 +02:00
d304133046
Rename RCU_CIR and RCU_APB2RST registers
2021-04-06 13:38:23 +02:00
302e61bdcf
Remove unused USB OTG Defines
2021-04-06 13:38:23 +02:00
d25731f7cf
Delete unused exti and control defines
2021-04-06 13:38:23 +02:00
387ccb8dea
Renumber ADC peripherals to begin at 0
2021-04-06 13:38:22 +02:00
2cd74f3ea2
Replace GD32_DAC_DAC with GD32_DAC
2021-04-06 13:38:22 +02:00
c7e847a17a
Rename DAC1 to just DAC
2021-04-06 13:38:22 +02:00
389dbc2514
Remove unified can interrupts which are not present on this device
2021-04-06 13:38:22 +02:00
4ec485fdab
Renumber CAN peripherals to start from 0
2021-04-06 13:38:22 +02:00
b047b96764
Revert "remove 5..9 handler"
2021-04-06 13:38:22 +02:00
0104b80b23
GD32VF103 define rename
2021-04-06 13:38:22 +02:00
94397bdc43
Rename EXTI15_10 to EXTI10_15
2021-04-06 13:38:22 +02:00
b507bafbef
Rename missed adc registers
2021-04-06 13:38:22 +02:00
a3b80a3b3d
Rename EXTI registers, remove 5..9 handler
2021-04-06 13:38:22 +02:00
35256724ba
Rename f105 hal to gd32vf103 hal
2021-04-06 13:38:22 +02:00
1ea62bc82b
Rename RCU pll clock names
2021-04-06 13:38:22 +02:00
7636389126
Rename STM32 clocks to GD32 names
...
HSE -> HXTAL
LSE -> LXTAL
HSI -> IRC8M
LSI -> IRC40K
2021-04-06 13:38:22 +02:00
b8f128c86c
Rename EXMC -> FSMC
2021-04-06 13:38:22 +02:00
cc58c381f3
Rename BKP registers
2021-04-06 13:38:22 +02:00
53ddaa399b
Rename PMU register defines
2021-04-06 13:38:22 +02:00
fcb2d49c25
Rename STM32F1xx -> GD32VF103
2021-04-06 13:38:22 +02:00
116f34b808
Rename PWR -> PMU
2021-04-06 13:38:22 +02:00
4eef25ac2a
Rename RCU registers
2021-04-06 13:38:22 +02:00
66e83a4685
Rename RCC -> RCU
2021-04-06 13:38:22 +02:00
da97c812e5
Rename FLASH registers
2021-04-06 13:38:22 +02:00
4aa9da0f34
Rename ADC registers
2021-04-06 13:38:22 +02:00
14a840f775
Use NMSIS functions for periodic systick handling
2021-04-06 13:38:22 +02:00
0fb4a9b7d7
Renumber TIM to begin at 0
2021-04-06 13:38:22 +02:00
b2d27ad990
Remove timers not found on this device
2021-04-06 13:38:22 +02:00
3cfa2c8002
Rename TIM registers
2021-04-06 13:38:22 +02:00
a421b9821b
Rename Independent Watchdog registers
2021-04-06 13:38:22 +02:00
4f93d001a4
Renumber SPI to begin at 0
2021-04-06 13:38:22 +02:00
c384a54401
Remove I2S Peripherals not found on this device
2021-04-06 13:38:22 +02:00
3fb341f7a3
Rename i2s registers
2021-04-06 13:38:22 +02:00
bdc648d46b
Rename SPI registers
2021-04-06 13:38:22 +02:00
ccaf60ac66
Rename RTC registers
2021-04-06 13:38:22 +02:00
b4dd59eae6
Remove DAC features not found on this device
2021-04-06 13:38:22 +02:00
454aaddcee
Rename missing DAC register definitions
2021-04-06 13:38:22 +02:00
f48ec44d50
Rename DAC peripheral registers
2021-04-06 13:38:22 +02:00
07e53487e9
Rename missing CAN registers
2021-04-06 13:38:22 +02:00
004ed9d005
CAN Register renames
2021-04-06 13:38:22 +02:00
8539fe76bc
Add POC GD32 overclocking flags
2021-04-06 13:38:22 +02:00
cfdbcfe8d9
Remove CAN peripheral not present on this device
2021-04-06 13:38:22 +02:00
8d45fbc68c
Revert AFIO USART remapping register changes
2021-04-06 13:38:22 +02:00
c9cbc6d03c
No DMA for UART4
2021-04-06 13:38:22 +02:00
9ffb8cf58c
Rename UARTx to start at 0
2021-04-06 13:38:22 +02:00
3edcc0f80b
Rename USARTx to start at 0
2021-04-06 13:38:22 +02:00
031cd8325f
Remove USART peripherals not present in this device
2021-04-06 13:38:22 +02:00
9ddf61ae87
Rename USART registers
2021-04-06 13:38:22 +02:00
22b8934b7f
Rename I2C2 -> I2C1
2021-04-06 13:38:22 +02:00
ff5541e6c7
Rename I2C1 -> I2C0
2021-04-06 13:38:22 +02:00
ef39596f92
Add i2c fast mode plus
2021-04-06 13:38:22 +02:00
1aa20a7fa6
Correct DMA channel macros to start from 0
2021-04-06 13:38:22 +02:00
7178909bb1
Remove STM32F1x specific checks
2021-04-06 13:38:22 +02:00
73949757f4
Add fast mode plus stub
2021-04-06 13:38:22 +02:00
0058d3df0b
Rename I2C registers, add fast mode plus register
2021-04-06 13:38:22 +02:00
5a3ca17dd3
Remove I2C3 peripheral, as it isn't present in this chip
2021-04-06 13:38:22 +02:00
6f1d0ca1b4
Rename missed register, fix rename bug, otg done
2021-04-06 13:38:22 +02:00
27551a2282
Rename OTG device registers
2021-04-06 13:38:22 +02:00
3839d682cf
Rename missing otg host registers
2021-04-06 13:38:22 +02:00
3ef423ca8f
Remove otg stepping, continue rename registers usbfs
2021-04-06 13:38:22 +02:00
05a0aab253
Remove OTG definitions, those are present in gd32_otg.h
2021-04-06 13:38:22 +02:00
9dace8a9ce
Rename otg -> usbfs
2021-04-06 13:38:22 +02:00
3a51ec0bf3
Rename OTG1 -> USBFS
2021-04-06 13:38:22 +02:00
b8976b4fb5
Remove USB HS peripheral, start rename registers
2021-04-06 13:38:22 +02:00
11e6646370
Remove SD card interface defines
2021-04-06 13:38:22 +02:00
29be2ac3c3
Rename AFIO register definitions
2021-04-06 13:38:22 +02:00
2da7835bde
Rename GPIO registers
2021-04-06 13:38:22 +02:00
6a3caa697a
GPIO Remove obsolete ports, rename registers
2021-04-06 13:38:22 +02:00
adb9afc02b
Rename DMA CNDTR CPAR CMAR registers
2021-04-06 13:38:22 +02:00
5cec991524
Rename DMA CCR -> CTL
2021-04-06 13:38:22 +02:00
51b420e395
DMA rename IFCR -> INTC
2021-04-06 13:38:22 +02:00
186264dece
Rename DMA ISR register to INTF
2021-04-06 13:38:22 +02:00
962770882f
Rename DMA interrupt flags
2021-04-06 13:38:22 +02:00
1d3f664311
Add renumbered dma channel definitions
2021-04-06 13:38:22 +02:00
92646d6824
Rename DMA2 -> DMA1 and channels to start at zero
2021-04-06 13:38:22 +02:00
161449d7c3
Rename DMA1 -> DMA0 and channels to start at zero
2021-04-06 13:38:22 +02:00
f53e5a8b44
Remove DMA features not found on gd32vf103
2021-04-06 13:38:21 +02:00
7d90a998bf
Sort and deduplicate trigger handlers
2021-04-06 13:38:21 +02:00
352a6021f1
Rename stm32_ to gd32_ , remove obsolete tim headers
2021-04-06 13:38:21 +02:00
a9a4e46916
Replace STM32_ with GD32_
2021-04-06 13:38:21 +02:00
3467aa8ffe
Add STM32 HAL Drivers, already adjusted for eclic interrupts
2021-04-06 13:38:21 +02:00
ecf1e48c89
Add platform makefile
2021-04-06 13:38:21 +02:00
6b195cfc59
Add GD32 registry STM32 renames will follow
2021-04-06 13:38:21 +02:00
Joy
fauxpark
Fabien Poussin
Hanya
Alex Lewontin
bwisn
Ilya Zhuravlev
Ein Terakawa
Stefan Kerkmann
snazarkin
José Simões
andru
Andrey Gusakov
andru