Commit Graph

24 Commits

Author SHA1 Message Date
Fabien Poussin 499335cd61 TIMCAP: Initial commit 2016-02-16 00:51:22 +01:00
Fabien Poussin 9028916e8b EEPROM: Initial commit 2016-02-16 00:22:40 +01:00
Fabien Poussin 771feb098d USB-Host: Initial commit 2016-02-15 23:34:25 +01:00
barthess 2bc5a485a9 Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib 2016-01-24 20:42:00 +03:00
barthess 956134d0ba 1-wire driver improvements. 2016-01-24 20:41:06 +03:00
barthess c757be0c16 Fixed typo 2015-10-14 17:52:47 +03:00
barthess a2f9bc469a FSMC code cleanup 2015-10-14 17:46:40 +03:00
Michael Spradling fb8c390f06 Update code from code feedback 2015-08-16 23:51:41 -04:00
Michael Spradling 316c3b4825 Add CRC Driver
This patch includes a high level and two low level drivers.

The high level driver is enabled with flag HAL_USE_CRC

The low level drivers include:
    * Hardware CRC for the STM32 cortex processor lines.(when supported)
        * Enabled with flag STM32_CRC_USE_CRC1
        * DMA is enabled with CRC_USE_DMA
          * SYNC api will use DMA, but put calling thread to sleep
          * ASYNC api enabled.
        * DMA Disabled
          * SYNC api spin while calculating CRC
          * ASYNC api disabled
    * Software CRC (3 modes)
        * CRCSW_CRC32_TABLE - Enables crc32 with lookup table.
        * CRCSW_CRC16_TABLE - Enables crc16 with lookup tables.
        * CRCSW_PROGRAMMBLE - Enables any crc done with computation.
          * Can calculate any crc configuration.
        * CRC_USE_DMA obviously not support with software CRC
2015-08-16 01:26:07 -04:00
barthess dd7d31d083 Fixed copyright notes 2015-05-02 23:00:00 +03:00
barthess c44092eb0f NAND code changed to use bitmap class 2015-05-02 20:51:04 +03:00
barthess 0feccaa469 EICU. Updated authors. 2015-03-13 23:53:00 +03:00
barthess 8b2ddb7f2b EICU. Cosmetical improvements. 2015-03-03 21:10:03 +03:00
barthess 75688209c2 EICU now able to capture data on all channels 2015-03-03 19:01:28 +03:00
barthess 4764c3ba15 EICU. Fixed handlign of 32-bit timers. General code cleanup. PWM mode still untested. 2015-03-01 21:09:12 +03:00
barthess 8bb246b572 EICU. Fixed another portion of typos. 2015-03-01 16:25:09 +03:00
barthess 4e7a5796b4 Added EICU driver in HAL. Added STM32 backend for EICU. 2015-02-28 21:42:40 +03:00
barthess 073d4d467f 1-wire. STM32F1xx code tested 2014-12-18 00:21:28 +03:00
barthess 96bf25d2de 1-wire. Search ROM feature now optional 2014-12-06 21:29:08 +03:00
barthess 61263b2e91 1-wire. Improved comments 2014-12-06 21:10:14 +03:00
barthess 12da9781a0 Added onewire driver 2014-12-06 20:16:37 +03:00
barthess 4ab64b4e4e Fixed copyrights 2014-12-06 20:15:59 +03:00
barthess 809e59f6c3 Added hooks for community source 2014-11-16 13:51:14 +03:00
barthess 7355cbd461 Added fsmc code 2014-10-18 16:34:12 +03:00