barthess
bd47894d62
USB_MSD. Comment clean up.
2016-10-18 10:37:55 +03:00
Uladzimir Pylinski
aeb83bf0db
Merge pull request #95 from tixiv/onewire-fix
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Set sampling channel PWM output to disabled so the IO pin is free.
2016-10-18 10:35:29 +03:00
barthess
709addd02d
Updated include guards
2016-10-17 17:23:16 +03:00
barthess
ae0a3ca9de
USB_MSD. Initial commit.
2016-10-17 15:53:08 +03:00
Peter
d3185fa5b3
set sampling channel PWM output to disabled so the pin can be used
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otherwise
2016-08-28 18:09:28 +02:00
barthess
80b50d3935
[STM32 NAND] Code cleanup.
2016-08-18 11:25:08 +03:00
Stephane D'Alu
f75abd1037
added qeiAdjustI. added new field and checking in STM32
2016-07-07 21:25:51 +02:00
Stephane D'Alu
9c88423d66
move functions to hal_qei.*, fixed comments
2016-07-07 20:41:09 +02:00
Jonathan Struebel
71dc079032
Added USB HID driver to community HAL
2016-06-18 20:02:22 -07:00
barthess
5d20ce4595
1-wire. Pointless uint8_t changed to more suitable size_t.
2016-05-31 00:17:18 +03:00
barthess
b10e423406
1-wire improvements.
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1) Functions reading bit from PAL now return ioline_t type.
2) Functions that handle acquired buffer with acquired bits
now use uint8_t type because it corresponds to buffer type.
3) Cryptic bit shifting in bit storage functions replaced by
dividion operations because all modern compilers perfectly
optimise such operations.
2016-05-31 00:04:19 +03:00
Nicolas Reinecke
ec6cada170
qei driver: fix wrong type in qeiUpdate
2016-05-15 20:21:20 +02:00
Nicolas Reinecke
040c8c9ad2
qei driver: change copyright
2016-05-15 20:21:20 +02:00
Nicolas Reinecke
6f67aa78c3
add STM32 qei (quadrature encoder interface) driver
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Code from tinito in forum thread:
http://forum.chibios.org/phpbb/viewtopic.php?f=14&t=685
Updated to chibios trunk.
2016-05-08 18:27:11 +02:00
barthess
9d74dd2661
STM32 mass update to current naming convention in ChibiOS
2016-04-07 16:39:12 +03:00
barthess
c0e6748a9f
1-wire. Fixed possible deadlock situation.
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In old code thread could be suspended *after* the callback was called.
New code protected with more wide critical section.
2016-03-28 21:36:54 +03:00
barthess
53684030c9
QUEUES flags deleted from chconf.h files
2016-03-28 17:48:43 +03:00
Stephane D'Alu
e9a1a01f90
Merge branch 'master' into rng
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Added haltest
Conflicts:
os/hal/hal.mk
os/hal/include/hal_community.h
os/hal/src/hal_community.c
2016-02-21 17:03:19 +01:00
Fabien Poussin
499335cd61
TIMCAP: Initial commit
2016-02-16 00:51:22 +01:00
Fabien Poussin
9028916e8b
EEPROM: Initial commit
2016-02-16 00:22:40 +01:00
Fabien Poussin
771feb098d
USB-Host: Initial commit
2016-02-15 23:34:25 +01:00
Stephane D'Alu
d27b447106
cleanup
2016-02-09 00:55:35 +01:00
Stephane D'Alu
d9a3d8493c
Random Number Generator driver
2016-02-08 23:45:59 +01:00
barthess
2bc5a485a9
Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib
2016-01-24 20:42:00 +03:00
barthess
956134d0ba
1-wire driver improvements.
2016-01-24 20:41:06 +03:00
barthess
c757be0c16
Fixed typo
2015-10-14 17:52:47 +03:00
barthess
a2f9bc469a
FSMC code cleanup
2015-10-14 17:46:40 +03:00
Michael Spradling
fb8c390f06
Update code from code feedback
2015-08-16 23:51:41 -04:00
Michael Spradling
316c3b4825
Add CRC Driver
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This patch includes a high level and two low level drivers.
The high level driver is enabled with flag HAL_USE_CRC
The low level drivers include:
* Hardware CRC for the STM32 cortex processor lines.(when supported)
* Enabled with flag STM32_CRC_USE_CRC1
* DMA is enabled with CRC_USE_DMA
* SYNC api will use DMA, but put calling thread to sleep
* ASYNC api enabled.
* DMA Disabled
* SYNC api spin while calculating CRC
* ASYNC api disabled
* Software CRC (3 modes)
* CRCSW_CRC32_TABLE - Enables crc32 with lookup table.
* CRCSW_CRC16_TABLE - Enables crc16 with lookup tables.
* CRCSW_PROGRAMMBLE - Enables any crc done with computation.
* Can calculate any crc configuration.
* CRC_USE_DMA obviously not support with software CRC
2015-08-16 01:26:07 -04:00
barthess
f5b812a2e7
NAND. Minor improvements
2015-05-08 00:04:09 +03:00
barthess
dd7d31d083
Fixed copyright notes
2015-05-02 23:00:00 +03:00
barthess
c44092eb0f
NAND code changed to use bitmap class
2015-05-02 20:51:04 +03:00
barthess
0feccaa469
EICU. Updated authors.
2015-03-13 23:53:00 +03:00
barthess
4764c3ba15
EICU. Fixed handlign of 32-bit timers. General code cleanup. PWM mode still untested.
2015-03-01 21:09:12 +03:00
barthess
8bb246b572
EICU. Fixed another portion of typos.
2015-03-01 16:25:09 +03:00
barthess
4e7a5796b4
Added EICU driver in HAL. Added STM32 backend for EICU.
2015-02-28 21:42:40 +03:00
barthess
0c93d40779
[1-wire] Cosmetical cleanups
2014-12-27 22:18:30 +03:00
barthess
073d4d467f
1-wire. STM32F1xx code tested
2014-12-18 00:21:28 +03:00
barthess
99505cdea6
1-wire. Added workaround form F1xx MCUs
2014-12-14 14:14:45 +03:00
barthess
97be1351af
1-wire. Fixed incorrect debug check
2014-12-14 14:13:11 +03:00
barthess
911e7ef827
Onewire. Deleted unneded time measurement unig
2014-12-08 20:40:00 +03:00
barthess
96bf25d2de
1-wire. Search ROM feature now optional
2014-12-06 21:29:08 +03:00
barthess
61263b2e91
1-wire. Improved comments
2014-12-06 21:10:14 +03:00
barthess
12da9781a0
Added onewire driver
2014-12-06 20:16:37 +03:00
barthess
4ab64b4e4e
Fixed copyrights
2014-12-06 20:15:59 +03:00
barthess
809e59f6c3
Added hooks for community source
2014-11-16 13:51:14 +03:00
barthess
7355cbd461
Added fsmc code
2014-10-18 16:34:12 +03:00