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ChibiOS-Contrib
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1034 Commits

Author SHA1 Message Date
Fabien Poussin f54249ae9a
Merge pull request #281 from AndruPol/chibios-20.3.x 
added nrf52 uart driver, changed icu, radio drivers
 2021-06-30 00:59:10 +02:00
Fabien Poussin 172b9c344f
Merge pull request #279 from KarlK90/risc-v-irq-preemption-rv32e-support 
[RISC-V ECLIC] Add RV32E support and fix context switching in case of pre-empted interrupts
 2021-06-30 00:56:55 +02:00
Fabien Poussin 7ea6f3e8e4
Merge branch 'chibios-20.3.x' into kinetis-ldscripts 2021-06-30 00:54:54 +02:00
a_p_u_r_o d2ecd3c530
Merge branch 'chibios-20.3.x' into numicro-gross-fix 2021-06-28 22:00:36 +09:00
andru 3dfa6a5905 added nrf52 uart driver, changed icu, radio drivers 2021-05-14 22:04:00 +03:00
fauxpark c9d507e687 Add flash4-7 to MK64FX512 and MK66FX1M0 ldscripts 2021-05-14 21:58:12 +10:00
Stefan Kerkmann b5d78c64c4 Add RV32E support 
* Make SP 16 byte aligned as the risc-v abi wants it.
* Correct IRQ context check.
 2021-05-10 10:16:54 +02:00
Stefan Kerkmann 5e096e01c9 Context switch only on irq tail 2021-05-09 11:16:09 +02:00
Stefan Kerkmann 0a66a0660b Fix t0 restore when exiting interrupt 
An oversight when arrangeing the code according to the nucleisys docs,
t0 was overriden with the value of msubm and never actually restored. To
fix the issue we restore the csrs after the general purpose registers.
The offical docs want it the other way around but this should be fine as
well, as the interrupts are still globaly disabled at this point.
 2021-04-25 13:23:47 +02:00
Stefan Kerkmann e64aa96319 Fix Longan Nano Red LED define 2021-04-20 22:04:07 +02:00
Stefan Kerkmann 0daa76501f Add crc driver for gd32vf103 2021-04-20 15:09:07 +02:00
Stefan Kerkmann 9a64f5c17c Force machine mode on interrupt exit for context switches 
The first attempt to solve illegal instruction expections was made in commit
b875108cd0
 It seemed as this "fixed" the issue, but merely added delays in the code
 which prevented the error to appear in lucky circumstances. Interesting that this code worked in the first place.

Root cause for the expections where write attempts to mstatus in
user privilege mode which raised the illegal instruction exception which
is in spec with the risc-v privileged isa and documented in the
bumbleebee core architecture manual by nucleisys. The solution is
to never enter user mode by forceing mcause.mpp to 0x3
before calling mret when exiting the interrupt handler
for context switching.
 2021-04-17 19:36:44 +02:00
Stefan Kerkmann c1dfb65aa0 Revert "Add R/W memory and instruction barrier after mstatus access" 
This reverts commit b875108cd0.
 2021-04-16 21:52:41 +02:00
Fabien Poussin e9657f6468
Merge branch 'chibios-20.3.x' into gd32vf103-i2c-fix 2021-04-16 16:32:30 +02:00
Stefan Kerkmann b875108cd0 Add R/W memory and instruction barrier after mstatus access 
Fast subsequent reads and writes to the mstatus csr lead to
illegal instruction exceptions on the nucleisys bumblee core
of the gd32vf103. This behavior only occurred in high load
situations e.g. interrupt frequency of 5khz but reliably let
to these errors.  Adding the instruction and memory barriers solved
the problem. There is some negligible performance impact.
 2021-04-16 16:10:08 +02:00
Stefan Kerkmann 863082ac44 Remove unnecessary if clause 2021-04-15 14:49:43 +02:00
Stefan Kerkmann 764203444a Move DMA enable to init code, re-add spurious bus error clearance 2021-04-14 22:16:40 +02:00
a_p_u_r_o 6747713b04
Merge branch 'chibios-20.3.x' into nuc123-efl-fix 2021-04-08 20:17:24 +09:00
Fabien Poussin 92eaded978
Merge branch 'chibios-20.3.x' into usbendpoints 2021-04-06 22:09:08 +02:00
Stefan Kerkmann 31f37e99b0 Fix VBUSSENS for Longan Nano 2021-04-06 14:23:27 +02:00
Stefan Kerkmann 35a04fc72c Add myself to copyright notes :-) 2021-04-06 13:38:23 +02:00
Stefan Kerkmann d783126f55 Remove duplicate defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann b32f8bbeac Move ECLIC IRQ triggers to driver files 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 5557082177 Update longan nano board 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 6e2b7317b0 Fix periodic tick timer 2021-04-06 13:38:23 +02:00
Stefan Kerkmann e90664f460 Add Sipeed Longan Nano Board 2021-04-06 13:38:23 +02:00
Stefan Kerkmann fcb66ed300 Add previously undefined constants 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 2463c10bd6 Explicitly define all capabilities in gd32registry 2021-04-06 13:38:23 +02:00
Stefan Kerkmann f39fb50760 Correct default values and usb prescaler defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 5dc6aa1d41 Add SystemCoreClock again 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 3c39240a6c Rename STM32 to GD32 2021-04-06 13:38:23 +02:00
Stefan Kerkmann f093fe58b5 Remove STM32 registry 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 93c9c69644 Merge HAL files 2021-04-06 13:38:23 +02:00
Stefan Kerkmann cf2e6d4cea Rename CMSIS header file to gd32vf103.h 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 4206c0469d Remove unused RCU_CFG1 defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann e6822d95ed Rename RCU registers 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 9ef3cfcc3d Rename RCU_AHBENR 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 7262f2ed74 Rename RCU APB1RSTR register and remove unused peripherals 2021-04-06 13:38:23 +02:00
Stefan Kerkmann f6d7eda01b Renumber SPI RCU defines to begin at 0 2021-04-06 13:38:23 +02:00
Stefan Kerkmann d304133046 Rename RCU_CIR and RCU_APB2RST registers 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 302e61bdcf Remove unused USB OTG Defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann d25731f7cf Delete unused exti and control defines 2021-04-06 13:38:23 +02:00
Stefan Kerkmann 387ccb8dea Renumber ADC peripherals to begin at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 2cd74f3ea2 Replace GD32_DAC_DAC with GD32_DAC 2021-04-06 13:38:22 +02:00
Stefan Kerkmann c7e847a17a Rename DAC1 to just DAC 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 389dbc2514 Remove unified can interrupts which are not present on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 4ec485fdab Renumber CAN peripherals to start from 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b047b96764 Revert "remove 5..9 handler" 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 0104b80b23 GD32VF103 define rename 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 94397bdc43 Rename EXTI15_10 to EXTI10_15 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b507bafbef Rename missed adc registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann a3b80a3b3d Rename EXTI registers, remove 5..9 handler 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 35256724ba Rename f105 hal to gd32vf103 hal 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 1ea62bc82b Rename RCU pll clock names 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 7636389126 Rename STM32 clocks to GD32 names 
HSE -> HXTAL
LSE -> LXTAL
HSI -> IRC8M
LSI -> IRC40K
 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b8f128c86c Rename EXMC -> FSMC 2021-04-06 13:38:22 +02:00
Stefan Kerkmann cc58c381f3 Rename BKP registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 53ddaa399b Rename PMU register defines 2021-04-06 13:38:22 +02:00
Stefan Kerkmann fcb2d49c25 Rename STM32F1xx -> GD32VF103 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 116f34b808 Rename PWR -> PMU 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 4eef25ac2a Rename RCU registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 66e83a4685 Rename RCC -> RCU 2021-04-06 13:38:22 +02:00
Stefan Kerkmann da97c812e5 Rename FLASH registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 4aa9da0f34 Rename ADC registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 14a840f775 Use NMSIS functions for periodic systick handling 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 0fb4a9b7d7 Renumber TIM to begin at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b2d27ad990 Remove timers not found on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3cfa2c8002 Rename TIM registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann a421b9821b Rename Independent Watchdog registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 4f93d001a4 Renumber SPI to begin at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann c384a54401 Remove I2S Peripherals not found on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3fb341f7a3 Rename i2s registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann bdc648d46b Rename SPI registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann ccaf60ac66 Rename RTC registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann b4dd59eae6 Remove DAC features not found on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 454aaddcee Rename missing DAC register definitions 2021-04-06 13:38:22 +02:00
Stefan Kerkmann f48ec44d50 Rename DAC peripheral registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 07e53487e9 Rename missing CAN registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 004ed9d005 CAN Register renames 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 8539fe76bc Add POC GD32 overclocking flags 2021-04-06 13:38:22 +02:00
Stefan Kerkmann cfdbcfe8d9 Remove CAN peripheral not present on this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 8d45fbc68c Revert AFIO USART remapping register changes 2021-04-06 13:38:22 +02:00
Stefan Kerkmann c9cbc6d03c No DMA for UART4 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 9ffb8cf58c Rename UARTx to start at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3edcc0f80b Rename USARTx to start at 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 031cd8325f Remove USART peripherals not present in this device 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 9ddf61ae87 Rename USART registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 22b8934b7f Rename I2C2 -> I2C1 2021-04-06 13:38:22 +02:00
Stefan Kerkmann ff5541e6c7 Rename I2C1 -> I2C0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann ef39596f92 Add i2c fast mode plus 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 1aa20a7fa6 Correct DMA channel macros to start from 0 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 7178909bb1 Remove STM32F1x specific checks 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 73949757f4 Add fast mode plus stub 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 0058d3df0b Rename I2C registers, add fast mode plus register 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 5a3ca17dd3 Remove I2C3 peripheral, as it isn't present in this chip 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 6f1d0ca1b4 Rename missed register, fix rename bug, otg done 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 27551a2282 Rename OTG device registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3839d682cf Rename missing otg host registers 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 3ef423ca8f Remove otg stepping, continue rename registers usbfs 2021-04-06 13:38:22 +02:00
Stefan Kerkmann 05a0aab253 Remove OTG definitions, those are present in gd32_otg.h 2021-04-06 13:38:22 +02:00