314 lines
10 KiB
C
314 lines
10 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2021 Stefan Kerkmann
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file USART/hal_serial_lld.h
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* @brief GD32 low level serial driver header.
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*
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* @addtogroup SERIAL
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* @{
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*/
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#ifndef HAL_SERIAL_LLD_H
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#define HAL_SERIAL_LLD_H
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#if HAL_USE_SERIAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief USART0 driver enable switch.
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* @details If set to @p TRUE the support for USART0 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(GD32_SERIAL_USE_USART0) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USE_USART0 FALSE
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#endif
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/**
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* @brief USART1 driver enable switch.
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* @details If set to @p TRUE the support for USART1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(GD32_SERIAL_USE_USART1) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USE_USART1 FALSE
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#endif
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/**
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* @brief USART2 driver enable switch.
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* @details If set to @p TRUE the support for USART2 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(GD32_SERIAL_USE_USART2) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USE_USART2 FALSE
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#endif
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/**
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* @brief UART3 driver enable switch.
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* @details If set to @p TRUE the support for UART3 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(GD32_SERIAL_USE_UART3) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USE_UART3 FALSE
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#endif
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/**
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* @brief UART4 driver enable switch.
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* @details If set to @p TRUE the support for UART4 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(GD32_SERIAL_USE_UART4) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USE_UART4 FALSE
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#endif
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/**
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* @brief USART0 interrupt priority level setting.
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*/
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#if !defined(GD32_SERIAL_USART0_PRIORITY) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USART0_PRIORITY 12
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#endif
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/**
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* @brief USART1 interrupt priority level setting.
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*/
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#if !defined(GD32_SERIAL_USART1_PRIORITY) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USART1_PRIORITY 12
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#endif
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/**
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* @brief USART2 interrupt priority level setting.
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*/
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#if !defined(GD32_SERIAL_USART2_PRIORITY) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USART2_PRIORITY 12
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#endif
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/**
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* @brief UART3 interrupt priority level setting.
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*/
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#if !defined(GD32_SERIAL_UART3_PRIORITY) || defined(__DOXYGEN__)
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#define GD32_SERIAL_UART3_PRIORITY 12
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#endif
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/**
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* @brief UART4 interrupt priority level setting.
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*/
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#if !defined(GD32_SERIAL_UART4_PRIORITY) || defined(__DOXYGEN__)
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#define GD32_SERIAL_UART4_PRIORITY 12
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#endif
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/**
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* @brief USART0 interrupt trigger setting.
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*/
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#if !defined(GD32_SERIAL_USART0_TRIGGER) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USART0_TRIGGER ECLIC_TRIGGER_DEFAULT
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#endif
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/**
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* @brief USART1 interrupt trigger setting.
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*/
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#if !defined(GD32_SERIAL_USART1_TRIGGER) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USART1_TRIGGER ECLIC_TRIGGER_DEFAULT
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#endif
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/**
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* @brief USART2 interrupt trigger setting.
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*/
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#if !defined(GD32_SERIAL_USART2_TRIGGER) || defined(__DOXYGEN__)
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#define GD32_SERIAL_USART2_TRIGGER ECLIC_TRIGGER_DEFAULT
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#endif
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/**
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* @brief UART3 interrupt trigger setting.
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*/
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#if !defined(GD32_SERIAL_UART3_TRIGGER) || defined(__DOXYGEN__)
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#define GD32_SERIAL_UART3_TRIGGER ECLIC_TRIGGER_DEFAULT
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#endif
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/**
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* @brief UART4 interrupt trigger setting.
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*/
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#if !defined(GD32_SERIAL_UART4_TRIGGER) || defined(__DOXYGEN__)
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#define GD32_SERIAL_UART4_TRIGGER ECLIC_TRIGGER_DEFAULT
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if GD32_SERIAL_USE_USART0 && !GD32_HAS_USART0
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#error "USART0 not present in the selected device"
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#endif
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#if GD32_SERIAL_USE_USART1 && !GD32_HAS_USART1
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#error "USART1 not present in the selected device"
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#endif
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#if GD32_SERIAL_USE_USART2 && !GD32_HAS_USART2
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#error "USART2 not present in the selected device"
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#endif
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#if GD32_SERIAL_USE_UART3 && !GD32_HAS_UART3
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#error "UART3 not present in the selected device"
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#endif
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#if GD32_SERIAL_USE_UART4 && !GD32_HAS_UART4
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#error "UART4 not present in the selected device"
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#endif
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#if !GD32_SERIAL_USE_USART0 && !GD32_SERIAL_USE_USART1 && \
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!GD32_SERIAL_USE_USART2 && !GD32_SERIAL_USE_UART3 && \
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!GD32_SERIAL_USE_UART4
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#error "SERIAL driver activated but no USART/UART peripheral assigned"
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#endif
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#if GD32_SERIAL_USE_USART0 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(GD32_SERIAL_USART0_PRIORITY)
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#error "Invalid IRQ priority assigned to USART0"
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#endif
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#if GD32_SERIAL_USE_USART1 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(GD32_SERIAL_USART1_PRIORITY)
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#error "Invalid IRQ priority assigned to USART1"
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#endif
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#if GD32_SERIAL_USE_USART2 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(GD32_SERIAL_USART2_PRIORITY)
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#error "Invalid IRQ priority assigned to USART2"
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#endif
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#if GD32_SERIAL_USE_UART3 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(GD32_SERIAL_UART3_PRIORITY)
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#error "Invalid IRQ priority assigned to UART3"
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#endif
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#if GD32_SERIAL_USE_UART4 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(GD32_SERIAL_UART4_PRIORITY)
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#error "Invalid IRQ priority assigned to UART4"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief GD32 Serial Driver configuration structure.
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* @details An instance of this structure must be passed to @p sdStart()
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* in order to configure and start a serial driver operations.
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* @note This structure content is architecture dependent, each driver
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* implementation defines its own version and the custom static
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* initializers.
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*/
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typedef struct {
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/**
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* @brief Bit rate.
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*/
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uint32_t speed;
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/* End of the mandatory fields.*/
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/**
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* @brief Initialization value for the CTL0 register.
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*/
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uint16_t ctl0;
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/**
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* @brief Initialization value for the CTL1 register.
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*/
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uint16_t ctl1;
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/**
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* @brief Initialization value for the CTL2 register.
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*/
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uint16_t ctl2;
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} SerialConfig;
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/**
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* @brief @p SerialDriver specific data.
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*/
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#define _serial_driver_data \
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_base_asynchronous_channel_data \
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/* Driver state.*/ \
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sdstate_t state; \
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/* Input queue.*/ \
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input_queue_t iqueue; \
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/* Output queue.*/ \
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output_queue_t oqueue; \
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/* Input circular buffer.*/ \
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uint8_t ib[SERIAL_BUFFERS_SIZE]; \
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/* Output circular buffer.*/ \
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uint8_t ob[SERIAL_BUFFERS_SIZE]; \
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/* End of the mandatory fields.*/ \
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/* Pointer to the USART registers block.*/ \
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USART_TypeDef *usart; \
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/* Mask to be applied on received frames.*/ \
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uint8_t rxmask;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*
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* Extra USARTs definitions here (missing from the ST header file).
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*/
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#define USART_CTL1_STB1_BITS (0 << 12) /**< @brief CR2 1 stop bit value.*/
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#define USART_CTL1_STB0P5_BITS (1 << 12) /**< @brief CR2 0.5 stop bit value.*/
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#define USART_CTL1_STB2_BITS (2 << 12) /**< @brief CR2 2 stop bit value.*/
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#define USART_CTL1_STB1P5_BITS (3 << 12) /**< @brief CR2 1.5 stop bit value.*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if GD32_SERIAL_USE_USART0 && !defined(__DOXYGEN__)
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extern SerialDriver SD1;
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#endif
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#if GD32_SERIAL_USE_USART1 && !defined(__DOXYGEN__)
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extern SerialDriver SD2;
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#endif
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#if GD32_SERIAL_USE_USART2 && !defined(__DOXYGEN__)
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extern SerialDriver SD3;
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#endif
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#if GD32_SERIAL_USE_UART3 && !defined(__DOXYGEN__)
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extern SerialDriver SD4;
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#endif
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#if GD32_SERIAL_USE_UART4 && !defined(__DOXYGEN__)
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extern SerialDriver SD5;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void sd_lld_init(void);
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void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
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void sd_lld_stop(SerialDriver *sdp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SERIAL */
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#endif /* HAL_SERIAL_LLD_H */
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/** @} */
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