124 lines
4.5 KiB
C
124 lines
4.5 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Copyright (C) 2020 Yaotian Feng
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file hal_lld.c
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* @brief PLATFORM HAL subsystem low level driver source.
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*
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* @addtogroup HAL
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* @{
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*/
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#include "hal.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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void ht32_clock_init(void) {
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// Enable backup domain. Needed for USB
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CKCU->LPCR = CKCU_LPCR_BKISO;
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CKCU->APBCCR1 |= CKCU_APBCCR1_BKPREN;
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while (PWRCU->BAKTEST != 0x27);
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#if HT32_CKCU_SW == CKCU_GCCR_SW_HSE
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// Enable HSE
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CKCU->GCCR |= CKCU_GCCR_HSEEN;
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while ((CKCU->GCSR & CKCU_GCSR_HSERDY) == 0); // wait for HSE ready
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#endif
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#if HT32_CKCU_SW == CKCU_GCCR_SW_PLL
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// Configure PLL
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#if HT32_PLL_USE_HSE == TRUE
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CKCU->GCFGR &= ~CKCU_GCFGR_PLLSRC; // HSE as PLL source
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#else
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CKCU->GCFGR |= CKCU_GCFGR_PLLSRC; // HSI as PLL source
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#endif
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CKCU->PLLCFGR = ((HT32_PLL_FBDIV & 0x3F) << 23) | ((HT32_PLL_OTDIV & 0x3) << 21);
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CKCU->GCCR |= CKCU_GCCR_PLLEN; // enable PLL
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while ((CKCU->GCSR & CKCU_GCSR_PLLRDY) == 0); // wait for PLL ready
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#endif
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// flash wait states for core clock frequencies
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#if HT32_CK_AHB_FREQUENCY > 48000000
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FMC->CFCR = (FMC->CFCR & ~FMC_CFCR_WAIT_MASK) | FMC_CFCR_WAIT_2;
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#elif HT32_CK_AHB_FREQUENCY > 24000000
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FMC->CFCR = (FMC->CFCR & ~FMC_CFCR_WAIT_MASK) | FMC_CFCR_WAIT_1;
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#else
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FMC->CFCR = (FMC->CFCR & ~FMC_CFCR_WAIT_MASK) | FMC_CFCR_WAIT_0;
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#endif
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// AHB prescaler
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#if HT32_AHB_PRESCALER == 1 || HT32_AHB_PRESCALER == 2
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CKCU->AHBCFGR = (CKCU->AHBCFGR & ~CKCU_AHBCFGR_AHBPRE_MASK) | (HT32_AHB_PRESCALER - 1);
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#elif HT32_AHB_PRESCALER == 4
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CKCU->AHBCFGR = (CKCU->AHBCFGR & ~CKCU_AHBCFGR_AHBPRE_MASK) | (2);
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#elif HT32_AHB_PRESCALER == 8
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CKCU->AHBCFGR = (CKCU->AHBCFGR & ~CKCU_AHBCFGR_AHBPRE_MASK) | (3);
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#else
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#error "Invalid AHB_PRESCALER value"
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#endif
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// Clock switch
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CKCU->GCCR = (CKCU->GCCR & ~CKCU_GCCR_SW_MASK) | HT32_CKCU_SW;
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while ((CKCU->GCCR & CKCU_GCCR_SW_MASK) != HT32_CKCU_SW); // wait for clock switch
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// HSI is needed for flash erase/write for some reason.
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// Only disable if you will not need to erase/write memory
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// with your debug probe after this firmware has booted.
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// /* CKCU->GCCR &= ~CKCU_GCCR_HSIEN; */
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#if defined(HT32F1653_4)
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// Peripheral prescalers are not available on HT32F1655/6
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// So make sure all prescalers are 1x on HT32F1653/4
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CKCU->APBPCSR0 = 0;
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CKCU->APBPCSR1 = 0;
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#endif
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}
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/**
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* @brief Low level HAL driver initialization.
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*
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* @notapi
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*/
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void hal_lld_init(void) {
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ht32_clock_init();
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}
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/** @} */
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