377 lines
11 KiB
C
377 lines
11 KiB
C
/*
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Copyright (C) 2014..2016 Marco Veeneman
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file TIVA/TM4C129x/hal_lld.h
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* @brief TM4C129x HAL subsystem low level driver header.
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* @pre This module requires the following macros to be defined in the
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* @p board.h file:
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* - TODO: add required macros
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*
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* @addtogroup HAL
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* @{
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*/
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#ifndef HAL_LLD_H
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#define HAL_LLD_H
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#include "tiva_registry.h"
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name Platform identification
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* @{
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*/
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#define PLATFORM_NAME "Tiva C Series TM4C129x"
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/**
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* @}
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*/
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/**
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* @name RIS register bits definitions
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* @{
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*/
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#define SYSCTL_RIS_PLLLRIS (1 << 6)
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#define SYSCTL_RIS_MOSCPUPRIS (1 << 8)
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/**
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* @}
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*/
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/**
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* @name MOSCCTL register bits definitions
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* @{
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*/
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#define MOSCCTL_CVAL (1 << 0)
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#define MOSCCTL_MOSCIM (1 << 1)
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#define MOSCCTL_NOXTAL (1 << 2)
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#define MOSCCTL_PWRDN (1 << 3)
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#define MOSCCTL_OSCRNG (1 << 4)
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/**
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* @}
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*/
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/**
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* @name RSCLKCFG register bits definitions
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* @{
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*/
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#define RSCLKCFG_PSYSDIV_bm (0xfffff << 0)
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#define RSCLKCFG_OSYSDIV_bm (0xfffff << 10
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#define RSCLKCFG_OSCSRC_bm (0xff << 20)
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#define RSCLKCFG_OSCSRC_PIOSC (0 << 20)
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#define RSCLKCFG_OSCSRC_LFIOSC (0x02 << 20)
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#define RSCLKCFG_OSCSRC_MOSC (0x03 << 20)
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#define RSCLKCFG_OSCSRC_RTCOSC (0x04 << 20)
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#define RSCLKCFG_PLLSRC_bm (0xff << 24)
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#define RSCLKCFG_PLLSRC_PIOSC (0 << 24)
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#define RSCLKCFG_PLLSRC_MOSC (0x03 << 24)
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#define RSCLKCFG_USEPLL (1 << 28)
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#define RSCLKCFG_ACG (1 << 29)
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#define RSCLKCFG_NEWFREQ (1 << 30)
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#define RSCLKCFG_MEMTIMU (1 << 31)
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/**
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* @}
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*/
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/**
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* @name PLLFREQ0 register bits definitions
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* The PLL frequency can be calculated using the following equation:
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* fVCO = (fIN * MDIV)
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* where
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* fIN = fXTAL/(Q+1)(N+1) or fPIOSC/(Q+1)(N+1)
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* MDIV = MINT + (MFRAC / 1024)
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* The Q and N values are programmed in the PLLFREQ1 register. Note that to reduce jitter, MFRAC
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* should be programmed to 0x0.
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* @{
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*/
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#define PLLFREQ0_MINT_bm (0xfffff << 0)
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#define PLLFREQ0_MFRAC_bm (0xfffff << 10)
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#define PLLFREQ0_PLLPWR (1 << 23)
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/**
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* @}
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*/
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/**
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* @name PLLFREQ1 register bits definitions
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* @{
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*/
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#define PLLFREQ1_N_bm (0x7ff << 0)
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#define PLLFREQ1_Q_bm (0x7ff << 8)
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/**
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* @}
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*/
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/**
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* @name MEMTIM0 register bits definitions
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* @{
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*/
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#define MEMTIM0_FWS_bm (0xff << 0)
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#define MEMTIM0_FWS_0 (0x00 << 0)
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#define MEMTIM0_FWS_1 (0x01 << 0)
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#define MEMTIM0_FWS_2 (0x02 << 0)
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#define MEMTIM0_FWS_3 (0x03 << 0)
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#define MEMTIM0_FWS_4 (0x04 << 0)
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#define MEMTIM0_FWS_5 (0x05 << 0)
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#define MEMTIM0_FWS_6 (0x06 << 0)
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#define MEMTIM0_FWS_7 (0x07 << 0)
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#define MEMTIM0_FBCE (1 << 5)
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#define MEMTIM0_FBCHT_bm (0xff << 6)
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#define MEMTIM0_FBCHT_0_5 (0x00 << 6)
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#define MEMTIM0_FBCHT_1 (0x01 << 6)
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#define MEMTIM0_FBCHT_1_5 (0x02 << 6)
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#define MEMTIM0_FBCHT_2 (0x03 << 6)
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#define MEMTIM0_FBCHT_2_5 (0x04 << 6)
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#define MEMTIM0_FBCHT_3 (0x05 << 6)
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#define MEMTIM0_FBCHT_3_5 (0x06 << 6)
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#define MEMTIM0_FBCHT_4 (0x07 << 6)
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#define MEMTIM0_FBCHT_4_5 (0x08 << 6)
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#define MEMTIM0_EWS_bm (0xff << 16)
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#define MEMTIM0_EWS_0 (0x00 << 16)
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#define MEMTIM0_EWS_1 (0x01 << 16)
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#define MEMTIM0_EWS_2 (0x02 << 16)
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#define MEMTIM0_EWS_3 (0x03 << 16)
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#define MEMTIM0_EWS_4 (0x04 << 16)
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#define MEMTIM0_EWS_5 (0x05 << 16)
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#define MEMTIM0_EWS_6 (0x06 << 16)
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#define MEMTIM0_EWS_7 (0x07 << 16)
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#define MEMTIM0_EBCE (1 << 21)
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#define MEMTIM0_EBCHT_bm (0xff << 22)
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#define MEMTIM0_EBCHT_0_5 (0x00 << 22)
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#define MEMTIM0_EBCHT_1 (0x01 << 22)
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#define MEMTIM0_EBCHT_1_5 (0x02 << 22)
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#define MEMTIM0_EBCHT_2 (0x03 << 22)
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#define MEMTIM0_EBCHT_2_5 (0x04 << 22)
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#define MEMTIM0_EBCHT_3 (0x05 << 22)
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#define MEMTIM0_EBCHT_3_5 (0x06 << 22)
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#define MEMTIM0_EBCHT_4 (0x07 << 22)
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#define MEMTIM0_EBCHT_4_5 (0x08 << 22)
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// XXX: what is this?
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#define MEMTIM0_MB1 0x00100010 // MB1 = Must be one
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/**
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* @}
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*/
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/**
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* @name PLLSTAT register bits definitions
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* @{
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*/
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#define PLLSTAT_LOCK (1 << 0)
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/**
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* @}
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*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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#if !defined(TIVA_MOSC_SINGLE_ENDED)
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#define TIVA_MOSC_SINGLE_ENDED FALSE
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#endif
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#if !defined(TIVA_RSCLKCFG_OSCSRC)
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#define TIVA_RSCLKCFG_OSCSRC RSCLKCFG_OSCSRC_MOSC
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*
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* Configuration-related checks.
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*/
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#if !defined(TM4C129x_MCUCONF)
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#error "Using a wrong mcuconf.h file, TM4C129x_MCUCONF not defined"
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#endif
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/*
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* Oscillator-related checks.
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*/
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#if !(TIVA_RSCLKCFG_OSCSRC == RSCLKCFG_OSCSRC_PIOSC) && \
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!(TIVA_RSCLKCFG_OSCSRC == RSCLKCFG_OSCSRC_LFIOSC) && \
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!(TIVA_RSCLKCFG_OSCSRC == RSCLKCFG_OSCSRC_MOSC) && \
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!(TIVA_RSCLKCFG_OSCSRC == RSCLKCFG_OSCSRC_RTCOSC)
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#error "Invalid value for TIVA_RSCLKCFG_OSCSRC defined"
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#endif
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#if TIVA_XTAL_VALUE == 4000000
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#define TIVA_XTAL_ (0x06 << 6)
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#elif TIVA_XTAL_VALUE == 4096000
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#define TIVA_XTAL_ (0x07 << 6)
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#elif TIVA_XTAL_VALUE == 4915200
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#define TIVA_XTAL_ (0x08 << 6)
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#elif TIVA_XTAL_VALUE == 5000000
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#define TIVA_XTAL_ (0x09 << 6)
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#elif TIVA_XTAL_VALUE == 5120000
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#define TIVA_XTAL_ (0x0a << 6)
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#elif TIVA_XTAL_VALUE == 6000000
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#define TIVA_XTAL_ (0x0b << 6)
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#elif TIVA_XTAL_VALUE == 6144000
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#define TIVA_XTAL_ (0x0c << 6)
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#elif TIVA_XTAL_VALUE == 7372800
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#define TIVA_XTAL_ (0x0d << 6)
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#elif TIVA_XTAL_VALUE == 8000000
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#define TIVA_XTAL_ (0x0e << 6)
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#elif TIVA_XTAL_VALUE == 8192000
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#define TIVA_XTAL_ (0x0f << 6)
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#elif TIVA_XTAL_VALUE == 10000000
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#define TIVA_XTAL_ (0x10 << 6)
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#elif TIVA_XTAL_VALUE == 12000000
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#define TIVA_XTAL_ (0x11 << 6)
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#elif TIVA_XTAL_VALUE == 12288000
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#define TIVA_XTAL_ (0x12 << 6)
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#elif TIVA_XTAL_VALUE == 13560000
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#define TIVA_XTAL_ (0x13 << 6)
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#elif TIVA_XTAL_VALUE == 14318180
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#define TIVA_XTAL_ (0x14 << 6)
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#elif TIVA_XTAL_VALUE == 16000000
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#define TIVA_XTAL_ (0x15 << 6)
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#elif TIVA_XTAL_VALUE == 16384000
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#define TIVA_XTAL_ (0x16 << 6)
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#elif TIVA_XTAL_VALUE == 18000000
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#define TIVA_XTAL_ (0x17 << 6)
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#elif TIVA_XTAL_VALUE == 20000000
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#define TIVA_XTAL_ (0x18 << 6)
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#elif TIVA_XTAL_VALUE == 24000000
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#define TIVA_XTAL_ (0x19 << 6)
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#elif TIVA_XTAL_VALUE == 25000000
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#define TIVA_XTAL_ (0x1a << 6)
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#else
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#error "Invalid value for TIVA_XTAL_VALUE defined"
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#endif
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/*
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#if TIVA_MOSC_ENABLE == TRUE
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#define TIVA_MOSCDIS (0 << 0)
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#define TIVA_XTAL TIVA_XTAL_
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#elif TIVA_MOSC_ENABLE == FALSE
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#define TIVA_MOSCDIS (1 << 0)
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#define TIVA_XTAL 0
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#else
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#error "Invalid value for TIVA_MOSC_ENABLE defined"
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#endif
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#if TIVA_DIV400_ENABLE == TRUE
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#define TIVA_DIV400 (1 << 30)
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#elif TIVA_DIV400_ENABLE == FALSE
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#define TIVA_DIV400 (0 << 30)
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#else
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#error "Invalid value for TIVA_DIV400_ENABLE defined"
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#endif
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#if (TIVA_SYSDIV_VALUE >= 0x02) && (TIVA_SYSDIV_VALUE <= 0x3f)
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#define TIVA_SYSDIV (TIVA_SYSDIV_VALUE << 23)
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#define TIVA_SYSDIV2 (TIVA_SYSDIV_VALUE << 23)
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#else
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#error "Invalid value for TIVA_SYSDIV_VALUE defined"
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#endif
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#if TIVA_USESYSDIV_ENABLE == TRUE
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#define TIVA_USESYSDIV (1 << 22)
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#elif TIVA_USESYSDIV_ENABLE == FALSE
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#define TIVA_USESYSDIV (0 << 22)
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#else
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#error "Invalid value for TIVA_USESYSDIV_ENABLE defined"
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#endif
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#if TIVA_SYSDIV2LSB_ENABLE == TRUE
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#define TIVA_SYSDIV2LSB (1 << 22)
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#elif TIVA_SYSDIV2LSB_ENABLE == FALSE
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#define TIVA_SYSDIV2LSB (0 << 22)
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#else
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#error "Invalid value for TIVA_SYSDIV2LSB_ENABLE defined"
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#endif
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#if TIVA_BYPASS_ENABLE == TRUE
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#define TIVA_SRC 16000000
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#define TIVA_BYPASS (1 << 11)
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#elif TIVA_BYPASS_ENABLE == FALSE
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#define TIVA_SRC (200000000 + ((TIVA_DIV400 >> 30) * 200000000))
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#define TIVA_BYPASS (0 << 11)
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#else
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#error "Invalid value for TIVA_BYPASS_ENABLE defined"
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#endif
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#if (TIVA_OSCSRC == TIVA_RCC_OSCSRC_MOSC) && (TIVA_MOSC_ENABLE == FALSE)
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#error "Main Oscillator selected but not enabled"
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#endif
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*/
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/*
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* System Clock calculation
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* TODO: dynamic TIVA_SYSCLK value
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*/
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#define TIVA_SYSCLK 120000000
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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/* Various helpers.*/
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#include "nvic.h"
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#include "tiva_isr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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void hal_lld_init(void);
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void tiva_clock_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_LLD_H */
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/**
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* @}
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*/
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