226 lines
6.3 KiB
C
226 lines
6.3 KiB
C
/*
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Copyright (C) 2020 Alex Lewontin
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Copyright (C) 2019 /u/KeepItUnder
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file NUC123/hal_lld.h
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* @brief NUC123 HAL subsystem low level driver header.
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* @pre This module requires the following macros to be defined in the
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* @p board.h file:
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* - NUC123_HSECLK.
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* - NUC123_HSE_BYPASS (optionally).
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* .
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*
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* @addtogroup HAL
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* @{
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*/
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#ifndef HAL_LLD_H
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#define HAL_LLD_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name Platform identification macros
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* @{
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*/
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#if defined(NUC123SD4AN0) || defined(__DOXYGEN__)
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#define PLATFORM_NAME "NUC123SD4AN0 NUC123 Cortex M0 USB Micro"
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#define NUC123xxxANx
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#undef NUC123xxxAEx
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#else
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#error "NUC123 device unsupported or not specified"
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#endif
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/* TODO: Add other NUC123xxxxxx versions */
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/** @} */
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/**
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* @name Absolute Maximum Ratings
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* @{
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*/
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/**
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* @brief Maximum HSE clock frequency.
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*/
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#define NUC123_HSECLK_MAX 24000000
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/**
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* @brief Minimum HSE clock frequency.
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*/
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#define NUC123_HSECLK_MIN 4000000
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/**
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* @brief Minimum PLL frequency.
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*/
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#define NUC123_PLLCLK_MIN 25000000UL
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/**
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* @brief Maximum PLL frequency.
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*/
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#define NUC123_PLLCLK_MAX 144000000UL
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/**
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* @brief Minimum HCLK divider value.
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*/
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#define NUC123_HCLKDIV_MIN 1
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/**
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* @brief Maximum HCLK divider value.
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*/
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#define NUC123_HCLKDIV_MAX 16
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/** @} */
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/**
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* @name Internal clock sources
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* @{
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*/
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#define NUC123_HSICLK __HIRC /**< High speed internal clock. */
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#define NUC123_LSICLK __LIRC /**< Low speed internal clock. */
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/** @} */
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/**
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* @name HCLK_S bit definitions
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* @{
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*/
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#define NUC123_HCLKSRC_HSE (0 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is HSE. */
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#define NUC123_HCLKSRC_PLL_2 (1 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is PLL/2. */
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#define NUC123_HCLKSRC_PLL (2 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is PLL. */
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#define NUC123_HCLKSRC_LSI (3 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is LSI. */
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#define NUC123_HCLKSRC_HSI (7 << CLK_CLKSEL0_HCLK_S_Pos) /**< HCLK source is HSI. */
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/** @} */
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/**
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* @name PLL_SRC bit definitions
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* @{
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*/
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#define NUC123_PLLSRC_HSE (0 << CLK_PLLCON_PLL_SRC_Pos) /**< PLL source is HSE. */
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#define NUC123_PLLSRC_HSI (1 << CLK_PLLCON_PLL_SRC_Pos) /**< PLL source is HSI. */
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name NUMICRO configuration options
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* @{
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*/
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/**
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* @brief Disables the PWR/RCC initialization in the HAL.
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*/
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#if !defined(NUC123_NO_INIT) || defined(__DOXYGEN__)
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#define NUC123_NO_INIT FALSE
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#endif
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/**
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* @brief Enables or disables the HSI clock source.
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*/
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#if !defined(NUC123_HSI_ENABLED) || defined(__DOXYGEN__)
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#define NUC123_HSI_ENABLED TRUE
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#endif
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/**
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* @brief Enables or disables the LSI clock source.
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*/
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#if !defined(NUC123_LSI_ENABLED) || defined(__DOXYGEN__)
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#define NUC123_LSI_ENABLED FALSE
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#endif
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/**
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* @brief Enables or disables the HSE clock source.
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*/
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#if !defined(NUC123_HSE_ENABLED) || defined(__DOXYGEN__)
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#define NUC123_HSE_ENABLED TRUE
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#endif
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/**
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* @brief Enables or disables PLL
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*/
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#if !defined(NUC123_PLL_ENABLED) || defined(__DOXYGEN__)
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#define NUC123_PLL_ENABLED FALSE
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#endif
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/**
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* @brief Clock source for the PLL.
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*/
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#if !defined(NUC123_HCLK) || defined(__DOXYGEN__)
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#define NUC123_HCLK 72000000UL
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*
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* Configuration-related checks.
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*/
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#if !defined(NUC123_MCUCONF)
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#error "Using a wrong mcuconf.h file, NUC123_MCUCONF not defined"
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#endif
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/*
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* HSE checks.
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*/
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#if NUC123_HSE_ENABLED
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#if !defined(NUC123_HSECLK)
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#error "HSE frequency not defined"
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#elif (NUC123_HSECLK < NUC123_HSECLK_MIN) || (NUC123_HSECLK > NUC123_HSECLK_MAX)
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#error "NUC123_HSECLK outside acceptable range (NUC123_HSECLK_MIN...NUC123_HSECLK_MAX)"
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#endif
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#endif
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#define NUC123_PLLCLK (NUC123_HCLK * 2)
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/* Alias for compatibility */
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#define SystemUnlockReg() UNLOCKREG()
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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/* Various helpers */
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#include "NUC123.h"
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#include "nuc123_isr.h"
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#include "nuc123_registry.h"
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#include "nvic.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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void hal_lld_init(void);
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void NUC123_clock_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _HAL_LLD_H_ */
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/** @} */
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