250 lines
6.9 KiB
C
250 lines
6.9 KiB
C
/*
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ChibiOS - Copyright (C) 2015 Michael D. Spradling
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/CRCv1/crc_lld.h
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* @brief STM32 CRC subsystem low level driver header.
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*
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* @addtogroup CRC
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* @{
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*/
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#ifndef _CRC_LLD_H_
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#define _CRC_LLD_H_
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#if (HAL_USE_CRC = TRUE) || defined(__DOXYGEN__)
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/*
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* This error check must occur outsite of CRCSW_USE_CRC1 to check if
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* two LLD drivers are enabled at the same time
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*/
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#if STM32_CRC_USE_CRC1 == TRUE && \
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CRCSW_USE_CRC1 == TRUE
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#error "Software CRC can't be enable with STM32_CRC_USE_CRC1"
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#endif
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/**
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* Allow CRC Software override for ST drivers. Some ST CRC implimentations
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* have limited capabilities.
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*/
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#if CRCSW_USE_CRC1 != TRUE
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief CRC1 driver enable switch.
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* @details If set to @p TRUE the support for CRC1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_CRC_USE_CRC1) || defined(__DOXYGEN__)
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#define STM32_CRC_USE_CRC1 FALSE
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#endif
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/**
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* @brief CRC1 DMA priority (0..3|lowest..highest).
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* @note The priority level is for CRC DMA stream.
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*/
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#if !defined(STM32_CRC_CRC1_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_CRC_CRC1_DMA_PRIORITY 2
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#endif
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/**
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* @brief CRC1 DMA interrupt priority level setting.
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*/
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#if !defined(STM32_CRC_CRC1_DMA_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_CRC_CRC1_DMA_IRQ_PRIORITY 1
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#endif
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/**
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* @brief CRC1 DMA STREAM to use when performing CRC calculation.
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*/
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#if !defined(STM32_CRC_CRC1_DMA_STREAM) || defined(__DOXYGEN__)
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#define STM32_CRC_CRC1_DMA_STREAM STM32_DMA1_STREAM2
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#endif
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/**
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* @brief CRC DMA error hook.
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*/
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#if !defined(STM32_CRC_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
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#define STM32_CRC_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if STM32_CRC_USE_CRC1 && !STM32_HAS_CRC
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#error "Hardware CRC not present in the selected device"
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#error "Use CRCSW_USE_CRC1 for software implementation"
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#endif
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#if CRC_USE_DMA
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#if STM32_CRC_USE_CRC1 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(STM32_CRC_CRC1_DMA_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to CRC1"
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#endif
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#if STM32_CRC_USE_CRC1 && \
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!STM32_DMA_IS_VALID_PRIORITY(STM32_CRC_CRC1_DMA_PRIORITY)
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#error "Invalid DMA priority assigned to CRC1"
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#endif
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#if !defined(STM32_DMA_REQUIRED)
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#define STM32_DMA_REQUIRED
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#endif
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a structure representing an CRC driver.
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*/
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typedef struct CRCDriver CRCDriver;
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/**
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* @brief CRC notification callback type
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*
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* @param[in] crcp pointer to the @ CRCDriver object triggering the
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* callback
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*/
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typedef void (*crccallback_t)(CRCDriver *crcp, uint32_t crc);
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/**
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* @brief Driver configuration structure.
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*/
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typedef struct {
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/**
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* @brief The size of polynomial to be used for CRC.
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*/
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uint32_t poly_size;
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/**
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* @brief The coefficients of the polynomial to be used for CRC.
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*/
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uint32_t poly;
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/**
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* @brief The inital value
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*/
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uint32_t initial_val;
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/**
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* @brief The final XOR value
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*/
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uint32_t final_val;
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/**
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* @brief Reflect bit order data going into CRC
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*/
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bool reflect_data;
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/**
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* @brief Reflect bit order of final remainder
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*/
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bool reflect_remainder;
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/* End of the mandatory fields.*/
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/**
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* @brief Operation complete callback or @p NULL
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*/
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crccallback_t end_cb;
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} CRCConfig;
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/**
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* @brief Structure representing an CRC driver.
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*/
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struct CRCDriver {
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/**
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* @brief Driver state.
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*/
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crcstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const CRCConfig *config;
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#if CRC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the peripheral.
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*/
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mutex_t mutex;
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#endif /* CRC_USE_MUTUAL_EXCLUSION */
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#if defined(CRC_DRIVER_EXT_FIELDS)
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CRC_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the CRCx registers block.
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*/
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CRC_TypeDef *crc;
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#if CRC_USE_DMA == TRUE
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/**
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* @brief Waiting thread.
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*/
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thread_reference_t thread;
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/**
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* @brief CRC DMA stream
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*/
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const stm32_dma_stream_t *dma;
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/**
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* @brief DMA mode bit mask.
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*/
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uint32_t dmamode;
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#endif
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if STM32_CRC_USE_CRC1 && !defined(__DOXYGEN__)
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extern CRCDriver CRCD1;
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#endif /* STM32_CRC_USE_CRC1 */
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#ifdef __cplusplus
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extern "C" {
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#endif
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void crc_lld_init(void);
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void crc_lld_start(CRCDriver *crcp);
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void crc_lld_stop(CRCDriver *crcp);
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void crc_lld_reset(CRCDriver *crcp);
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uint32_t crc_lld_calc(CRCDriver *crcp, size_t n, const void *buf);
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#if CRC_USE_DMA
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void crc_lld_start_calc(CRCDriver *crcp, size_t n, const void *buf);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* CRCSW_USE_CRC1 */
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#endif /* HAL_USE_CRC */
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#endif /* _CRC_LLD_H_ */
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/** @} */
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