483 lines
13 KiB
C
483 lines
13 KiB
C
/*
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Copyright (C) 2014 Marco Veeneman
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file TIVA/LLD/serial_lld.h
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* @brief Tiva low level serial driver header.
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*
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* @addtogroup SERIAL
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* @{
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*/
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#ifndef _SERIAL_LLD_H_
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#define _SERIAL_LLD_H_
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#if HAL_USE_SERIAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name FR register bits definitions
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* @{
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*/
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#define TIVA_FR_CTS (1 << 0)
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#define TIVA_FR_BUSY (1 << 3)
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#define TIVA_FR_RXFE (1 << 4)
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#define TIVA_FR_TXFF (1 << 5)
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#define TIVA_FR_RXFF (1 << 6)
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#define TIVA_FR_TXFE (1 << 7)
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/**
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* @}
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*/
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/**
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* @name LCRH register bits definitions
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* @{
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*/
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#define TIVA_LCRH_BRK (1 << 0)
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#define TIVA_LCRH_PEN (1 << 1)
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#define TIVA_LCRH_EPS (1 << 2)
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#define TIVA_LCRH_STP2 (1 << 3)
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#define TIVA_LCRH_FEN (1 << 4)
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#define TIVA_LCRH_WLEN_MASK (3 << 5)
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#define TIVA_LCRH_WLEN_5 (0 << 5)
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#define TIVA_LCRH_WLEN_6 (1 << 5)
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#define TIVA_LCRH_WLEN_7 (2 << 5)
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#define TIVA_LCRH_WLEN_8 (3 << 5)
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#define TIVA_LCRH_SPS (1 << 7)
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/**
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* @}
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*/
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/**
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* @name CTL register bits definitions
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* @{
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*/
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#define TIVA_CTL_UARTEN (1 << 0)
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#define TIVA_CTL_SIREN (1 << 1)
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#define TIVA_CTL_SIRLP (1 << 2)
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#define TIVA_CTL_SMART (1 << 3)
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#define TIVA_CTL_EOT (1 << 4)
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#define TIVA_CTL_HSE (1 << 5)
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#define TIVA_CTL_LBE (1 << 7)
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#define TIVA_CTL_TXE (1 << 8)
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#define TIVA_CTL_RXE (1 << 9)
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#define TIVA_CTL_RTS (1 << 11)
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#define TIVA_CTL_RTSEN (1 << 14)
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#define TIVA_CTL_CTSEN (1 << 15)
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/**
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* @}
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*/
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/**
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* @name IFLS register bits definitions
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* @{
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*/
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#define TIVA_IFLS_TXIFLSEL_MASK (7 << 0)
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#define TIVA_IFLS_TXIFLSEL_1_8_F (0 << 0)
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#define TIVA_IFLS_TXIFLSEL_1_4_F (1 << 0)
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#define TIVA_IFLS_TXIFLSEL_1_2_F (2 << 0)
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#define TIVA_IFLS_TXIFLSEL_3_4_F (3 << 0)
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#define TIVA_IFLS_TXIFLSEL_7_8_F (4 << 0)
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#define TIVA_IFLS_RXIFLSEL_MASK (7 << 3)
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#define TIVA_IFLS_RXIFLSEL_7_8_E (0 << 3)
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#define TIVA_IFLS_RXIFLSEL_3_4_E (1 << 3)
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#define TIVA_IFLS_RXIFLSEL_1_2_E (2 << 3)
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#define TIVA_IFLS_RXIFLSEL_1_4_E (3 << 3)
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#define TIVA_IFLS_RXIFLSEL_1_8_E (4 << 3)
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/**
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* @}
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*/
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/**
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* @name MIS register bits definitions
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* @{
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*/
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#define TIVA_MIS_CTSMIS (1 << 1)
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#define TIVA_MIS_RXMIS (1 << 4)
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#define TIVA_MIS_TXMIS (1 << 5)
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#define TIVA_MIS_RTMIS (1 << 6)
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#define TIVA_MIS_FEMIS (1 << 7)
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#define TIVA_MIS_PEMIS (1 << 8)
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#define TIVA_MIS_BEMIS (1 << 9)
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#define TIVA_MIS_OEMIS (1 << 10)
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#define TIVA_MIS_9BITMIS (1 << 12)
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/**
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* @}
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*/
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/**
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* @name IM register bits definitions
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* @{
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*/
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#define TIVA_IM_CTSIM (1 << 1)
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#define TIVA_IM_RXIM (1 << 4)
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#define TIVA_IM_TXIM (1 << 5)
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#define TIVA_IM_RTIM (1 << 6)
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#define TIVA_IM_FEIM (1 << 7)
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#define TIVA_IM_PEIM (1 << 8)
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#define TIVA_IM_BEIM (1 << 9)
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#define TIVA_IM_OEIM (1 << 10)
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#define TIVA_IM_9BITIM (1 << 12)
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/**
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* @}
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*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief UART0 driver enable switch.
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* @details If set to @p TRUE the support for UART0 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(TIVA_SERIAL_USE_UART0) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_USE_UART0 FALSE
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#endif
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/**
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* @brief UART1 driver enable switch.
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* @details If set to @p TRUE the support for UART1 is included.
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* @note The default is @p FALSE .
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*/
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#if !defined(TIVA_SERIAL_USE_UART1) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_USE_UART1 FALSE
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#endif
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/**
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* @brief UART2 driver enable switch.
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* @details If set to @p TRUE the support for UART2 is included.
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* @note The default is @p FALSE .
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*/
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#if !defined(TIVA_SERIAL_USE_UART2) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_USE_UART2 FALSE
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#endif
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/**
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* @brief UART3 driver enable switch.
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* @details If set to @p TRUE the support for UART3 is included.
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* @note The default is @p FALSE .
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*/
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#if !defined(TIVA_SERIAL_USE_UART3) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_USE_UART3 FALSE
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#endif
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/**
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* @brief UART4 driver enable switch.
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* @details If set to @p TRUE the support for UART4 is included.
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* @note The default is @p FALSE .
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*/
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#if !defined(TIVA_SERIAL_USE_UART4) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_USE_UART4 FALSE
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#endif
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/**
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* @brief UART5 driver enable switch.
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* @details If set to @p TRUE the support for UART5 is included.
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* @note The default is @p FALSE .
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*/
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#if !defined(TIVA_SERIAL_USE_UART5) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_USE_UART5 FALSE
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#endif
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/**
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* @brief UART6 driver enable switch.
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* @details If set to @p TRUE the support for UART6 is included.
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* @note The default is @p FALSE .
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*/
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#if !defined(TIVA_SERIAL_USE_UART6) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_USE_UART6 FALSE
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#endif
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/**
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* @brief UART7 driver enable switch.
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* @details If set to @p TRUE the support for UART7 is included.
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* @note The default is @p FALSE .
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*/
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#if !defined(TIVA_SERIAL_USE_UART7) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_USE_UART7 FALSE
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#endif
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/**
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* @brief UART0 interrupt priority level setting.
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*/
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#if !defined(TIVA_SERIAL_UART0_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_UART0_PRIORITY 5
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#endif
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/**
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* @brief UART1 interrupt priority level setting.
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*/
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#if !defined(TIVA_SERIAL_UART1_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_UART1_PRIORITY 5
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#endif
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/**
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* @brief UART2 interrupt priority level setting.
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*/
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#if !defined(TIVA_SERIAL_UART2_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_UART2_PRIORITY 5
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#endif
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/**
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* @brief UART3 interrupt priority level setting.
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*/
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#if !defined(TIVA_SERIAL_UART3_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_UART3_PRIORITY 5
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#endif
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/**
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* @brief UART4 interrupt priority level setting.
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*/
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#if !defined(TIVA_SERIAL_UART4_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_UART4_PRIORITY 5
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#endif
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/**
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* @brief UART5 interrupt priority level setting.
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*/
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#if !defined(TIVA_SERIAL_UART5_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_UART5_PRIORITY 5
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#endif
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/**
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* @brief UART6 interrupt priority level setting.
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*/
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#if !defined(TIVA_SERIAL_UART6_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_UART6_PRIORITY 5
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#endif
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/**
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* @brief UART7 interrupt priority level setting.
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*/
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#if !defined(TIVA_SERIAL_UART7_PRIORITY) || defined(__DOXYGEN__)
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#define TIVA_SERIAL_UART7_PRIORITY 5
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#endif
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/**
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* @}
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*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if !TIVA_SERIAL_USE_UART0 && !TIVA_SERIAL_USE_UART1 && \
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!TIVA_SERIAL_USE_UART2 && !TIVA_SERIAL_USE_UART3 && \
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!TIVA_SERIAL_USE_UART4 && !TIVA_SERIAL_USE_UART5 && \
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!TIVA_SERIAL_USE_UART6 && !TIVA_SERIAL_USE_UART7
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#error "SERIAL driver activated but no UART peripheral assigned"
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#endif
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#if TIVA_SERIAL_USE_UART0 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART0_PRIORITY)
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#error "Invalid IRQ priority assigned to UART0"
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#endif
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#if TIVA_SERIAL_USE_UART1 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART1_PRIORITY)
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#error "Invalid IRQ priority assigned to UART1"
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#endif
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#if TIVA_SERIAL_USE_UART2 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART2_PRIORITY)
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#error "Invalid IRQ priority assigned to UART2"
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#endif
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#if TIVA_SERIAL_USE_UART3 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART3_PRIORITY)
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#error "Invalid IRQ priority assigned to UART3"
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#endif
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#if TIVA_SERIAL_USE_UART4 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART4_PRIORITY)
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#error "Invalid IRQ priority assigned to UART4"
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#endif
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#if TIVA_SERIAL_USE_UART5 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART5_PRIORITY)
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#error "Invalid IRQ priority assigned to UART5"
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#endif
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#if TIVA_SERIAL_USE_UART6 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART6_PRIORITY)
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#error "Invalid IRQ priority assigned to UART6"
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#endif
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#if TIVA_SERIAL_USE_UART7 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART7_PRIORITY)
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#error "Invalid IRQ priority assigned to UART7"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Tiva Serial Driver configuration structure.
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* @details An instance of this structure must be passed to @p sdStart()
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* in order to configure and start a serial driver operations.
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*/
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typedef struct {
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/**
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* @brief Bit rate.
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*/
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uint32_t sc_speed;
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/* End of the mandatory fields. */
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/**
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* @brief Initialization value for the LCRH (Line Control) register.
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*/
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uint32_t sc_lcrh;
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/**
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* @brief Initialization value for the IFLS (Interrupt FIFO Level Select)
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* register.
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*/
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uint32_t sc_ifls;
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} SerialConfig;
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/**
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* @brief @p SerialDriver specific data.
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*/
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#define _serial_driver_data \
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_base_asynchronous_channel_data \
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/* Driver state.*/ \
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sdstate_t state; \
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/* Input queue.*/ \
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input_queue_t iqueue; \
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/* Output queue.*/ \
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output_queue_t oqueue; \
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/* Input circular buffer.*/ \
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uint8_t ib[SERIAL_BUFFERS_SIZE]; \
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/* Output circular buffer.*/ \
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uint8_t ob[SERIAL_BUFFERS_SIZE]; \
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/* End of the mandatory fields.*/ \
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/* Pointer to the USART registers block.*/ \
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UART_TypeDef *uart;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if TIVA_SERIAL_USE_UART0 && !defined(__DOXYGEN__)
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extern SerialDriver SD1;
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#endif
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#if TIVA_SERIAL_USE_UART1 && !defined(__DOXYGEN__)
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extern SerialDriver SD2;
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#endif
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#if TIVA_SERIAL_USE_UART2 && !defined(__DOXYGEN__)
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extern SerialDriver SD3;
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#endif
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#if TIVA_SERIAL_USE_UART3 && !defined(__DOXYGEN__)
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extern SerialDriver SD4;
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#endif
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#if TIVA_SERIAL_USE_UART4 && !defined(__DOXYGEN__)
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extern SerialDriver SD5;
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#endif
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#if TIVA_SERIAL_USE_UART5 && !defined(__DOXYGEN__)
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extern SerialDriver SD6;
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#endif
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#if TIVA_SERIAL_USE_UART6 && !defined(__DOXYGEN__)
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extern SerialDriver SD7;
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#endif
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#if TIVA_SERIAL_USE_UART7 && !defined(__DOXYGEN__)
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extern SerialDriver SD8;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void sd_lld_init(void);
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void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
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void sd_lld_stop(SerialDriver *sdp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SERIAL */
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#endif /* _SERIAL_LLD_H_ */
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/** @} */
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