206 lines
5.8 KiB
C
206 lines
5.8 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for Generic SN32F260 Board
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_GENERIC_SN32_F260
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#define BOARD_NAME "SN32F260"
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/*
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* MCU type as defined in the SN32 header.
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*/
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#define SN32F260
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/*
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* IO pins assignments.
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*/
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#define GPIOA_PIN0 0U
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#define GPIOA_PIN1 1U
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#define GPIOA_PIN2 2U
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#define GPIOA_PIN3 3U
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#define GPIOA_PIN4 4U
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#define GPIOA_PIN5 5U
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#define GPIOA_PIN6 6U
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#define GPIOA_PIN7 7U
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#define GPIOA_PIN8 8U
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#define GPIOA_PIN9 9U
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#define GPIOA_PIN10 10U
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#define GPIOA_PIN11 11U
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#define GPIOA_PIN12 12U
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#define GPIOA_PIN13 13U
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#define GPIOA_PIN14 14U
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#define GPIOA_PIN15 15U
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#define GPIOB_PIN0 0U
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#define GPIOB_PIN1 1U
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#define GPIOB_PIN2 2U
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#define GPIOB_PIN3 3U
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#define GPIOB_PIN4 4U
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#define GPIOB_PIN5 5U
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#define GPIOC_PIN0 0U
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#define GPIOC_PIN1 1U
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#define GPIOC_PIN2 2U
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#define GPIOC_PIN3 3U
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#define GPIOC_PIN4 4U
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#define GPIOC_PIN5 5U
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#define GPIOC_PIN6 6U
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#define GPIOC_PIN7 7U
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#define GPIOC_PIN8 8U
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#define GPIOC_PIN9 9U
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#define GPIOC_PIN10 10U
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#define GPIOD_PIN0 0U
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#define GPIOD_PIN1 1U
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#define GPIOD_PIN2 2U
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#define GPIOD_PIN3 3U
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#define GPIOD_PIN4 4U
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#define GPIOD_PIN5 5U
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#define GPIOD_PIN6 6U
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#define GPIOD_PIN7 7U
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#define GPIOD_PIN8 8U
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the SN32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n)))
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#define PIN_MODE_OUTPUT(n) (1U << ((n)))
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#define PIN_CFG_PULLUP(n) (0U << ((n*2))) // Pull-up
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#define PIN_CFG_SCHMITT_EN(n) (2U << ((n*2))) // Floating
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#define PIN_CFG_SCHMITT_DIS(n) (3U << ((n*2))) // Input buffer disconnected, alway read as zero.
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// Define GPIO register values used by pal_default_config.
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// The following values match the chip reset values, all GPIO pins as floating inputs.
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#define VAL_GPIOA_MODE \
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( PIN_MODE_INPUT(GPIOA_PIN0) \
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| PIN_MODE_INPUT(GPIOA_PIN1) \
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| PIN_MODE_INPUT(GPIOA_PIN2) \
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| PIN_MODE_INPUT(GPIOA_PIN3) \
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| PIN_MODE_INPUT(GPIOA_PIN4) \
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| PIN_MODE_INPUT(GPIOA_PIN5) \
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| PIN_MODE_INPUT(GPIOA_PIN6) \
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| PIN_MODE_INPUT(GPIOA_PIN7) \
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| PIN_MODE_INPUT(GPIOA_PIN8) \
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| PIN_MODE_INPUT(GPIOA_PIN9) \
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| PIN_MODE_INPUT(GPIOA_PIN10) \
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| PIN_MODE_INPUT(GPIOA_PIN11) \
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| PIN_MODE_INPUT(GPIOA_PIN12) \
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| PIN_MODE_INPUT(GPIOA_PIN13) \
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| PIN_MODE_INPUT(GPIOA_PIN14) \
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| PIN_MODE_INPUT(GPIOA_PIN15) )
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#define VAL_GPIOA_CFG \
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( PIN_CFG_SCHMITT_EN(GPIOA_PIN0) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN1) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN2) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN3) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN4) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN5) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN6) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN7) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN8) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN9) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN10) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN11) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN12) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN13) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN14) \
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| PIN_CFG_SCHMITT_EN(GPIOA_PIN15) )
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#define VAL_GPIOB_MODE \
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( PIN_MODE_INPUT(GPIOB_PIN0) \
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| PIN_MODE_INPUT(GPIOB_PIN1) \
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| PIN_MODE_INPUT(GPIOB_PIN2) \
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| PIN_MODE_INPUT(GPIOB_PIN3) \
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| PIN_MODE_INPUT(GPIOB_PIN4) \
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| PIN_MODE_INPUT(GPIOB_PIN5) )
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#define VAL_GPIOB_CFG \
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( PIN_CFG_SCHMITT_EN(GPIOB_PIN0) \
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| PIN_CFG_SCHMITT_EN(GPIOB_PIN1) \
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| PIN_CFG_SCHMITT_EN(GPIOB_PIN2) \
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| PIN_CFG_SCHMITT_EN(GPIOB_PIN3) \
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| PIN_CFG_SCHMITT_EN(GPIOB_PIN4) \
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| PIN_CFG_SCHMITT_EN(GPIOB_PIN5) )
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#define VAL_GPIOC_MODE \
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( PIN_MODE_INPUT(GPIOC_PIN0) \
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| PIN_MODE_INPUT(GPIOC_PIN1) \
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| PIN_MODE_INPUT(GPIOC_PIN2) \
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| PIN_MODE_INPUT(GPIOC_PIN3) \
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| PIN_MODE_INPUT(GPIOC_PIN4) \
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| PIN_MODE_INPUT(GPIOC_PIN5) \
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| PIN_MODE_INPUT(GPIOC_PIN6) \
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| PIN_MODE_INPUT(GPIOC_PIN7) \
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| PIN_MODE_INPUT(GPIOC_PIN8) \
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| PIN_MODE_INPUT(GPIOC_PIN9) \
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| PIN_MODE_INPUT(GPIOC_PIN10) )
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#define VAL_GPIOC_CFG \
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( PIN_CFG_SCHMITT_EN(GPIOC_PIN0) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN1) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN2) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN3) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN4) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN5) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN6) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN7) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN8) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN9) \
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| PIN_CFG_SCHMITT_EN(GPIOC_PIN10) )
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#define VAL_GPIOD_MODE \
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( PIN_MODE_INPUT(GPIOD_PIN0) \
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| PIN_MODE_INPUT(GPIOD_PIN1) \
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| PIN_MODE_INPUT(GPIOD_PIN2) \
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| PIN_MODE_INPUT(GPIOD_PIN3) \
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| PIN_MODE_INPUT(GPIOD_PIN4) \
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| PIN_MODE_INPUT(GPIOD_PIN5) \
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| PIN_MODE_INPUT(GPIOD_PIN6) \
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| PIN_MODE_INPUT(GPIOD_PIN7) \
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| PIN_MODE_INPUT(GPIOD_PIN8) )
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#define VAL_GPIOD_CFG \
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( PIN_CFG_SCHMITT_EN(GPIOD_PIN0) \
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| PIN_CFG_SCHMITT_EN(GPIOD_PIN1) \
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| PIN_CFG_SCHMITT_EN(GPIOD_PIN2) \
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| PIN_CFG_SCHMITT_EN(GPIOD_PIN3) \
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| PIN_CFG_SCHMITT_EN(GPIOD_PIN4) \
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| PIN_CFG_SCHMITT_EN(GPIOD_PIN5) \
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| PIN_CFG_SCHMITT_EN(GPIOD_PIN6) \
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| PIN_CFG_SCHMITT_EN(GPIOD_PIN7) \
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| PIN_CFG_SCHMITT_EN(GPIOD_PIN8) )
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#if !defined(_FROM_ASM_)
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# ifdef __cplusplus
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extern "C" {
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# endif
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void boardInit(void);
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# ifdef __cplusplus
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}
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# endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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