153 lines
4.8 KiB
C
153 lines
4.8 KiB
C
/*
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Copyright (C) 2014..2016 Marco Veeneman
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file TIVA/TM4C129x/hal_lld.c
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* @brief TM4C129x HAL Driver subsystem low level driver source.
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*
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* @addtogroup HAL
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* @{
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*/
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#include "hal.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level HAL driver initialization.
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*
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* @notapi
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*/
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void hal_lld_init(void)
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{
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}
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/**
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* @brief TM4C129x clocks and PLL initialization.
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* @note All the involved constants come from the file @p board.h and
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* @p mcuconf.h.
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* @note This function should be invoked just after the system reset.
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*
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* @special
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*/
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void tiva_clock_init(void)
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{
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uint32_t moscctl, rsclkcfg;
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/*
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* 1. Once POR has completed, the PIOSC is acting as the system clock.
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*/
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/*
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* 2. Power up the MOSC by clearing the NOXTAL bit in the MOSCCTL register.
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*/
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moscctl = SYSCTL->MOSCCTL;
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moscctl &= ~MOSCCTL_NOXTAL;
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/*
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* 3. If single-ended MOSC mode is required, the MOSC is ready to use. If crystal mode is required,
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* clear the PWRDN bit and wait for the MOSCPUPRIS bit to be set in the Raw Interrupt Status
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* (RIS), indicating MOSC crystal mode is ready.
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*/
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#if TIVA_MOSC_SINGLE_ENDED
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SYSCTL->MOSCCTL = moscctl;
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#else
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moscctl &= ~MOSCCTL_PWRDN;
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SYSCTL->MOSCCTL = moscctl;
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while (!(SYSCTL->RIS & SYSCTL_RIS_MOSCPUPRIS));
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#endif
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/*
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* 4. Set the OSCSRC field to 0x3 in the RSCLKCFG register at offset 0x0B0.
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*/
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rsclkcfg = SYSCTL->RSCLKCFG;
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rsclkcfg |= TIVA_RSCLKCFG_OSCSRC;
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/*
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* 5. If the application also requires the MOSC to be the deep-sleep clock source, then program the
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* DSOSCSRC field in the DSCLKCFG register to 0x3.
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*/
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/*
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* 6. Write the PLLFREQ0 and PLLFREQ1 registers with the values of Q, N, MINT, and MFRAC to
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* the configure the desired VCO frequency setting.
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*/
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SYSCTL->PLLFREQ1 = (0x04 << 0); // 5 - 1
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SYSCTL->PLLFREQ0 = (0x60 << 0) | PLLFREQ0_PLLPWR;
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/*
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* 7. Write the MEMTIM0 register to correspond to the new system clock setting.
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*/
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SYSCTL->MEMTIM0 = (MEMTIM0_FBCHT_3_5 | MEMTIM0_FWS_5 | MEMTIM0_EBCHT_3_5 | MEMTIM0_EWS_5 | MEMTIM0_MB1);
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/*
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* Wait for the PLLSTAT register to indicate the PLL has reached lock at the new operating point
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* (or that a timeout period has passed and lock has failed, in which case an error condition exists
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* and this sequence is abandoned and error processing is initiated).
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*/
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while (!SYSCTL->PLLSTAT & PLLSTAT_LOCK);
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/*
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* 9. Write the RSCLKCFG register's PSYSDIV value, set the USEPLL bit to enabled, and MEMTIMU
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* bit.
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*/
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rsclkcfg = SYSCTL->RSCLKCFG;
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rsclkcfg |= (RSCLKCFG_USEPLL | (0x03 << 0) | (0x03 << 20) | (0x03 << 24));
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//rsclkcfg |= ((0x03 << 0) | (1 << 28) | (0x03 << 20));
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rsclkcfg |= RSCLKCFG_MEMTIMU;
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// set new configuration
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SYSCTL->RSCLKCFG = rsclkcfg;
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#if HAL_USE_PWM
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#if TIVA_PWM_USE_PWM0
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PWM0->CC = TIVA_PWM_FIELDS;
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#endif
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#endif
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}
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/**
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* @}
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*/
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