2014-02-24 03:09:08 -08:00
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/*
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2015-01-11 05:45:54 -08:00
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
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2014-02-24 03:09:08 -08:00
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2014-07-26 02:00:40 -07:00
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This file is part of ChibiOS.
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2014-02-24 03:09:08 -08:00
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2014-07-26 02:00:40 -07:00
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ChibiOS is free software; you can redistribute it and/or modify
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2014-02-24 03:09:08 -08:00
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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2014-07-26 02:00:40 -07:00
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ChibiOS is distributed in the hope that it will be useful,
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2014-02-24 03:09:08 -08:00
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file boot.h
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* @brief Boot parameters for the SPC56ECxx.
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* @{
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*/
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#ifndef _BOOT_H_
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#define _BOOT_H_
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/*===========================================================================*/
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/* Module constants. */
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/*===========================================================================*/
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/**
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* @name MASx registers definitions
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* @{
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*/
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#define MAS0_TBLMAS_TBL 0x10000000
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#define MAS0_ESEL_MASK 0x000F0000
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#define MAS0_ESEL(n) ((n) << 16)
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#define MAS1_VALID 0x80000000
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#define MAS1_IPROT 0x40000000
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#define MAS1_TID_MASK 0x00FF0000
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#define MAS1_TS 0x00001000
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#define MAS1_TSISE_MASK 0x00000F80
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#define MAS1_TSISE_1K 0x00000000
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#define MAS1_TSISE_2K 0x00000080
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#define MAS1_TSISE_4K 0x00000100
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#define MAS1_TSISE_8K 0x00000180
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#define MAS1_TSISE_16K 0x00000200
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#define MAS1_TSISE_32K 0x00000280
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#define MAS1_TSISE_64K 0x00000300
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#define MAS1_TSISE_128K 0x00000380
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#define MAS1_TSISE_256K 0x00000400
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#define MAS1_TSISE_512K 0x00000480
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#define MAS1_TSISE_1M 0x00000500
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#define MAS1_TSISE_2M 0x00000580
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#define MAS1_TSISE_4M 0x00000600
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#define MAS1_TSISE_8M 0x00000680
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#define MAS1_TSISE_16M 0x00000700
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#define MAS1_TSISE_32M 0x00000780
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#define MAS1_TSISE_64M 0x00000800
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#define MAS1_TSISE_128M 0x00000880
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#define MAS1_TSISE_256M 0x00000900
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#define MAS1_TSISE_512M 0x00000980
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#define MAS1_TSISE_1G 0x00000A00
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#define MAS1_TSISE_2G 0x00000A80
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#define MAS1_TSISE_4G 0x00000B00
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#define MAS2_EPN_MASK 0xFFFFFC00
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#define MAS2_EPN(n) ((n) & MAS2_EPN_MASK)
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#define MAS2_EBOOK 0x00000000
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#define MAS2_VLE 0x00000020
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#define MAS2_W 0x00000010
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#define MAS2_I 0x00000008
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#define MAS2_M 0x00000004
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#define MAS2_G 0x00000002
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#define MAS2_E 0x00000001
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#define MAS3_RPN_MASK 0xFFFFFC00
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#define MAS3_RPN(n) ((n) & MAS3_RPN_MASK)
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#define MAS3_U0 0x00000200
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#define MAS3_U1 0x00000100
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#define MAS3_U2 0x00000080
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#define MAS3_U3 0x00000040
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#define MAS3_UX 0x00000020
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#define MAS3_SX 0x00000010
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#define MAS3_UW 0x00000008
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#define MAS3_SW 0x00000004
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#define MAS3_UR 0x00000002
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#define MAS3_SR 0x00000001
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/** @} */
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/**
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* @name BUCSR registers definitions
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* @{
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*/
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#define BUCSR_BPEN 0x00000001
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#define BUCSR_BPRED_MASK 0x00000006
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#define BUCSR_BPRED_0 0x00000000
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#define BUCSR_BPRED_1 0x00000002
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#define BUCSR_BPRED_2 0x00000004
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#define BUCSR_BPRED_3 0x00000006
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#define BUCSR_BALLOC_MASK 0x00000030
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#define BUCSR_BALLOC_0 0x00000000
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#define BUCSR_BALLOC_1 0x00000010
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#define BUCSR_BALLOC_2 0x00000020
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#define BUCSR_BALLOC_3 0x00000030
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#define BUCSR_BALLOC_BFI 0x00000200
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/** @} */
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/**
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* @name LICSR1 registers definitions
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* @{
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*/
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#define LICSR1_ICE 0x00000001
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#define LICSR1_ICINV 0x00000002
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#define LICSR1_ICORG 0x00000010
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/** @} */
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/**
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* @name MSR register definitions
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* @{
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*/
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#define MSR_UCLE 0x04000000
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#define MSR_SPE 0x02000000
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#define MSR_WE 0x00040000
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#define MSR_CE 0x00020000
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#define MSR_EE 0x00008000
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#define MSR_PR 0x00004000
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#define MSR_FP 0x00002000
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#define MSR_ME 0x00001000
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#define MSR_FE0 0x00000800
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#define MSR_DE 0x00000200
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#define MSR_FE1 0x00000100
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#define MSR_IS 0x00000020
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#define MSR_DS 0x00000010
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#define MSR_RI 0x00000002
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/** @} */
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/*===========================================================================*/
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/* Module pre-compile time settings. */
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/*===========================================================================*/
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/*
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* TLB default settings.
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*/
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#define TLB0_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(0))
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#define TLB0_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_4M)
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#define TLB0_MAS2 (MAS2_EPN(0x00000000) | MAS2_VLE)
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#define TLB0_MAS3 (MAS3_RPN(0x00000000) | \
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MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \
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MAS3_UR | MAS3_SR)
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#define TLB1_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(1))
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#define TLB1_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_256K)
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#define TLB1_MAS2 (MAS2_EPN(0x40000000) | MAS2_VLE)
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#define TLB1_MAS3 (MAS3_RPN(0x40000000) | \
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MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \
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MAS3_UR | MAS3_SR)
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#define TLB2_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(2))
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#define TLB2_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
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#define TLB2_MAS2 (MAS2_EPN(0xC3F00000) | MAS2_I)
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#define TLB2_MAS3 (MAS3_RPN(0xC3F00000) | \
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MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
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#define TLB3_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(3))
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#define TLB3_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
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#define TLB3_MAS2 (MAS2_EPN(0xFFE00000) | MAS2_I)
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#define TLB3_MAS3 (MAS3_RPN(0xFFE00000) | \
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MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
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#define TLB4_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(4))
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#define TLB4_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
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#define TLB4_MAS2 (MAS2_EPN(0x8FF00000) | MAS2_I)
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#define TLB4_MAS3 (MAS3_RPN(0x8FF00000) | \
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MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
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#define TLB5_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(5))
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#define TLB5_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
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#define TLB5_MAS2 (MAS2_EPN(0xFFF00000) | MAS2_I)
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#define TLB5_MAS3 (MAS3_RPN(0xFFF00000) | \
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MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
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/*
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* BUCSR default settings.
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*/
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#if !defined(BOOT_BUCSR_DEFAULT) || defined(__DOXYGEN__)
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#define BOOT_BUCSR_DEFAULT (BUCSR_BPEN | BUCSR_BPRED_0 | \
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BUCSR_BALLOC_0 | BUCSR_BALLOC_BFI)
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#endif
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/*
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* LICSR1 default settings.
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*/
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#if !defined(BOOT_LICSR1_DEFAULT) || defined(__DOXYGEN__)
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#define BOOT_LICSR1_DEFAULT (LICSR1_ICE | LICSR1_ICORG)
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#endif
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/*
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* MSR default settings.
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*/
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#if !defined(BOOT_MSR_DEFAULT) || defined(__DOXYGEN__)
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#define BOOT_MSR_DEFAULT (MSR_SPE | MSR_WE | MSR_CE | MSR_ME)
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#endif
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/*
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* Boot default settings.
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*/
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#if !defined(BOOT_PERFORM_CORE_INIT) || defined(__DOXYGEN__)
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#define BOOT_PERFORM_CORE_INIT 1
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#endif
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/*
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* VLE mode default settings.
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*/
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#if !defined(BOOT_USE_VLE) || defined(__DOXYGEN__)
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#define BOOT_USE_VLE 1
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#endif
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/*
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* RAM relocation flag.
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*/
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#if !defined(BOOT_RELOCATE_IN_RAM) || defined(__DOXYGEN__)
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#define BOOT_RELOCATE_IN_RAM 0
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module inline functions. */
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/*===========================================================================*/
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#endif /* _BOOT_H_ */
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/** @} */
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