2008-04-13 02:46:55 -07:00
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _STM32_SERIAL_H_
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#define _STM32_SERIAL_H_
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2008-04-13 10:03:56 -07:00
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//#define USE_USART1
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2008-04-13 02:46:55 -07:00
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#define USE_USART2
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2008-04-13 10:03:56 -07:00
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//#define USE_USART3
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2008-04-13 02:46:55 -07:00
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/*
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* Configuration parameter, you can change the depth of the queue buffers
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* depending on the requirements of your application.
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*/
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#define SERIAL_BUFFERS_SIZE 128
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/*
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* USARTs definitions here, ST headers are not good enough IMHO.
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*/
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#define SR_PE (1 << 0)
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#define SR_FE (1 << 1)
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#define SR_NE (1 << 2)
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#define SR_ORE (1 << 3)
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#define SR_IDLE (1 << 4)
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#define SR_RXNE (1 << 5)
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#define SR_TC (1 << 6)
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#define SR_TXE (1 << 7)
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#define SR_LBD (1 << 8)
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#define SR_CTS (1 << 9)
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#define CR1_SBK (1 << 0)
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#define CR1_RWU (1 << 1)
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#define CR1_RE (1 << 2)
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#define CR1_TE (1 << 3)
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#define CR1_IDLEIE (1 << 4)
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#define CR1_RXNEIE (1 << 5)
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#define CR1_TCIE (1 << 6)
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#define CR1_TXEIE (1 << 7)
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#define CR1_PEIE (1 << 8)
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#define CR1_PS (1 << 9)
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#define CR1_PCE (1 << 10)
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#define CR1_WAKE (1 << 11)
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#define CR1_M (1 << 12)
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#define CR1_UE (1 << 13)
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#define CR2_ADD_MASK (15 << 0)
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#define CR2_LBDL (1 << 5)
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#define CR2_LBDIE (1 << 6)
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#define CR2_CBCL (1 << 8)
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#define CR2_CPHA (1 << 9)
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#define CR2_CPOL (1 << 10)
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#define CR2_CLKEN (1 << 11)
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#define CR2_STOP_MASK (3 << 12)
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2008-04-13 03:53:48 -07:00
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#define CR2_STOP1_BITS (0 << 12)
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#define CR2_STOP0P5_BITS (1 << 12)
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#define CR2_STOP2_BITS (2 << 12)
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#define CR2_STOP1P5_BITS (3 << 12)
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2008-04-13 02:46:55 -07:00
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#define CR2_LINEN (1 << 14)
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#define CR3_EIE (1 << 0)
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#define CR3_IREN (1 << 1)
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#define CR3_IRLP (1 << 2)
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#define CR3_HDSEL (1 << 3)
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#define CR3_NACK (1 << 4)
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#define CR3_SCEN (1 << 5)
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#define CR3_DMAR (1 << 6)
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#define CR3_DMAT (1 << 7)
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#define CR3_RTSE (1 << 8)
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#define CR3_CTSE (1 << 9)
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#define CR3_CTSIE (1 << 10)
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#ifdef USE_USART1
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extern FullDuplexDriver COM1;
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#endif
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#ifdef USE_USART2
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extern FullDuplexDriver COM2;
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#endif
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#ifdef USE_USART3
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extern FullDuplexDriver COM3;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void InitSerial(uint32_t prio1, uint32_t prio2, uint32_t prio3);
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void SetUSARTI(USART_TypeDef *u, uint32_t speed, uint16_t cr1,
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uint16_t cr2, uint16_t cr3);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _STM32_SERIAL_H_ */
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