diff --git a/demos/PPC-SPC563-GCC/Makefile b/demos/PPC-SPC563-GCC/Makefile index d771d2eb9..a91f3b69c 100644 --- a/demos/PPC-SPC563-GCC/Makefile +++ b/demos/PPC-SPC563-GCC/Makefile @@ -23,10 +23,14 @@ ifeq ($(USE_LINK_GC),) USE_LINK_GC = no endif -# Enable register caching optimization (read documentation). -# Option not tested on MSP430, DO NOT USE. -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # @@ -40,18 +44,18 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT = ./ch.ld - # Imported source files CHIBIOS = ../.. include $(CHIBIOS)/boards/GENERIC_SPC563/board.mk include $(CHIBIOS)/os/hal/platforms/SPC56x/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/PPC/port.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC563Mxx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC563M64.ld + # C sources here. CSRC = $(PORTSRC) \ $(KERNSRC) \ @@ -68,9 +72,7 @@ CSRC = $(PORTSRC) \ CPPSRC = # List ASM source files here -ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/PPC/SPC56x/ivor.s \ - $(CHIBIOS)/os/ports/GCC/PPC/SPC56x/vectors.s +ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ @@ -84,9 +86,10 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames -TRGT = powerpc-eabi- +#TRGT = powerpc-eabi- +TRGT = ppc-vle- CC = $(TRGT)gcc CPPC = $(TRGT)g++ # Enable loading with g++ only if you need C++ runtime support. @@ -115,7 +118,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DPPC_VARIANT=PPC_VARIANT_e200z3 +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 DADEFS = diff --git a/os/ports/GCC/PPC/SPC56x/ivor.s b/os/ports/GCC/PPC/SPC563Mxx/ivor.s similarity index 96% rename from os/ports/GCC/PPC/SPC56x/ivor.s rename to os/ports/GCC/PPC/SPC563Mxx/ivor.s index 2c69afa62..34cfae43d 100644 --- a/os/ports/GCC/PPC/SPC56x/ivor.s +++ b/os/ports/GCC/PPC/SPC563Mxx/ivor.s @@ -19,7 +19,7 @@ */ /** - * @file SPC56x/ivor.s + * @file SPC563Mxx/ivor.s * @brief PowerPC IVORx handlers. * * @addtogroup PPC_CORE @@ -38,7 +38,7 @@ .equ INTC_IACKR, 0xfff48010 .equ INTC_EOIR, 0xfff48018 - .section .handlers + .section .handlers, "ax" /* * IVOR10 handler (Book-E decrementer). diff --git a/demos/PPC-SPC563-GCC/ch.ld b/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld similarity index 59% rename from demos/PPC-SPC563-GCC/ch.ld rename to os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld index 72c7dddbe..8b86a8ac2 100644 --- a/demos/PPC-SPC563-GCC/ch.ld +++ b/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld @@ -45,34 +45,77 @@ __ram_end__ = ORIGIN(ram) + LENGTH(ram); SECTIONS { . = ORIGIN(flash); - - .text : ALIGN(16) SUBALIGN(16) + .boot : ALIGN(16) SUBALIGN(16) { __ivpr_base__ = .; KEEP(*(.bam)) + KEEP(*(.crt0)) KEEP(*(.handlers)) . = ALIGN(0x800); KEEP(*(.vectors)) - *(.text .stub .text.* .gnu.linkonce.t.*) - *(.glue_7t); - *(.glue_7); - *(.ctors); - *(.dtors); + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) FLAGS(ax) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text_vle : ALIGN(16) SUBALIGN(16) FLAGS(axv) + { + *(.text_vle) + *(.text_vle.*) + *(.gnu.linkonce.t_vle.*) + } > flash + + .text : ALIGN(16) SUBALIGN(16) FLAGS(ax) + { + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) } > flash .rodata : ALIGN(16) SUBALIGN(16) { - *(.rodata .rodata.* .gnu.linkonce.r.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + *(.rodata) + *(.rodata.*) *(.rodata1) } > flash - + .sdata2 : ALIGN(16) SUBALIGN(16) { __sdata2_start__ = . + 0x8000; - *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) - *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) } > flash - + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + .romdata : ALIGN(16) SUBALIGN(16) { __romdata_start__ = .; @@ -82,30 +125,33 @@ SECTIONS { . = ALIGN(4); __data_start__ = .; - *(.data .data.* .gnu.linkonce.d.*) + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) __sdata_start__ = . + 0x8000; - *(.sdata .sdata.* .gnu.linkonce.s.*) + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) __data_end__ = .; } > ram .sbss : { __bss_start__ = .; - *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) *(.scommon) } > ram .bss : { - *(.bss .bss.* .gnu.linkonce.b.*) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) *(COMMON) __bss_end__ = .; } > ram - - /DISCARD/ : - { - *(.eh_*) - } __heap_base__ = __bss_end__; __heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/os/ports/GCC/PPC/SPC563Mxx/port.mk b/os/ports/GCC/PPC/SPC563Mxx/port.mk new file mode 100644 index 000000000..460d4e1f9 --- /dev/null +++ b/os/ports/GCC/PPC/SPC563Mxx/port.mk @@ -0,0 +1,11 @@ +# List of the ChibiOS/RT SPC563Mxx port files. +PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c + +PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/vectors.s \ + ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ivor.s \ + ${CHIBIOS}/os/ports/GCC/PPC/crt0.s + +PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \ + ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx + +PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ld diff --git a/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h b/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h new file mode 100644 index 000000000..eaecd2ed7 --- /dev/null +++ b/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h @@ -0,0 +1,52 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file SPC563Mxx/ppcparams.h + * @brief PowerPC parameters for the SPC563Mxx. + * + * @defgroup PPC_SPC563Mxx SPC563Mxx/MPC563x Specific Parameters + * @ingroup PPC_SPECIFIC + * @details This file contains the PowerPC specific parameters for the + * SPC563Mxx/MPC563x platform. + * @{ + */ + +#ifndef _PPCPARAMS_H_ +#define _PPCPARAMS_H_ + +/** + * @brief PPC core model. + */ +#define PPC_VARIANT PPC_VARIANT_e200z3 + +/** + * @brief Book E instruction set support. + */ +#define PPC_SUPPORTS_BOOKE TRUE + +/** + * @brief VLE instruction set support. + */ +#define PPC_SUPPORTS_VLE TRUE + +#endif /* _PPCPARAMS_H_ */ + +/** @} */ diff --git a/os/ports/GCC/PPC/SPC56x/vectors.s b/os/ports/GCC/PPC/SPC563Mxx/vectors.s similarity index 92% rename from os/ports/GCC/PPC/SPC56x/vectors.s rename to os/ports/GCC/PPC/SPC563Mxx/vectors.s index 4e2be5696..32cf37942 100644 --- a/os/ports/GCC/PPC/SPC56x/vectors.s +++ b/os/ports/GCC/PPC/SPC563Mxx/vectors.s @@ -19,28 +19,29 @@ */ /** - * @file SPC56x/vectors.s - * @brief SPC56x vectors table. + * @file SPC563Mxx/vectors.s + * @brief SPC563Mxx vectors table. * * @addtogroup PPC_CORE * @{ */ -/** @cond never */ - /* - * BAM info, SWT off, WTE off, VLE off. - */ - .section .bam +#if !defined(__DOXYGEN__) + + /* BAM info, SWT off, WTE off, VLE from settings.*/ + .section .bam, "ax" +#if PPC_USE_VLE + .long 0x015A0000 +#else .long 0x005A0000 +#endif .long _boot_address - /* - * Software vectors table. The vectors are accessed from the IVOR4 - * handler only. In order to declare an interrupt handler just create - * a function withe the same name of a vector, the symbol will - * override the weak symbol declared here. - */ - .section .vectors + /* Software vectors table. The vectors are accessed from the IVOR4 + handler only. In order to declare an interrupt handler just create + a function withe the same name of a vector, the symbol will + override the weak symbol declared here.*/ + .section .vectors, "ax" .align 4 .globl _vectors _vectors: @@ -1488,8 +1489,10 @@ vector358: vector359: .globl _unhandled_irq + .type _unhandled_irq, @function _unhandled_irq: b _unhandled_irq -/** @endcond */ +#endif /* !defined(__DOXYGEN__) */ + /** @} */ diff --git a/os/ports/GCC/PPC/chcore.h b/os/ports/GCC/PPC/chcore.h index 301a86969..b0bf57017 100644 --- a/os/ports/GCC/PPC/chcore.h +++ b/os/ports/GCC/PPC/chcore.h @@ -33,30 +33,68 @@ #error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port" #endif -/* - * Port-related configuration parameters. +/*===========================================================================*/ +/* Port constants (common). */ +/*===========================================================================*/ + +/* Added to make the header stand-alone when included from asm.*/ +#ifndef FALSE +#define FALSE 0 +#endif +#ifndef TRUE +#define TRUE (!FALSE) +#endif + +/** + * @name Supported core variants + * @{ */ +#define PPC_VARIANT_e200z0 200 +#define PPC_VARIANT_e200z3 203 +#define PPC_VARIANT_e200z4 204 +/** @} */ + +#include "ppcparams.h" + +/*===========================================================================*/ +/* Port macros (common). */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Port configurable parameters (common). */ +/*===========================================================================*/ + +/** + * @brief Use VLE instruction set. + * @note This parameter is usually set in the Makefile. + */ +#if !defined(PPC_USE_VLE) +#define PPC_USE_VLE TRUE +#endif /** * @brief Enables the use of the @p WFI instruction. */ -#ifndef ENABLE_WFI_IDLE -#define ENABLE_WFI_IDLE 0 +#if !defined(PPC_ENABLE_WFI_IDLE) +#define PPC_ENABLE_WFI_IDLE FALSE #endif -/* Core variants identifiers.*/ -#define PPC_VARIANT_e200z3 3 /**< e200z3 core identifier. */ -#define PPC_VARIANT_e200z4 4 /**< e200z4 core identifier. */ +/*===========================================================================*/ +/* Port derived parameters (common). */ +/*===========================================================================*/ -/** - * @brief Core variant selector. - * @details This setting affects the predefined architecture strings and - * possibly code paths and structures into the port layer. - */ -#if !defined(PPC_VARIANT) || defined(__DOXYGEN__) -#define PPC_VARIANT PPC_VARIANT_e200z3 +#if PPC_USE_VLE && !PPC_SUPPORTS_VLE +#error "the selected MCU does not support VLE instructions set" #endif +#if !PPC_USE_VLE && !PPC_SUPPORTS_BOOKE +#error "the selected MCU does not support BookE instructions set" +#endif + +/*===========================================================================*/ +/* Port exported info (common). */ +/*===========================================================================*/ + /** * @brief Unique macro for the implemented architecture. */ @@ -70,7 +108,9 @@ /** * @brief Name of the architecture variant. */ -#if (PPC_VARIANT == PPC_VARIANT_e200z3) || defined(__DOXYGEN__) +#if (PPC_VARIANT == PPC_VARIANT_e200z0) || defined(__DOXYGEN__) +#define CH_CORE_VARIANT_NAME "e200z0" +#elif PPC_VARIANT == PPC_VARIANT_e200z3 #define CH_CORE_VARIANT_NAME "e200z3" #elif PPC_VARIANT == PPC_VARIANT_e200z4 #define CH_CORE_VARIANT_NAME "e200z4" @@ -86,7 +126,17 @@ /** * @brief Port-specific information string. */ -#define CH_PORT_INFO "None" +#if PPC_USE_VLE +#define CH_PORT_INFO "VLE mode" +#else +#define CH_PORT_INFO "Book-E mode" +#endif + +/*===========================================================================*/ +/* Port implementation part (common). */ +/*===========================================================================*/ + +#if !defined(_FROM_ASM_) /** * @brief Base type for stack and memory alignment. @@ -202,7 +252,7 @@ struct context { * by @p PORT_INT_REQUIRED_STACK. */ #ifndef PORT_IDLE_THREAD_STACK_SIZE -#define PORT_IDLE_THREAD_STACK_SIZE 0 +#define PORT_IDLE_THREAD_STACK_SIZE 32 #endif /** @@ -214,7 +264,7 @@ struct context { * @p extctx is known to be zero. */ #ifndef PORT_INT_REQUIRED_STACK -#define PORT_INT_REQUIRED_STACK 128 +#define PORT_INT_REQUIRED_STACK 256 #endif /** @@ -329,6 +379,8 @@ extern "C" { } #endif +#endif /* _FROM_ASM_ */ + #endif /* _CHCORE_H_ */ /** @} */ diff --git a/os/ports/GCC/PPC/crt0.s b/os/ports/GCC/PPC/crt0.s index 3081b5aba..cec9a306f 100644 --- a/os/ports/GCC/PPC/crt0.s +++ b/os/ports/GCC/PPC/crt0.s @@ -25,11 +25,13 @@ * @addtogroup PPC_CORE * @{ */ -/** @cond never */ - .section .text +#if !defined(__DOXYGEN__) + + .section .crt0, "ax" .align 2 .globl _boot_address + .type _boot_address, @function _boot_address: /* * Stack setup. @@ -98,17 +100,19 @@ _boot_address: */ .weak _main_exit_handler .globl _main_exit_handler + .type _main_exit_handler, @function _main_exit_handler: -forever: - b forever + b _main_exit_handler /* * Default initialization code, none. */ .weak __early_init .globl __early_init + .type __early_init, @function __early_init: blr -/** @endcond */ +#endif /* !defined(__DOXYGEN__) */ + /** @} */ diff --git a/os/ports/GCC/PPC/rules.mk b/os/ports/GCC/PPC/rules.mk index b5f5060ef..eeb5ee77b 100644 --- a/os/ports/GCC/PPC/rules.mk +++ b/os/ports/GCC/PPC/rules.mk @@ -4,13 +4,17 @@ OPT = $(USE_OPT) COPT = $(USE_COPT) CPPOPT = $(USE_CPPOPT) -ifeq ($(USE_CURRP_CACHING),yes) - OPT += -ffixed-r7 -DCH_CURRP_REGISTER_CACHE='"r7"' -endif ifeq ($(USE_LINK_GC),yes) OPT += -ffunction-sections -fdata-sections endif +# VLE option handling. +ifeq ($(USE_VLE),yes) + DDEFS += -DPPC_USE_VLE=1 + DADEFS += -DPPC_USE_VLE=1 + MCU += -mvle +endif + # Source files groups SRC = $(CSRC)$(CPPSRC)