Performance tweaks.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15575 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2022-04-08 15:00:21 +00:00
parent 5720e1f605
commit 065477bdba
5 changed files with 25 additions and 25 deletions

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@ -123,11 +123,11 @@
#define STM32_SW STM32_SW_PLL1_P_CK
#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
#define STM32_D1CPRE STM32_D1CPRE_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV4
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV2
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV2
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV2
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV2
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV2
/*
* Peripherals clocks static settings.

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@ -118,11 +118,11 @@
#define STM32_SW STM32_SW_PLL1_P_CK
#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
#define STM32_D1CPRE STM32_D1CPRE_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV4
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV2
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV2
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV2
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV2
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV2
/*
* Peripherals clocks static settings.

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@ -118,11 +118,11 @@
#define STM32_SW STM32_SW_PLL1_P_CK
#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
#define STM32_D1CPRE STM32_D1CPRE_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV4
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV2
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV2
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV2
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV2
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV2
/*
* Peripherals clocks static settings.

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@ -123,11 +123,11 @@
#define STM32_SW STM32_SW_PLL1_P_CK
#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
#define STM32_D1CPRE STM32_D1CPRE_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV4
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV2
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV2
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV2
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV2
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV2
/*
* Peripherals clocks static settings.

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@ -123,11 +123,11 @@
#define STM32_SW STM32_SW_PLL1_P_CK
#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
#define STM32_D1CPRE STM32_D1CPRE_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV4
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1
#define STM32_D1HPRE STM32_D1HPRE_DIV2
#define STM32_D1PPRE3 STM32_D1PPRE3_DIV2
#define STM32_D2PPRE1 STM32_D2PPRE1_DIV2
#define STM32_D2PPRE2 STM32_D2PPRE2_DIV2
#define STM32_D3PPRE4 STM32_D3PPRE4_DIV2
/*
* Peripherals clocks static settings.