mirror of https://github.com/rusefi/ChibiOS.git
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13493 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio
parent
ed791a2588
commit
067cd0016d
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@ -589,7 +589,7 @@
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* @p panic_msg variable set to @p NULL.
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*/
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#if !defined(CH_DBG_ENABLE_STACK_CHECK)
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#define CH_DBG_ENABLE_STACK_CHECK FALSE
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#define CH_DBG_ENABLE_STACK_CHECK TRUE
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#endif
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/**
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File diff suppressed because one or more lines are too long
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@ -60,6 +60,10 @@
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void *port_swap_stacks(void *sp) {
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thread_t *ntp;
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#if CH_DBG_ENABLE_STACK_CHECK == TRUE
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currp->ctx.splim = __get_PSPLIM();
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#endif
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chSysLock();
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/* TODO statistics, tracing etc */
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@ -68,6 +72,10 @@ void *port_swap_stacks(void *sp) {
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chSysUnlock();
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#if CH_DBG_ENABLE_STACK_CHECK == TRUE
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__set_PSPLIM(ntp->ctx.splim);
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#endif
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return ntp->ctx.sp;
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}
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@ -284,6 +284,9 @@ struct port_intctx {
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*/
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struct port_context {
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struct port_intctx *sp;
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#if (CH_DBG_ENABLE_STACK_CHECK == TRUE) || defined(__DOXYGEN__)
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uint32_t splim;
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#endif
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};
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#endif /* !defined(_FROM_ASM_) */
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@ -359,9 +362,11 @@ struct port_context {
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* @details This code usually setup the context switching frame represented
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* by an @p port_intctx structure.
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*/
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#if (CH_DBG_ENABLE_STACK_CHECK == TRUE) || defined(__DOXYGEN__)
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#define PORT_SETUP_CONTEXT(tp, wbase, wtop, pf, arg) do { \
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(tp)->ctx.sp = (struct port_intctx *)((uint8_t *)(wtop) - \
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sizeof (struct port_intctx)); \
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(tp)->ctx.splim = (uint32_t)(wbase); \
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(tp)->ctx.sp = (struct port_intctx *) \
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((uint8_t *)(wtop) - sizeof (struct port_intctx));\
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(tp)->ctx.sp->basepri = CORTEX_BASEPRI_KERNEL; \
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(tp)->ctx.sp->r5 = (uint32_t)(arg); \
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(tp)->ctx.sp->r4 = (uint32_t)(pf); \
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@ -369,6 +374,18 @@ struct port_context {
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(tp)->ctx.sp->xpsr = (uint32_t)0x01000000; \
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(tp)->ctx.sp->pc = (uint32_t)__port_thread_start; \
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} while (false)
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#else
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#define PORT_SETUP_CONTEXT(tp, wbase, wtop, pf, arg) do { \
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(tp)->ctx.sp = (struct port_intctx *) \
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((uint8_t *)(wtop) - sizeof (struct port_intctx));\
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(tp)->ctx.sp->basepri = CORTEX_BASEPRI_KERNEL; \
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(tp)->ctx.sp->r5 = (uint32_t)(arg); \
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(tp)->ctx.sp->r4 = (uint32_t)(pf); \
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(tp)->ctx.sp->lr_exc = (uint32_t)0xFFFFFFFD; \
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(tp)->ctx.sp->xpsr = (uint32_t)0x01000000; \
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(tp)->ctx.sp->pc = (uint32_t)__port_thread_start; \
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} while (false)
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#endif
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/**
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* @brief Computes the thread working area global size.
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@ -452,6 +469,7 @@ struct port_context {
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} while (false)
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#else
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#define port_switch(ntp, otp) do { \
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_dbg_leave_lock(); \
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register thread_t *_ntp asm ("r0") = (ntp); \
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register thread_t *_otp asm ("r1") = (otp); \
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struct port_intctx *r13 = (struct port_intctx *)__get_PSP(); \
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@ -459,6 +477,7 @@ struct port_context {
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chSysHalt("stack overflow"); \
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} \
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asm volatile ("svc #0" : : "r" (_otp), "r" (_ntp) : "memory"); \
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_dbg_enter_lock(); \
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} while (false)
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#endif
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@ -79,6 +79,12 @@ SVC_Handler:
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mrs r2, PSP
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stmdb r2!, {r3-r11,lr}
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str r2, [r1, #CONTEXT_OFFSET]
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#if CH_DBG_ENABLE_STACK_CHECK
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mrs r2, PSPLIM
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str r2, [r1, #CONTEXT_OFFSET + 4]
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ldr r2, [r0, #CONTEXT_OFFSET + 4]
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msr PSPLIM, r2
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#endif
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ldr r2, [r0, #CONTEXT_OFFSET]
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ldmia r2!, {r3-r11, lr}
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msr PSP, r2
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@ -15,10 +15,10 @@
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*/
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/**
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* @file crt0_v7m.S
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* @brief Generic ARMv7-M (Cortex-M3/M4/M7) startup file for ChibiOS.
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* @file crt0_v8m-ml.S
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* @brief Generic ARMv8-M mainline (Cortex-M33/M55) startup file for ChibiOS.
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*
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* @addtogroup ARMCMx_GCC_STARTUP_V7M
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* @addtogroup ARMCMx_GCC_STARTUP_V8M_ML
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* @{
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*/
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@ -169,7 +169,7 @@
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#if !defined(__DOXYGEN__)
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.syntax unified
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.cpu cortex-m3
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.cpu cortex-m33
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#if CRT0_INIT_FPU == TRUE
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.fpu fpv4-sp-d16
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#else
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@ -194,10 +194,14 @@ _crt0_entry:
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ldr r0, =__main_stack_end__
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msr MSP, r0
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#endif
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ldr r0, =__main_stack_base__
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msr MSPLIM, r0
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/* PSP stack pointers initialization.*/
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ldr r0, =__process_stack_end__
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msr PSP, r0
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ldr r0, =__process_stack_base__
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msr PSPLIM, r0
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#if CRT0_VTOR_INIT == TRUE
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ldr r0, =_vectors
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@ -2,7 +2,7 @@
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STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c
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STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S \
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$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v8m-mainline.S
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$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v8m-ml.S
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STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \
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$(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32L5xx \
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