mirror of https://github.com/rusefi/ChibiOS.git
Single APB variant.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14316 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file RCCv1/stm32_apb.inc
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* @brief Shared APB clock handler.
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*
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* @addtogroup STM32_APB_HANDLER
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* @{
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*/
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/**
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* @name PPRE field bits definitions
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* @{
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*/
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#define STM32_PPRE_MASK (7U << RCC_CFGR_PPRE_Pos)
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#define STM32_PPRE_FIELD(n) ((n) << RCC_CFGR_PPRE_Pos)
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#define STM32_PPRE_DIV1 STM32_PPRE_FIELD(0U)
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#define STM32_PPRE_DIV2 STM32_PPRE_FIELD(4U)
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#define STM32_PPRE_DIV4 STM32_PPRE_FIELD(5U)
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#define STM32_PPRE_DIV8 STM32_PPRE_FIELD(6U)
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#define STM32_PPRE_DIV16 STM32_PPRE_FIELD(7U)
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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/* Checks on configurations.*/
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#if !defined(STM32_PPRE)
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#error "STM32_PPRE not defined in mcuconf.h"
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#endif
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/* Input checks.*/
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#if !defined(STM32_PCLK_MAX)
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#error "STM32_PCLK_MAX not defined in hal_lld.h"
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#endif
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#if !defined(STM32_HCLK)
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#error "STM32_HCLK not defined in hal_lld.h"
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#endif
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/**
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* @brief APB frequency.
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*/
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#if (STM32_PPRE == STM32_PPRE_DIV1) || defined(__DOXYGEN__)
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#define STM32_PCLK (STM32_HCLK / 1U)
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#elif STM32_PPRE == STM32_PPRE_DIV2
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#define STM32_PCLK (STM32_HCLK / 2U)
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#elif STM32_PPRE == STM32_PPRE_DIV4
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#define STM32_PCLK (STM32_HCLK / 4U)
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#elif STM32_PPRE == STM32_PPRE_DIV8
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#define STM32_PCLK (STM32_HCLK / 8U)
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#elif STM32_PPRE == STM32_PPRE_DIV16
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#define STM32_PCLK (STM32_HCLK / 16U)
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#else
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#error "invalid STM32_PPRE value specified"
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#endif
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/*
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* APB1 frequency check.
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*/
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#if STM32_PCLK > STM32_PCLK_MAX
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#error "STM32_PCLK exceeding maximum frequency (STM32_PCLK_MAX)"
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#endif
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/** @} */
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