rusefi
/
ChibiOS
mirror of https://github.com/rusefi/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fixed bug #1245. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15858 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2022-12-08 09:56:12 +00:00
parent ddb6c2338a
commit 12ac770e6f
10 changed files with 48 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
demos/STM32/RT-STM32L053-DISCOVERY/cfg/mcuconf.h
View File

@ -125,16 +125,21 @@
*/ */
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C3_IRQ_PRIORITY 3
#define STM32_I2C_USE_DMA TRUE #define STM32_I2C_USE_DMA TRUE
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_I2C3_DMA_PRIORITY 1
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/* /*

5
demos/STM32/RT-STM32L053R8-NUCLEO64/cfg/mcuconf.h
View File

@ -125,16 +125,21 @@
*/ */
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C3_IRQ_PRIORITY 3
#define STM32_I2C_USE_DMA TRUE #define STM32_I2C_USE_DMA TRUE
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_I2C3_DMA_PRIORITY 1
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/* /*

16
os/hal/ports/STM32/STM32L0xx/stm32_registry.h
View File

@ -852,10 +852,10 @@
#define STM32_HAS_I2C3 TRUE #define STM32_HAS_I2C3 TRUE
#define STM32_I2C3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3) |\ #define STM32_I2C3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3) |\
STM32_DMA_STREAM_ID_MSK(1, 5)) STM32_DMA_STREAM_ID_MSK(1, 5))
#define STM32_I2C3_RX_DMA_CHN 0x00E0E000 #define STM32_I2C3_RX_DMA_CHN 0x000E0E00
#define STM32_I2C3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4) |\ #define STM32_I2C3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 6)) STM32_DMA_STREAM_ID_MSK(1, 4))
#define STM32_I2C3_TX_DMA_CHN 0x0E0E0000 #define STM32_I2C3_TX_DMA_CHN 0x0000E0E0
/* SDIO attributes.*/ /* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE #define STM32_HAS_SDIO FALSE
@ -1070,10 +1070,10 @@
#define STM32_HAS_I2C3 TRUE #define STM32_HAS_I2C3 TRUE
#define STM32_I2C3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3) |\ #define STM32_I2C3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3) |\
STM32_DMA_STREAM_ID_MSK(1, 5)) STM32_DMA_STREAM_ID_MSK(1, 5))
#define STM32_I2C3_RX_DMA_CHN 0x00E0E000 #define STM32_I2C3_RX_DMA_CHN 0x000E0E00
#define STM32_I2C3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4) |\ #define STM32_I2C3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 6)) STM32_DMA_STREAM_ID_MSK(1, 4))
#define STM32_I2C3_TX_DMA_CHN 0x0E0E0000 #define STM32_I2C3_TX_DMA_CHN 0x0000E0E0
/* SDIO attributes.*/ /* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE #define STM32_HAS_SDIO FALSE

2
readme.txt
View File

@ -131,6 +131,8 @@
- NEW: Increased stacks size in RT test suite from 128 to 192. added an - NEW: Increased stacks size in RT test suite from 128 to 192. added an
option to override the stack size by defining THREADS_STACK_SIZE option to override the stack size by defining THREADS_STACK_SIZE
in the makefile. in the makefile.
- FIX: Fixed wrong DMA definitions for STM32L0xx I2C3 peripheral (bug #1245)
(backported to 20.3.5)(backported to 21.11.3).
- FIX: Fixed wrong path in STM32L053 ADC demo makefile (bug #1244) - FIX: Fixed wrong path in STM32L053 ADC demo makefile (bug #1244)
(backported to 20.3.5)(backported to 21.11.3). (backported to 20.3.5)(backported to 21.11.3).
- FIX: Fixed missing semicolon in STM32 OTGv1 driver (bug #1243) - FIX: Fixed missing semicolon in STM32 OTGv1 driver (bug #1243)

5
testhal/STM32/multi/ADC/cfg/stm32l053r8_nucleo64/mcuconf.h
View File

@ -125,16 +125,21 @@
*/ */
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C3_IRQ_PRIORITY 3
#define STM32_I2C_USE_DMA TRUE #define STM32_I2C_USE_DMA TRUE
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_I2C3_DMA_PRIORITY 1
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/multi/PAL/cfg/stm32l053_discovery/mcuconf.h
View File

@ -125,16 +125,21 @@
*/ */
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C3_IRQ_PRIORITY 3
#define STM32_I2C_USE_DMA TRUE #define STM32_I2C_USE_DMA TRUE
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_I2C3_DMA_PRIORITY 1
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/multi/RTC/cfg/stm32l053_discovery/mcuconf.h
View File

@ -125,16 +125,21 @@
*/ */
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C3_IRQ_PRIORITY 3
#define STM32_I2C_USE_DMA TRUE #define STM32_I2C_USE_DMA TRUE
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_I2C3_DMA_PRIORITY 1
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/multi/SPI/cfg/stm32l053r8_nucleo64/mcuconf.h
View File

@ -125,16 +125,21 @@
*/ */
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 3 #define STM32_I2C_I2C1_IRQ_PRIORITY 3
#define STM32_I2C_I2C2_IRQ_PRIORITY 3 #define STM32_I2C_I2C2_IRQ_PRIORITY 3
#define STM32_I2C_I2C3_IRQ_PRIORITY 3
#define STM32_I2C_USE_DMA TRUE #define STM32_I2C_USE_DMA TRUE
#define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_PRIORITY 1
#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1
#define STM32_I2C_I2C3_DMA_PRIORITY 1
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/* /*

7
tools/ftl/processors/conf/mcuconf_stm32l05xxx/mcuconf.h.ftl
View File

@ -136,16 +136,21 @@
*/ */
#define STM32_I2C_USE_I2C1 ${doc.STM32_I2C_USE_I2C1!"FALSE"} #define STM32_I2C_USE_I2C1 ${doc.STM32_I2C_USE_I2C1!"FALSE"}
#define STM32_I2C_USE_I2C2 ${doc.STM32_I2C_USE_I2C2!"FALSE"} #define STM32_I2C_USE_I2C2 ${doc.STM32_I2C_USE_I2C2!"FALSE"}
#define STM32_I2C_USE_I2C3 ${doc.STM32_I2C_USE_I2C3!"FALSE"}
#define STM32_I2C_BUSY_TIMEOUT ${doc.STM32_I2C_BUSY_TIMEOUT!"50"} #define STM32_I2C_BUSY_TIMEOUT ${doc.STM32_I2C_BUSY_TIMEOUT!"50"}
#define STM32_I2C_I2C1_IRQ_PRIORITY ${doc.STM32_I2C_I2C1_IRQ_PRIORITY!"3"} #define STM32_I2C_I2C1_IRQ_PRIORITY ${doc.STM32_I2C_I2C1_IRQ_PRIORITY!"3"}
#define STM32_I2C_I2C2_IRQ_PRIORITY ${doc.STM32_I2C_I2C2_IRQ_PRIORITY!"3"} #define STM32_I2C_I2C2_IRQ_PRIORITY ${doc.STM32_I2C_I2C2_IRQ_PRIORITY!"3"}
#define STM32_I2C_I2C3_IRQ_PRIORITY ${doc.STM32_I2C_I2C3_IRQ_PRIORITY!"3"}
#define STM32_I2C_USE_DMA ${doc.STM32_I2C_USE_DMA!"TRUE"} #define STM32_I2C_USE_DMA ${doc.STM32_I2C_USE_DMA!"TRUE"}
#define STM32_I2C_I2C1_DMA_PRIORITY ${doc.STM32_I2C_I2C1_DMA_PRIORITY!"1"} #define STM32_I2C_I2C1_DMA_PRIORITY ${doc.STM32_I2C_I2C1_DMA_PRIORITY!"1"}
#define STM32_I2C_I2C2_DMA_PRIORITY ${doc.STM32_I2C_I2C2_DMA_PRIORITY!"1"} #define STM32_I2C_I2C2_DMA_PRIORITY ${doc.STM32_I2C_I2C2_DMA_PRIORITY!"1"}
#define STM32_I2C_I2C3_DMA_PRIORITY ${doc.STM32_I2C_I2C3_DMA_PRIORITY!"1"}
#define STM32_I2C_I2C1_RX_DMA_STREAM ${doc.STM32_I2C_I2C1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"} #define STM32_I2C_I2C1_RX_DMA_STREAM ${doc.STM32_I2C_I2C1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"}
#define STM32_I2C_I2C1_TX_DMA_STREAM ${doc.STM32_I2C_I2C1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"} #define STM32_I2C_I2C1_TX_DMA_STREAM ${doc.STM32_I2C_I2C1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"}
#define STM32_I2C_I2C2_RX_DMA_STREAM ${doc.STM32_I2C_I2C2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 5)"} #define STM32_I2C_I2C2_RX_DMA_STREAM ${doc.STM32_I2C_I2C2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 5)"}
#define STM32_I2C_I2C2_TX_DMA_STREAM ${doc.STM32_I2C_I2C2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"} #define STM32_I2C_I2C2_TX_DMA_STREAM ${doc.STM32_I2C_I2C2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
#define STM32_I2C_I2C3_RX_DMA_STREAM ${doc.STM32_I2C_I2C3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 3)"}
#define STM32_I2C_I2C3_TX_DMA_STREAM ${doc.STM32_I2C_I2C3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"}
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"} #define STM32_I2C_DMA_ERROR_HOOK(i2cp) ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
/* /*

4
tools/ftl/processors/conf/mcuconf_stm32l07xxx/mcuconf.h.ftl
View File

@ -155,11 +155,11 @@
#define STM32_I2C_I2C2_DMA_PRIORITY ${doc.STM32_I2C_I2C2_DMA_PRIORITY!"1"} #define STM32_I2C_I2C2_DMA_PRIORITY ${doc.STM32_I2C_I2C2_DMA_PRIORITY!"1"}
#define STM32_I2C_I2C3_DMA_PRIORITY ${doc.STM32_I2C_I2C3_DMA_PRIORITY!"1"} #define STM32_I2C_I2C3_DMA_PRIORITY ${doc.STM32_I2C_I2C3_DMA_PRIORITY!"1"}
#define STM32_I2C_I2C1_RX_DMA_STREAM ${doc.STM32_I2C_I2C1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"} #define STM32_I2C_I2C1_RX_DMA_STREAM ${doc.STM32_I2C_I2C1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 7)"}
#define STM32_I2C_I2C1_TX_DMA_STREAM ${doc.STM32_I2C_I2C1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"} #define STM32_I2C_I2C1_TX_DMA_STREAM ${doc.STM32_I2C_I2C1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"}
#define STM32_I2C_I2C2_RX_DMA_STREAM ${doc.STM32_I2C_I2C2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 5)"} #define STM32_I2C_I2C2_RX_DMA_STREAM ${doc.STM32_I2C_I2C2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 5)"}
#define STM32_I2C_I2C2_TX_DMA_STREAM ${doc.STM32_I2C_I2C2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"} #define STM32_I2C_I2C2_TX_DMA_STREAM ${doc.STM32_I2C_I2C2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 4)"}
#define STM32_I2C_I2C3_RX_DMA_STREAM ${doc.STM32_I2C_I2C3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 3)"} #define STM32_I2C_I2C3_RX_DMA_STREAM ${doc.STM32_I2C_I2C3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 3)"}
#define STM32_I2C_I2C3_TX_DMA_STREAM ${doc.STM32_I2C_I2C3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 6)"} #define STM32_I2C_I2C3_TX_DMA_STREAM ${doc.STM32_I2C_I2C3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID(1, 2)"}
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"} #define STM32_I2C_DMA_ERROR_HOOK(i2cp) ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
/* /*