mirror of https://github.com/rusefi/ChibiOS.git
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7835 35acf78f-673a-0410-8e92-d51de3d6d3f4
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337db8c8b2
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@ -47,6 +47,11 @@
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#define ST_NUMBER STM32_TIM2_NUMBER
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#define ST_NUMBER STM32_TIM2_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_ENABLE_CLOCK() rccEnableTIM2(FALSE)
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#define ST_ENABLE_CLOCK() rccEnableTIM2(FALSE)
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#if defined(STM32F1XX)
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#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM2_STOP
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#else
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM2_STOP
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#endif
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#elif STM32_ST_USE_TIMER == 3
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#elif STM32_ST_USE_TIMER == 3
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM3_IS_32BITS
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM3_IS_32BITS
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@ -57,6 +62,11 @@
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#define ST_NUMBER STM32_TIM3_NUMBER
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#define ST_NUMBER STM32_TIM3_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_ENABLE_CLOCK() rccEnableTIM3(FALSE)
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#define ST_ENABLE_CLOCK() rccEnableTIM3(FALSE)
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#if defined(STM32F1XX)
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#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM3_STOP
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#else
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM3_STOP
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#endif
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#elif STM32_ST_USE_TIMER == 4
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#elif STM32_ST_USE_TIMER == 4
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM4_IS_32BITS
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM4_IS_32BITS
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@ -67,6 +77,11 @@
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#define ST_NUMBER STM32_TIM4_NUMBER
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#define ST_NUMBER STM32_TIM4_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_ENABLE_CLOCK() rccEnableTIM4(FALSE)
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#define ST_ENABLE_CLOCK() rccEnableTIM4(FALSE)
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#if defined(STM32F1XX)
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#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM4_STOP
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#else
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM4_STOP
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#endif
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#elif STM32_ST_USE_TIMER == 5
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#elif STM32_ST_USE_TIMER == 5
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM5_IS_32BITS
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#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM5_IS_32BITS
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@ -77,6 +92,11 @@
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#define ST_NUMBER STM32_TIM5_NUMBER
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#define ST_NUMBER STM32_TIM5_NUMBER
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_CLOCK_SRC STM32_TIMCLK1
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#define ST_ENABLE_CLOCK() rccEnableTIM5(FALSE)
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#define ST_ENABLE_CLOCK() rccEnableTIM5(FALSE)
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#if defined(STM32F1XX)
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#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM5_STOP
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#else
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#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM5_STOP
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#endif
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#else
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#else
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#error "STM32_ST_USE_TIMER specifies an unsupported timer"
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#error "STM32_ST_USE_TIMER specifies an unsupported timer"
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@ -154,11 +174,16 @@ OSAL_IRQ_HANDLER(ST_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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OSAL_IRQ_PROLOGUE();
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STM32_ST_TIM->SR = 0;
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/* Note, under rare circumstances an interrupt can remain latched even if
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the timer SR register has been cleared, in those cases the interrupt
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is simply ignored.*/
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if ((STM32_ST_TIM->SR & TIM_SR_CC1IF) != 0U) {
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STM32_ST_TIM->SR = 0U;
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osalSysLockFromISR();
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osalSysLockFromISR();
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osalOsTimerHandlerI();
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osalOsTimerHandlerI();
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osalSysUnlockFromISR();
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osalSysUnlockFromISR();
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}
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OSAL_IRQ_EPILOGUE();
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OSAL_IRQ_EPILOGUE();
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}
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}
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@ -181,6 +206,9 @@ void st_lld_init(void) {
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/* Enabling timer clock.*/
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/* Enabling timer clock.*/
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ST_ENABLE_CLOCK();
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ST_ENABLE_CLOCK();
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/* Enabling the stop mode during debug for this timer.*/
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ST_ENABLE_STOP();
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/* Initializing the counter in free running mode.*/
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/* Initializing the counter in free running mode.*/
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STM32_ST_TIM->PSC = (ST_CLOCK_SRC / OSAL_ST_FREQUENCY) - 1;
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STM32_ST_TIM->PSC = (ST_CLOCK_SRC / OSAL_ST_FREQUENCY) - 1;
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STM32_ST_TIM->ARR = ST_ARR_INIT;
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STM32_ST_TIM->ARR = ST_ARR_INIT;
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@ -481,10 +481,6 @@ static inline void chVTDoTickI(void) {
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chVTGetSystemTimeX() + 1),
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chVTGetSystemTimeX() + 1),
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"out of time window");
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"out of time window");
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/* if (now > 21) {
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__BKPT(0);
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}*/
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/* Timers processing loop.*/
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/* Timers processing loop.*/
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while (true) {
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while (true) {
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systime_t now;
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systime_t now;
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@ -534,11 +530,6 @@ static inline void chVTDoTickI(void) {
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if (delta < (systime_t)CH_CFG_ST_TIMEDELTA) {
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if (delta < (systime_t)CH_CFG_ST_TIMEDELTA) {
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delta = (systime_t)CH_CFG_ST_TIMEDELTA;
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delta = (systime_t)CH_CFG_ST_TIMEDELTA;
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}
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}
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// if (now + delta >= 23) {
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// __BKPT(0);
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// }
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port_timer_set_alarm(now + delta);
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port_timer_set_alarm(now + delta);
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chDbgAssert((chVTGetSystemTimeX() - ch.vtlist.vt_lasttime) < delta,
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chDbgAssert((chVTGetSystemTimeX() - ch.vtlist.vt_lasttime) < delta,
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@ -99,11 +99,6 @@ void chVTDoSetI(virtual_timer_t *vtp, systime_t delay,
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chDbgCheckClassI();
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chDbgCheckClassI();
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chDbgCheck((vtp != NULL) && (vtfunc != NULL) && (delay != TIME_IMMEDIATE));
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chDbgCheck((vtp != NULL) && (vtfunc != NULL) && (delay != TIME_IMMEDIATE));
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/* systime_t tm = chVTGetSystemTimeX();
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if (tm >= 23) {
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__BKPT(0);
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}*/
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vtp->vt_par = par;
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vtp->vt_par = par;
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vtp->vt_func = vtfunc;
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vtp->vt_func = vtfunc;
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p = ch.vtlist.vt_next;
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p = ch.vtlist.vt_next;
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@ -156,11 +151,6 @@ void chVTDoSetI(virtual_timer_t *vtp, systime_t delay,
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value in the header must be restored.*/;
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value in the header must be restored.*/;
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p->vt_delta -= delay;
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p->vt_delta -= delay;
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ch.vtlist.vt_delta = (systime_t)-1;
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ch.vtlist.vt_delta = (systime_t)-1;
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/* systime_t tmx = chVTGetSystemTimeX();
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if (tmx >= 23) {
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__BKPT(0);
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}*/
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}
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}
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/**
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/**
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chDbgCheck(vtp != NULL);
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chDbgCheck(vtp != NULL);
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chDbgAssert(vtp->vt_func != NULL, "timer not set or already triggered");
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chDbgAssert(vtp->vt_func != NULL, "timer not set or already triggered");
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/* systime_t tm = chVTGetSystemTimeX();
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if (tm >= 23) {
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__BKPT(0);
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}*/
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/* Checking if the element to be removed was the first in the list.*/
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/* Checking if the element to be removed was the first in the list.*/
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#if CH_CFG_ST_TIMEDELTA > 0
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#if CH_CFG_ST_TIMEDELTA > 0
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first = ch.vtlist.vt_next;
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first = ch.vtlist.vt_next;
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@ -242,11 +227,6 @@ void chVTDoResetI(virtual_timer_t *vtp) {
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}
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}
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port_timer_set_alarm(ch.vtlist.vt_lasttime + nowdelta + delta);
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port_timer_set_alarm(ch.vtlist.vt_lasttime + nowdelta + delta);
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/* systime_t tmx = chVTGetSystemTimeX();
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if (tmx >= 23) {
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__BKPT(0);
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}*/
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}
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}
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#endif /* CH_CFG_ST_TIMEDELTA > 0 */
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#endif /* CH_CFG_ST_TIMEDELTA > 0 */
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}
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}
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