mirror of https://github.com/rusefi/ChibiOS.git
Added abstract port setup to PAL and to the MSP430 port.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1042 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
parent
d737613d74
commit
1c7e52eb35
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@ -45,6 +45,7 @@ include ../../test/test.mk
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# C sources here.
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# C sources here.
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CSRC = ../../ports/MSP430/chcore.c \
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CSRC = ../../ports/MSP430/chcore.c \
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../../ports/MSP430/msp430_serial.c \
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../../ports/MSP430/msp430_serial.c \
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../../ports/MSP430/pal_lld.c \
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${KERNSRC} \
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${KERNSRC} \
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${TESTSRC} \
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${TESTSRC} \
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../../src/lib/evtimer.c \
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../../src/lib/evtimer.c \
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@ -25,6 +25,19 @@
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#include "board.h"
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#include "board.h"
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#include "msp430_serial.h"
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#include "msp430_serial.h"
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/*
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* Digital I/O ports static configuration.
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*/
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static const MSP430DIOConfig config =
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{
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{VAL_P1OUT, VAL_P1DIR},
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{VAL_P2OUT, VAL_P2DIR},
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{VAL_P3OUT, VAL_P3DIR},
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{VAL_P4OUT, VAL_P4DIR},
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{VAL_P5OUT, VAL_P5DIR},
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{VAL_P6OUT, VAL_P6DIR},
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};
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/*
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/*
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* Hardware initialization goes here.
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* Hardware initialization goes here.
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* NOTE: Interrupts are still disabled.
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* NOTE: Interrupts are still disabled.
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@ -47,27 +60,9 @@ void hwinit(void) {
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BCSCTL2 = VAL_BCSCTL2;
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BCSCTL2 = VAL_BCSCTL2;
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/*
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/*
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* I/O ports initialization. PxSEL registers are assumed to be cleared after
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* I/O ports initialization.
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* the reset.
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*/
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*/
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palInit();
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palInit(&config);
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palWritePort(IOPORT_A, VAL_P1OUT);
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pal_lld_msp430_set_direction(IOPORT_A, VAL_P1DIR);
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palWritePort(IOPORT_B, VAL_P2OUT);
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pal_lld_msp430_set_direction(IOPORT_B, VAL_P2DIR);
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palWritePort(IOPORT_C, VAL_P3OUT);
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pal_lld_msp430_set_direction(IOPORT_C, VAL_P3DIR);
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palWritePort(IOPORT_D, VAL_P4OUT);
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pal_lld_msp430_set_direction(IOPORT_D, VAL_P4DIR);
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palWritePort(IOPORT_E, VAL_P5OUT);
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pal_lld_msp430_set_direction(IOPORT_E, VAL_P5DIR);
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palWritePort(IOPORT_F, VAL_P6OUT);
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pal_lld_msp430_set_direction(IOPORT_F, VAL_P6DIR);
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/*
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/*
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* Timer 0 setup, uses SMCLK as source.
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* Timer 0 setup, uses SMCLK as source.
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@ -0,0 +1,113 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file ports/MSP430/pal_lld.c
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* @brief MSP430 Digital I/O low level driver code
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* @addtogroup MSP430_PAL
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* @{
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*/
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#include <ch.h>
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#include <pal.h>
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/**
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* @brief MSP430 I/O ports configuration.
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*
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* @param[in] the MSP430 ports configuration
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*
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* @note The @p PxIFG, @p PxIE and @p PxSEL registers are cleared. @p PxOUT
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* and @p PxDIR are configured as specified.
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*/
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void _pal_lld_init(const MSP430DIOConfig *config) {
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#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
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IOPORT_A->iop_full.ie.reg_p = 0;
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IOPORT_A->iop_full.ifg.reg_p = 0;
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IOPORT_A->iop_full.sel.reg_p = 0;
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IOPORT_A->iop_common.out = config->P1Data.out;
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IOPORT_A->iop_common.dir = config->P1Data.dir;
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#endif
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#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
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IOPORT_B->iop_full.ie.reg_p = 0;
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IOPORT_B->iop_full.ifg.reg_p = 0;
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IOPORT_B->iop_full.sel.reg_p = 0;
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IOPORT_B->iop_common.out = config->P2Data.out;
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IOPORT_B->iop_common.dir = config->P2Data.dir;
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#endif
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#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
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IOPORT_C->iop_simple.sel.reg_p = 0;
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IOPORT_C->iop_common.out = config->P3Data.out;
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IOPORT_C->iop_common.dir = config->P3Data.dir;
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#endif
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#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
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IOPORT_D->iop_simple.sel.reg_p = 0;
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IOPORT_D->iop_common.out = config->P4Data.out;
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IOPORT_D->iop_common.dir = config->P4Data.dir;
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#endif
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#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
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IOPORT_E->iop_simple.sel.reg_p = 0;
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IOPORT_E->iop_common.out = config->P5Data.out;
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IOPORT_E->iop_common.dir = config->P5Data.dir;
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#endif
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#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
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IOPORT_F->iop_simple.sel.reg_p = 0;
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IOPORT_F->iop_common.out = config->P6Data.out;
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IOPORT_F->iop_common.dir = config->P6Data.dir;
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#endif
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}
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/**
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* @brief Pads mode setup.
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* @details This function programs a pads group belonging to the same port
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* with the specified mode.
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*
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* @param[in] port the port identifier
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* @param[in] mask the group mask
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* @param[in] mode the setup mode
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*
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* @note This function is not meant to be invoked directly by the application
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* code.
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* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
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* the MSP430x1xx Family User's Guide. Unconnected pads are set to
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* high logic state by default.
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* @note This function does not alter the @p PxSEL registers. Alternate
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* functions setup must be handled by device-specific code.
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*/
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void _pal_lld_setmode(ioportid_t port, ioportmask_t mask, uint_fast8_t mode) {
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switch (mode) {
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case PAL_MODE_RESET:
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case PAL_MODE_INPUT:
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port->iop_common.dir.reg_p &= ~mask;
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break;
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case PAL_MODE_UNCONNECTED:
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port->iop_common.out.reg_p |= mask;
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case PAL_MODE_OUTPUT_PUSHPULL:
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port->iop_common.dir.reg_p |= mask;
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break;
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}
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}
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/** @} */
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@ -19,7 +19,7 @@
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/**
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/**
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* @file ports/MSP430/pal_lld.h
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* @file ports/MSP430/pal_lld.h
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* @brief MSP430 Digital I/O low level driver
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* @brief MSP430 Digital I/O low level driver header
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* @addtogroup MSP430_PAL
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* @addtogroup MSP430_PAL
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* @{
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* @{
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*/
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*/
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@ -29,28 +29,103 @@
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#include <msp430x16x.h>
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#include <msp430x16x.h>
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/*===========================================================================*/
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/* Unsupported modes and specific modes */
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/*===========================================================================*/
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#undef PAL_MODE_INPUT_PULLUP
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#undef PAL_MODE_INPUT_PULLDOWN
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#undef PAL_MODE_OUTPUT_OPENDRAIN
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/*===========================================================================*/
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/*===========================================================================*/
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/* I/O Ports Types and constants. */
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/* I/O Ports Types and constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/**
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* @brief Simplified MSP430 I/O port representation.
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* @details This structure represents the common part of all the MSP430 I/O
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* ports.
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*/
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struct port_common_t {
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ioregister_t in;
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ioregister_t out;
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ioregister_t dir;
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};
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/**
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/**
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* @brief Generic MSP430 I/O port.
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* @brief Generic MSP430 I/O port.
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*/
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*/
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union __ioport {
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union __ioport {
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struct {
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struct port_common_t iop_common;
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ioregister_t in;
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ioregister_t out;
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ioregister_t dir;
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} iop_common;
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struct port_simple_t iop_simple;
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struct port_simple_t iop_simple;
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struct port_full_t iop_full;
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struct port_full_t iop_full;
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};
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};
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/**
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* @brief Setup registers common to all the MSP430 ports.
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*/
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struct port_setup_t {
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ioregister_t out;
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ioregister_t dir;
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};
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/**
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* @brief MSP430 I/O ports static initializer.
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* @details An instance of this structure must be passed to @p palInit() at
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* system startup time in order to initialized the digital I/O
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* subsystem. This represents only the initial setup, specific pads
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* or whole ports can be reprogrammed at later time.
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*/
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typedef struct {
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#if defined(__MSP430_HAS_PORT1__) || \
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defined(__MSP430_HAS_PORT1_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 1 setup data.*/
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struct port_setup_t P1Data;
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#endif
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#if defined(__MSP430_HAS_PORT2__) || \
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defined(__MSP430_HAS_PORT2_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 2 setup data.*/
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struct port_setup_t P2Data;
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#endif
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#if defined(__MSP430_HAS_PORT3__) || \
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defined(__MSP430_HAS_PORT3_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 3 setup data.*/
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struct port_setup_t P3Data;
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#endif
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#if defined(__MSP430_HAS_PORT4__) || \
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defined(__MSP430_HAS_PORT4_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 4 setup data.*/
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struct port_setup_t P4Data;
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#endif
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#if defined(__MSP430_HAS_PORT5__) || \
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defined(__MSP430_HAS_PORT5_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 5 setup data.*/
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struct port_setup_t P5Data;
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#endif
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#if defined(__MSP430_HAS_PORT6__) || \
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defined(__MSP430_HAS_PORT6_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 6 setup data.*/
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struct port_setup_t P6Data;
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#endif
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} MSP430DIOConfig;
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/**
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/**
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* @brief Width, in bits, of an I/O port.
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* @brief Width, in bits, of an I/O port.
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*/
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*/
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#define PAL_IOPORTS_WIDTH 8
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#define PAL_IOPORTS_WIDTH 8
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/**
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* @brief Whole port mask.
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* @brief This macro specifies all the valid bits into a port.
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*/
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#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)
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/**
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/**
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* @brief Digital I/O port sized unsigned type.
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* @brief Digital I/O port sized unsigned type.
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*/
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*/
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@ -135,8 +210,11 @@ typedef union __ioport * ioportid_t;
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/**
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/**
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* @brief Low level PAL subsystem initialization.
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* @brief Low level PAL subsystem initialization.
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* @details In MSP430 programs all the ports as input.
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*
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* @param[in] the MSP430 ports configuration
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*/
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*/
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#define pal_lld_init()
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#define pal_lld_init(config) _pal_lld_init(config)
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/**
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/**
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* @brief Reads the physical I/O port states.
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* @brief Reads the physical I/O port states.
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@ -180,12 +258,31 @@ typedef union __ioport * ioportid_t;
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}
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}
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/**
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/**
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* @brief Set pins direction.
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* @brief Pads mode setup.
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* @details This function programs the pins direction within a port.
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* @details This function programs a pads group belonging to the same port
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* with the specified mode.
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*
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* @param[in] port the port identifier
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* @param[in] mask the group mask
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* @param[in] mode the setup mode
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*
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* @note This function is not meant to be invoked directly by the application
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* code.
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* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
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* the MSP430x1xx Family User's Guide.
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* @note This function does not alter the @p PxSEL registers. Alternate
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* functions setup must be handled by device-specific code.
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*/
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*/
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#define pal_lld_msp430_set_direction(port, dirmask) { \
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#define pal_lld_setmode(port, mask, mode) _pal_lld_setmode(port, mask, mode)
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(port)->iop_common.dir.reg_p = (dirmask); \
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#ifdef __cplusplus
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extern "C" {
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#endif
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void _pal_lld_init(const MSP430DIOConfig *config);
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void _pal_lld_setmode(ioportid_t port, ioportmask_t mask, uint_fast8_t mode);
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#ifdef __cplusplus
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}
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}
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#endif
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#endif /* _PAL_LLD_H_ */
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#endif /* _PAL_LLD_H_ */
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@ -70,4 +70,12 @@ void palWriteBus(IOBus *bus, ioportmask_t bits) {
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palWriteGroup(bus->bus_portid, bus->bus_mask, bus->bus_offset, bits);
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palWriteGroup(bus->bus_portid, bus->bus_mask, bus->bus_offset, bits);
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}
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}
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void palSetBusMode(IOBus *bus, uint_fast8_t mode) {
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chDbgCheck((bus != NULL) &&
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(bus->bus_offset > PAL_IOPORTS_WIDTH), "palSetBusMode");
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palSetMode(bus->bus_portid, bus->bus_mask, mode);
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}
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/** @} */
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/** @} */
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@ -27,6 +27,48 @@
|
||||||
#ifndef _PAL_H_
|
#ifndef _PAL_H_
|
||||||
#define _PAL_H_
|
#define _PAL_H_
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief After reset state.
|
||||||
|
* @details The state itself is not specified and is architecture dependent,
|
||||||
|
* it is guaranteed to be equal to the after-reset state. It is
|
||||||
|
* usually an input state.
|
||||||
|
*/
|
||||||
|
#define PAL_MODE_RESET 0
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Safe state for <b>unconnected</b> pads.
|
||||||
|
* @details The state itself is not specified and is architecture dependent,
|
||||||
|
* it may be mapped on @p PAL_MODE_INPUT_PULLUP,
|
||||||
|
* @p PAL_MODE_INPUT_PULLDOWN or @p PAL_MODE_OUTPUT_PUSHPULL as
|
||||||
|
* example.
|
||||||
|
*/
|
||||||
|
#define PAL_MODE_UNCONNECTED 1
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Regular input high-Z pad.
|
||||||
|
*/
|
||||||
|
#define PAL_MODE_INPUT 2
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Input pad with weak pull up resistor.
|
||||||
|
*/
|
||||||
|
#define PAL_MODE_INPUT_PULLUP 3
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Input pad with weak pull down resistor.
|
||||||
|
*/
|
||||||
|
#define PAL_MODE_INPUT_PULLDOWN 4
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Push-pull output pad.
|
||||||
|
*/
|
||||||
|
#define PAL_MODE_OUTPUT_PUSHPULL 5
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Open-drain output pad.
|
||||||
|
*/
|
||||||
|
#define PAL_MODE_OUTPUT_OPENDRAIN 6
|
||||||
|
|
||||||
#ifndef _PAL_LLD_H_
|
#ifndef _PAL_LLD_H_
|
||||||
#include "pal_lld.h"
|
#include "pal_lld.h"
|
||||||
#endif
|
#endif
|
||||||
|
@ -103,8 +145,12 @@ typedef struct {
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief PAL subsystem initialization.
|
* @brief PAL subsystem initialization.
|
||||||
|
*
|
||||||
|
* @param[in] config pointer to an architecture specific configuration
|
||||||
|
* structure. This structure is defined in the low level driver
|
||||||
|
* header.
|
||||||
*/
|
*/
|
||||||
#define palInit() pal_lld_init()
|
#define palInit(config) pal_lld_init(config)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Reads the physical I/O port states.
|
* @brief Reads the physical I/O port states.
|
||||||
|
@ -354,11 +400,29 @@ typedef struct {
|
||||||
#define palTogglePad(port, pad) pal_lld_togglepad(port, pad)
|
#define palTogglePad(port, pad) pal_lld_togglepad(port, pad)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Pads mode setup.
|
||||||
|
* @details This function programs a pads group belonging to the same port
|
||||||
|
* with the specified mode.
|
||||||
|
*
|
||||||
|
* @param[in] port the port identifier
|
||||||
|
* @param[in] mask the group mask
|
||||||
|
* @param[in] mode the setup mode
|
||||||
|
*
|
||||||
|
* @note Programming an unknown or unsupported mode is silently ignored.
|
||||||
|
*/
|
||||||
|
#if !defined(pal_lld_setmode) || defined(__DOXYGEN__)
|
||||||
|
#define palSetMode(port, mask, mode)
|
||||||
|
#else
|
||||||
|
#define palSetMode(port, mask, mode) pal_lld_setmode(port, mask, mode)
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
ioportmask_t palReadBus(IOBus *bus);
|
ioportmask_t palReadBus(IOBus *bus);
|
||||||
void palWriteBus(IOBus *bus, ioportmask_t bits);
|
void palWriteBus(IOBus *bus, ioportmask_t bits);
|
||||||
|
void palSetBusMode(IOBus *bus, uint_fast8_t mode);
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -36,6 +36,12 @@
|
||||||
*/
|
*/
|
||||||
#define PAL_IOPORTS_WIDTH 32
|
#define PAL_IOPORTS_WIDTH 32
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Whole port mask.
|
||||||
|
* @brief This macro specifies all the valid bits into a port.
|
||||||
|
*/
|
||||||
|
#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Digital I/O port sized unsigned type.
|
* @brief Digital I/O port sized unsigned type.
|
||||||
*/
|
*/
|
||||||
|
@ -254,6 +260,20 @@ typedef uint32_t ioportid_t;
|
||||||
*/
|
*/
|
||||||
#define pal_lld_togglepad(port, pad)
|
#define pal_lld_togglepad(port, pad)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Pads mode setup.
|
||||||
|
* @details This function programs a pads group belonging to the same port
|
||||||
|
* with the specified mode.
|
||||||
|
*
|
||||||
|
* @param[in] port the port identifier
|
||||||
|
* @param[in] mask the group mask
|
||||||
|
* @param[in] mode the setup mode
|
||||||
|
*
|
||||||
|
* @note This function is not meant to be invoked directly by the application
|
||||||
|
* code.
|
||||||
|
*/
|
||||||
|
#define pal_lld_setmode(port, mask, mode)
|
||||||
|
|
||||||
#endif /* _PAL_LLD_H_ */
|
#endif /* _PAL_LLD_H_ */
|
||||||
|
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
Loading…
Reference in New Issue