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Completed timers support for ICU and PWM, fixed small documentation errors. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13235 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2019-12-30 07:08:29 +00:00
parent 0b80fa4bcb
commit 1f0912d2b0
6 changed files with 461 additions and 62 deletions
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38
os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.h
View File

@ -44,7 +44,7 @@
/**
* @brief GPTD1 driver enable switch.
* @details If set to @p TRUE the support for GPTD1 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM1) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM1 FALSE
@ -53,7 +53,7 @@
/**
* @brief GPTD2 driver enable switch.
* @details If set to @p TRUE the support for GPTD2 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM2) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM2 FALSE
@ -62,7 +62,7 @@
/**
* @brief GPTD3 driver enable switch.
* @details If set to @p TRUE the support for GPTD3 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM3) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM3 FALSE
@ -71,7 +71,7 @@
/**
* @brief GPTD4 driver enable switch.
* @details If set to @p TRUE the support for GPTD4 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM4) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM4 FALSE
@ -80,7 +80,7 @@
/**
* @brief GPTD5 driver enable switch.
* @details If set to @p TRUE the support for GPTD5 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM5) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM5 FALSE
@ -89,7 +89,7 @@
/**
* @brief GPTD6 driver enable switch.
* @details If set to @p TRUE the support for GPTD6 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM6) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM6 FALSE
@ -98,7 +98,7 @@
/**
* @brief GPTD7 driver enable switch.
* @details If set to @p TRUE the support for GPTD7 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM7) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM7 FALSE
@ -107,7 +107,7 @@
/**
* @brief GPTD8 driver enable switch.
* @details If set to @p TRUE the support for GPTD8 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM8) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM8 FALSE
@ -116,7 +116,7 @@
/**
* @brief GPTD9 driver enable switch.
* @details If set to @p TRUE the support for GPTD9 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM9) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM9 FALSE
@ -125,7 +125,7 @@
/**
* @brief GPTD10 driver enable switch.
* @details If set to @p TRUE the support for GPTD10 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM10) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM10 FALSE
@ -134,7 +134,7 @@
/**
* @brief GPTD11 driver enable switch.
* @details If set to @p TRUE the support for GPTD11 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM11) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM11 FALSE
@ -143,7 +143,7 @@
/**
* @brief GPTD12 driver enable switch.
* @details If set to @p TRUE the support for GPTD12 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM12) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM12 FALSE
@ -152,7 +152,7 @@
/**
* @brief GPTD13 driver enable switch.
* @details If set to @p TRUE the support for GPTD13 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM13) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM13 FALSE
@ -161,7 +161,7 @@
/**
* @brief GPTD14 driver enable switch.
* @details If set to @p TRUE the support for GPTD14 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM14) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM14 FALSE
@ -170,7 +170,7 @@
/**
* @brief GPTD14 driver enable switch.
* @details If set to @p TRUE the support for GPTD15 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM15) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM15 FALSE
@ -179,7 +179,7 @@
/**
* @brief GPTD14 driver enable switch.
* @details If set to @p TRUE the support for GPTD16 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM16) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM16 FALSE
@ -188,7 +188,7 @@
/**
* @brief GPTD14 driver enable switch.
* @details If set to @p TRUE the support for GPTD17 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM17) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM17 FALSE
@ -197,7 +197,7 @@
/**
* @brief GPTD21 driver enable switch.
* @details If set to @p TRUE the support for GPTD21 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM21) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM21 FALSE
@ -206,7 +206,7 @@
/**
* @brief GPTD22 driver enable switch.
* @details If set to @p TRUE the support for GPTD22 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_GPT_USE_TIM22) || defined(__DOXYGEN__)
#define STM32_GPT_USE_TIM22 FALSE

116
os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c
View File

@ -158,6 +158,30 @@ ICUDriver ICUD16;
ICUDriver ICUD17;
#endif
/**
* @brief ICUD20 driver identifier.
* @note The driver ICUD20 allocates the timer TIM20 when enabled.
*/
#if STM32_ICU_USE_TIM20 || defined(__DOXYGEN__)
ICUDriver ICUD20;
#endif
/**
* @brief ICUD21 driver identifier.
* @note The driver ICUD21 allocates the timer TIM21 when enabled.
*/
#if STM32_ICU_USE_TIM21 || defined(__DOXYGEN__)
ICUDriver ICUD21;
#endif
/**
* @brief ICUD22 driver identifier.
* @note The driver ICUD22 allocates the timer TIM22 when enabled.
*/
#if STM32_ICU_USE_TIM22 || defined(__DOXYGEN__)
ICUDriver ICUD22;
#endif
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
@ -420,6 +444,24 @@ OSAL_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
#endif /* !defined(STM32_TIM17_SUPPRESS_ISR) */
#endif /* STM32_ICU_USE_TIM17 */
#if STM32_ICU_USE_TIM20 || defined(__DOXYGEN__)
#if !defined(STM32_TIM20_SUPPRESS_ISR)
#error "TIM20 ISR not defined by platform"
#endif /* !defined(STM32_TIM20_SUPPRESS_ISR) */
#endif /* STM32_ICU_USE_TIM20 */
#if STM32_ICU_USE_TIM21 || defined(__DOXYGEN__)
#if !defined(STM32_TIM21_SUPPRESS_ISR)
#error "TIM21 ISR not defined by platform"
#endif /* !defined(STM32_TIM21_SUPPRESS_ISR) */
#endif /* STM32_ICU_USE_TIM21 */
#if STM32_ICU_USE_TIM22 || defined(__DOXYGEN__)
#if !defined(STM32_TIM22_SUPPRESS_ISR)
#error "TIM22 ISR not defined by platform"
#endif /* !defined(STM32_TIM22_SUPPRESS_ISR) */
#endif /* STM32_ICU_USE_TIM22 */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@ -520,6 +562,24 @@ void icu_lld_init(void) {
icuObjectInit(&ICUD17);
ICUD17.tim = STM32_TIM17;
#endif
#if STM32_ICU_USE_TIM20
/* Driver initialization.*/
icuObjectInit(&ICUD20);
ICUD20.tim = STM32_TIM20;
#endif
#if STM32_ICU_USE_TIM21
/* Driver initialization.*/
icuObjectInit(&ICUD21);
ICUD21.tim = STM32_TIM21;
#endif
#if STM32_ICU_USE_TIM22
/* Driver initialization.*/
icuObjectInit(&ICUD22);
ICUD22.tim = STM32_TIM22;
#endif
}
/**
@ -730,13 +790,49 @@ void icu_lld_start(ICUDriver *icup) {
if (&ICUD17 == icup) {
rccEnableTIM17(true);
rccResetTIM17();
#if defined(STM32_TIM15CLK)
#if defined(STM32_TIM17CLK)
icup->clock = STM32_TIM17CLK;
#else
icup->clock = STM32_TIMCLK2;
#endif
}
#endif
#if STM32_ICU_USE_TIM20
if (&ICUD20 == icup) {
rccEnableTIM20(true);
rccResetTIM20();
#if defined(STM32_TIM20CLK)
icup->clock = STM32_TIM20CLK;
#else
icup->clock = STM32_TIMCLK2;
#endif
}
#endif
#if STM32_ICU_USE_TIM21
if (&ICUD21 == icup) {
rccEnableTIM21(true);
rccResetTIM21();
#if defined(STM32_TIM21CLK)
icup->clock = STM32_TIM21CLK;
#else
icup->clock = STM32_TIMCLK1;
#endif
}
#endif
#if STM32_ICU_USE_TIM22
if (&ICUD22 == icup) {
rccEnableTIM22(true);
rccResetTIM22();
#if defined(STM32_TIM22CLK)
icup->clock = STM32_TIM22CLK;
#else
icup->clock = STM32_TIMCLK1;
#endif
}
#endif
}
else {
/* Driver re-configuration scenario, it must be stopped first.*/
@ -933,6 +1029,24 @@ void icu_lld_stop(ICUDriver *icup) {
rccDisableTIM17();
}
#endif
#if STM32_ICU_USE_TIM20
if (&ICUD20 == icup) {
rccDisableTIM20();
}
#endif
#if STM32_ICU_USE_TIM21
if (&ICUD21 == icup) {
rccDisableTIM21();
}
#endif
#if STM32_ICU_USE_TIM22
if (&ICUD22 == icup) {
rccDisableTIM22();
}
#endif
}
}

156
os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.h
View File

@ -44,7 +44,7 @@
/**
* @brief ICUD1 driver enable switch.
* @details If set to @p TRUE the support for ICUD1 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM1) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM1 FALSE
@ -53,7 +53,7 @@
/**
* @brief ICUD2 driver enable switch.
* @details If set to @p TRUE the support for ICUD2 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM2) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM2 FALSE
@ -62,7 +62,7 @@
/**
* @brief ICUD3 driver enable switch.
* @details If set to @p TRUE the support for ICUD3 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM3) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM3 FALSE
@ -71,7 +71,7 @@
/**
* @brief ICUD4 driver enable switch.
* @details If set to @p TRUE the support for ICUD4 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM4) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM4 FALSE
@ -80,7 +80,7 @@
/**
* @brief ICUD5 driver enable switch.
* @details If set to @p TRUE the support for ICUD5 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM5) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM5 FALSE
@ -89,7 +89,7 @@
/**
* @brief ICUD8 driver enable switch.
* @details If set to @p TRUE the support for ICUD8 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM8) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM8 FALSE
@ -98,7 +98,7 @@
/**
* @brief ICUD9 driver enable switch.
* @details If set to @p TRUE the support for ICUD9 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM9) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM9 FALSE
@ -107,7 +107,7 @@
/**
* @brief ICUD10 driver enable switch.
* @details If set to @p TRUE the support for ICUD10 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM10) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM10 FALSE
@ -116,7 +116,7 @@
/**
* @brief ICUD11 driver enable switch.
* @details If set to @p TRUE the support for ICUD11 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM11) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM11 FALSE
@ -125,7 +125,7 @@
/**
* @brief ICUD12 driver enable switch.
* @details If set to @p TRUE the support for ICUD12 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM12) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM12 FALSE
@ -134,7 +134,7 @@
/**
* @brief ICUD13 driver enable switch.
* @details If set to @p TRUE the support for ICUD13 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM13) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM13 FALSE
@ -143,7 +143,7 @@
/**
* @brief ICUD14 driver enable switch.
* @details If set to @p TRUE the support for ICUD14 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM14) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM14 FALSE
@ -152,7 +152,7 @@
/**
* @brief ICUD15 driver enable switch.
* @details If set to @p TRUE the support for ICUD15 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM15) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM15 FALSE
@ -161,7 +161,7 @@
/**
* @brief ICUD16 driver enable switch.
* @details If set to @p TRUE the support for ICUD16 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM16) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM16 FALSE
@ -170,12 +170,39 @@
/**
* @brief ICUD17 driver enable switch.
* @details If set to @p TRUE the support for ICUD17 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM17) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM17 FALSE
#endif
/**
* @brief ICUD20 driver enable switch.
* @details If set to @p TRUE the support for ICUD20 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM20) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM20 FALSE
#endif
/**
* @brief ICUD21 driver enable switch.
* @details If set to @p TRUE the support for ICUD21 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM21) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM21 FALSE
#endif
/**
* @brief ICUD22 driver enable switch.
* @details If set to @p TRUE the support for ICUD22 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_ICU_USE_TIM22) || defined(__DOXYGEN__)
#define STM32_ICU_USE_TIM22 FALSE
#endif
/**
* @brief ICUD1 interrupt priority level setting.
*/
@ -280,6 +307,27 @@
#if !defined(STM32_ICU_TIM17_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_ICU_TIM17_IRQ_PRIORITY 7
#endif
/**
* @brief ICUD20 interrupt priority level setting.
*/
#if !defined(STM32_ICU_TIM20_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_ICU_TIM20_IRQ_PRIORITY 7
#endif
/**
* @brief ICUD21 interrupt priority level setting.
*/
#if !defined(STM32_ICU_TIM21_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_ICU_TIM21_IRQ_PRIORITY 7
#endif
/**
* @brief ICUD22 interrupt priority level setting.
*/
#if !defined(STM32_ICU_TIM22_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_ICU_TIM22_IRQ_PRIORITY 7
#endif
/** @} */
/*===========================================================================*/
@ -346,6 +394,18 @@
#define STM32_HAS_TIM17 FALSE
#endif
#if !defined(STM32_HAS_TIM20)
#define STM32_HAS_TIM20 FALSE
#endif
#if !defined(STM32_HAS_TIM21)
#define STM32_HAS_TIM21 FALSE
#endif
#if !defined(STM32_HAS_TIM22)
#define STM32_HAS_TIM22 FALSE
#endif
#if STM32_ICU_USE_TIM1 && !STM32_HAS_TIM1
#error "TIM1 not present in the selected device"
#endif
@ -406,6 +466,18 @@
#error "TIM17 not present in the selected device"
#endif
#if STM32_ICU_USE_TIM17 && !STM32_HAS_TIM20
#error "TIM20 not present in the selected device"
#endif
#if STM32_ICU_USE_TIM17 && !STM32_HAS_TIM21
#error "TIM21 not present in the selected device"
#endif
#if STM32_ICU_USE_TIM17 && !STM32_HAS_TIM22
#error "TIM22 not present in the selected device"
#endif
#if !STM32_ICU_USE_TIM1 && !STM32_ICU_USE_TIM2 && \
!STM32_ICU_USE_TIM3 && !STM32_ICU_USE_TIM4 && \
!STM32_ICU_USE_TIM5 && !STM32_ICU_USE_TIM8 && \
@ -413,7 +485,8 @@
!STM32_ICU_USE_TIM11 && !STM32_ICU_USE_TIM12 && \
!STM32_ICU_USE_TIM13 && !STM32_ICU_USE_TIM14 && \
!STM32_ICU_USE_TIM15 && !STM32_ICU_USE_TIM16 && \
!STM32_ICU_USE_TIM17
!STM32_ICU_USE_TIM17 && !STM32_ICU_USE_TIM20 && \
!STM32_ICU_USE_TIM21 && !STM32_ICU_USE_TIM22
#error "ICU driver activated but no TIM peripheral assigned"
#endif
@ -538,6 +611,30 @@
#endif
#endif
#if STM32_ICU_USE_TIM20
#if defined(STM32_TIM20_IS_USED)
#error "ICUD20 requires TIM20 but the timer is already used"
#else
#define STM32_TIM20_IS_USED
#endif
#endif
#if STM32_ICU_USE_TIM21
#if defined(STM32_TIM21_IS_USED)
#error "ICUD21 requires TIM21 but the timer is already used"
#else
#define STM32_TIM21_IS_USED
#endif
#endif
#if STM32_ICU_USE_TIM22
#if defined(STM32_TIM22_IS_USED)
#error "ICUD22 requires TIM22 but the timer is already used"
#else
#define STM32_TIM22_IS_USED
#endif
#endif
/* IRQ priority checks.*/
#if STM32_ICU_USE_TIM1 && !defined(STM32_TIM1_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM1_IRQ_PRIORITY)
@ -614,6 +711,21 @@
#error "Invalid IRQ priority assigned to TIM17"
#endif
#if STM32_ICU_USE_TIM20 && !defined(STM32_TIM20_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM20_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM20"
#endif
#if STM32_ICU_USE_TIM21 && !defined(STM32_TIM21_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM21_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM21"
#endif
#if STM32_ICU_USE_TIM22 && !defined(STM32_TIM22_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_ICU_TIM22_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM22"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@ -824,6 +936,18 @@ extern ICUDriver ICUD16;
extern ICUDriver ICUD17;
#endif
#if STM32_ICU_USE_TIM20 && !defined(__DOXYGEN__)
extern ICUDriver ICUD20;
#endif
#if STM32_ICU_USE_TIM21 && !defined(__DOXYGEN__)
extern ICUDriver ICUD21;
#endif
#if STM32_ICU_USE_TIM22 && !defined(__DOXYGEN__)
extern ICUDriver ICUD22;
#endif
#ifdef __cplusplus
extern "C" {
#endif

80
os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c
View File

@ -156,12 +156,28 @@ PWMDriver PWMD17;
/**
* @brief PWMD20 driver identifier.
* @note The driver PWMD20 allocates the timer TIM17 when enabled.
* @note The driver PWMD20 allocates the timer TIM20 when enabled.
*/
#if STM32_PWM_USE_TIM20 || defined(__DOXYGEN__)
PWMDriver PWMD20;
#endif
/**
* @brief PWMD21 driver identifier.
* @note The driver PWMD21 allocates the timer TIM21 when enabled.
*/
#if STM32_PWM_USE_TIM21 || defined(__DOXYGEN__)
PWMDriver PWMD21;
#endif
/**
* @brief PWMD22 driver identifier.
* @note The driver PWMD22 allocates the timer TIM22 when enabled.
*/
#if STM32_PWM_USE_TIM22 || defined(__DOXYGEN__)
PWMDriver PWMD22;
#endif
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
@ -406,6 +422,18 @@ OSAL_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
#endif /* !defined(STM32_TIM20_SUPPRESS_ISR) */
#endif /* STM32_PWM_USE_TIM20 */
#if STM32_PWM_USE_TIM21 || defined(__DOXYGEN__)
#if !defined(STM32_TIM21_SUPPRESS_ISR)
#error "TIM21 ISR not defined by platform"
#endif /* !defined(STM32_TIM21_SUPPRESS_ISR) */
#endif /* STM32_PWM_USE_TIM21 */
#if STM32_PWM_USE_TIM22 || defined(__DOXYGEN__)
#if !defined(STM32_TIM22_SUPPRESS_ISR)
#error "TIM22 ISR not defined by platform"
#endif /* !defined(STM32_TIM22_SUPPRESS_ISR) */
#endif /* STM32_PWM_USE_TIM22 */
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@ -528,6 +556,20 @@ void pwm_lld_init(void) {
PWMD20.channels = STM32_TIM20_CHANNELS;
PWMD20.tim = STM32_TIM20;
#endif
#if STM32_PWM_USE_TIM21
/* Driver initialization.*/
pwmObjectInit(&PWMD21);
PWMD21.channels = STM32_TIM21_CHANNELS;
PWMD21.tim = STM32_TIM21;
#endif
#if STM32_PWM_USE_TIM22
/* Driver initialization.*/
pwmObjectInit(&PWMD22);
PWMD22.channels = STM32_TIM22_CHANNELS;
PWMD22.tim = STM32_TIM22;
#endif
}
/**
@ -757,6 +799,30 @@ void pwm_lld_start(PWMDriver *pwmp) {
}
#endif
#if STM32_PWM_USE_TIM21
if (&PWMD21 == pwmp) {
rccEnableTIM21(true);
rccResetTIM21();
#if defined(STM32_TIM21CLK)
pwmp->clock = STM32_TIM21CLK;
#else
pwmp->clock = STM32_TIMCLK1;
#endif
}
#endif
#if STM32_PWM_USE_TIM22
if (&PWMD22 == pwmp) {
rccEnableTIM22(true);
rccResetTIM22();
#if defined(STM32_TIM22CLK)
pwmp->clock = STM32_TIM22CLK;
#else
pwmp->clock = STM32_TIMCLK1;
#endif
}
#endif
/* All channels configured in PWM1 mode with preload enabled and will
stay that way until the driver is stopped.*/
pwmp->tim->CCMR1 = STM32_TIM_CCMR1_OC1M(6) | STM32_TIM_CCMR1_OC1PE |
@ -1040,6 +1106,18 @@ void pwm_lld_stop(PWMDriver *pwmp) {
rccDisableTIM20();
}
#endif
#if STM32_PWM_USE_TIM21
if (&PWMD21 == pwmp) {
rccDisableTIM21();
}
#endif
#if STM32_PWM_USE_TIM22
if (&PWMD22 == pwmp) {
rccDisableTIM22();
}
#endif
}
}

121
os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.h
View File

@ -85,7 +85,7 @@
* @brief If advanced timer features switch.
* @details If set to @p TRUE the advanced features for TIM1 and TIM8 are
* enabled.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_ADVANCED) || defined(__DOXYGEN__)
#define STM32_PWM_USE_ADVANCED FALSE
@ -94,7 +94,7 @@
/**
* @brief PWMD1 driver enable switch.
* @details If set to @p TRUE the support for PWMD1 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM1) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM1 FALSE
@ -103,7 +103,7 @@
/**
* @brief PWMD2 driver enable switch.
* @details If set to @p TRUE the support for PWMD2 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM2) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM2 FALSE
@ -112,7 +112,7 @@
/**
* @brief PWMD3 driver enable switch.
* @details If set to @p TRUE the support for PWMD3 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM3) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM3 FALSE
@ -121,7 +121,7 @@
/**
* @brief PWMD4 driver enable switch.
* @details If set to @p TRUE the support for PWMD4 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM4) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM4 FALSE
@ -130,7 +130,7 @@
/**
* @brief PWMD5 driver enable switch.
* @details If set to @p TRUE the support for PWMD5 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM5) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM5 FALSE
@ -139,7 +139,7 @@
/**
* @brief PWMD8 driver enable switch.
* @details If set to @p TRUE the support for PWMD8 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM8) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM8 FALSE
@ -148,7 +148,7 @@
/**
* @brief PWMD9 driver enable switch.
* @details If set to @p TRUE the support for PWMD9 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM9) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM9 FALSE
@ -157,7 +157,7 @@
/**
* @brief PWMD10 driver enable switch.
* @details If set to @p TRUE the support for PWMD10 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM10) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM10 FALSE
@ -166,7 +166,7 @@
/**
* @brief PWMD11 driver enable switch.
* @details If set to @p TRUE the support for PWMD11 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM11) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM11 FALSE
@ -175,7 +175,7 @@
/**
* @brief PWMD12 driver enable switch.
* @details If set to @p TRUE the support for PWMD12 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM12) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM12 FALSE
@ -184,7 +184,7 @@
/**
* @brief PWMD13 driver enable switch.
* @details If set to @p TRUE the support for PWMD13 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM13) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM13 FALSE
@ -193,7 +193,7 @@
/**
* @brief PWMD14 driver enable switch.
* @details If set to @p TRUE the support for PWMD14 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM14) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM14 FALSE
@ -202,7 +202,7 @@
/**
* @brief PWMD15 driver enable switch.
* @details If set to @p TRUE the support for PWMD15 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM15) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM15 FALSE
@ -211,7 +211,7 @@
/**
* @brief PWMD16 driver enable switch.
* @details If set to @p TRUE the support for PWMD16 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM16) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM16 FALSE
@ -220,7 +220,7 @@
/**
* @brief PWMD17 driver enable switch.
* @details If set to @p TRUE the support for PWMD17 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM17) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM17 FALSE
@ -229,12 +229,30 @@
/**
* @brief PWMD20 driver enable switch.
* @details If set to @p TRUE the support for PWMD20 is included.
* @note The default is @p TRUE.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM20) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM20 FALSE
#endif
/**
* @brief PWMD21 driver enable switch.
* @details If set to @p TRUE the support for PWMD21 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM21) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM21 FALSE
#endif
/**
* @brief PWMD22 driver enable switch.
* @details If set to @p TRUE the support for PWMD22 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_PWM_USE_TIM22) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM22 FALSE
#endif
/**
* @brief PWMD1 interrupt priority level setting.
*/
@ -346,6 +364,20 @@
#if !defined(STM32_PWM_TIM20_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM_TIM20_IRQ_PRIORITY 7
#endif
/**
* @brief PWMD21 interrupt priority level setting.
*/
#if !defined(STM32_PWM_TIM21_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM_TIM21_IRQ_PRIORITY 7
#endif
/**
* @brief PWMD22 interrupt priority level setting.
*/
#if !defined(STM32_PWM_TIM22_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM_TIM22_IRQ_PRIORITY 7
#endif
/** @} */
/*===========================================================================*/
@ -416,6 +448,14 @@
#define STM32_HAS_TIM20 FALSE
#endif
#if !defined(STM32_HAS_TIM21)
#define STM32_HAS_TIM21 FALSE
#endif
#if !defined(STM32_HAS_TIM22)
#define STM32_HAS_TIM22 FALSE
#endif
#if STM32_PWM_USE_TIM1 && !STM32_HAS_TIM1
#error "TIM1 not present in the selected device"
#endif
@ -476,10 +516,18 @@
#error "TIM17 not present in the selected device"
#endif
#if STM32_PWM_USE_TIM17 && !STM32_HAS_TIM20
#if STM32_PWM_USE_TIM20 && !STM32_HAS_TIM20
#error "TIM20 not present in the selected device"
#endif
#if STM32_PWM_USE_TIM21 && !STM32_HAS_TIM21
#error "TIM21 not present in the selected device"
#endif
#if STM32_PWM_USE_TIM22 && !STM32_HAS_TIM22
#error "TIM22 not present in the selected device"
#endif
#if !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM2 && \
!STM32_PWM_USE_TIM3 && !STM32_PWM_USE_TIM4 && \
!STM32_PWM_USE_TIM5 && !STM32_PWM_USE_TIM8 && \
@ -487,7 +535,8 @@
!STM32_PWM_USE_TIM11 && !STM32_PWM_USE_TIM11 && \
!STM32_PWM_USE_TIM13 && !STM32_PWM_USE_TIM13 && \
!STM32_PWM_USE_TIM15 && !STM32_PWM_USE_TIM15 && \
!STM32_PWM_USE_TIM17 && !STM32_PWM_USE_TIM20
!STM32_PWM_USE_TIM17 && !STM32_PWM_USE_TIM20 && \
!STM32_PWM_USE_TIM21 && !STM32_PWM_USE_TIM22
#error "PWM driver activated but no TIM peripheral assigned"
#endif
@ -625,6 +674,22 @@
#endif
#endif
#if STM32_PWM_USE_TIM21
#if defined(STM32_TIM21_IS_USED)
#error "PWMD21 requires TIM21 but the timer is already used"
#else
#define STM32_TIM21_IS_USED
#endif
#endif
#if STM32_PWM_USE_TIM22
#if defined(STM32_TIM22_IS_USED)
#error "PWMD22 requires TIM22 but the timer is already used"
#else
#define STM32_TIM22_IS_USED
#endif
#endif
/* IRQ priority checks.*/
#if STM32_PWM_USE_TIM1 && !defined(STM32_TIM1_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM1_IRQ_PRIORITY)
@ -706,6 +771,16 @@
#error "Invalid IRQ priority assigned to TIM20"
#endif
#if STM32_PWM_USE_TIM21 && !defined(STM32_TIM21_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM21_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM21"
#endif
#if STM32_PWM_USE_TIM22 && !defined(STM32_TIM22_SUPPRESS_ISR) && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_PWM_TIM22_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to TIM22"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@ -923,6 +998,14 @@ extern PWMDriver PWMD17;
extern PWMDriver PWMD20;
#endif
#if STM32_PWM_USE_TIM21 && !defined(__DOXYGEN__)
extern PWMDriver PWMD21;
#endif
#if STM32_PWM_USE_TIM22 && !defined(__DOXYGEN__)
extern PWMDriver PWMD22;
#endif
#ifdef __cplusplus
extern "C" {
#endif

6
readme.txt
View File

@ -74,10 +74,10 @@
*****************************************************************************
*** Next ***
- HAL: Added support for timers 9...17,20 to STM32 PWM driver.
- HAL: Added support for timers 9...17 to STM32 ICU driver.
- HAL: Added support for timers 9..17, 20..22 to STM32 PWM driver.
- HAL: Added support for timers 9..17, 20..22 to STM32 ICU driver.
- HAL: Added support for timers 10 and 13 to STM32 GPT driver.
- HAL: Added support for timers 9...14 to STM32 ST driver.
- HAL: Added support for timers 9..14 to STM32 ST driver.
- HAL: STM32 ST driver is now integrated with new IRQ infrastructure and
performs cross-checks with GPT, ICU and PWM drivers on timers usage.
- HAL: Improved support for shared handlers. Now there are centralized