mirror of https://github.com/rusefi/ChibiOS.git
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@132 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
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commit
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@ -121,7 +121,7 @@ LIBS = $(DLIBS) $(ULIBS)
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MCFLAGS = -mcpu=$(MCU)
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ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS)
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LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
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ODFLAGS = -x --syms
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@ -120,7 +120,7 @@ LIBS = $(DLIBS) $(ULIBS)
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MCFLAGS = -mcpu=$(MCU)
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ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS)
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LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
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ODFLAGS = -x --syms
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@ -123,7 +123,7 @@ LIBS = $(DLIBS) $(ULIBS)
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MCFLAGS = -mcpu=$(MCU)
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ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS)
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LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
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ODFLAGS = -x --syms
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@ -122,7 +122,7 @@ LIBS = $(DLIBS) $(ULIBS)
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MCFLAGS = -mcpu=$(MCU)
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ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
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CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS)
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LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
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ODFLAGS = -x --syms
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@ -115,10 +115,11 @@ chSysSwitchI:
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* interrupt handler:
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*
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* High +------------+
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* | R12 | -+
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* | LR_USR | -+
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* | R12 | |
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* | R3 | |
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* | R2 | |
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* | R1 | | External context: IRQ handler frame
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* | R2 | | External context: IRQ handler frame
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* | R1 | |
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* | R0 | |
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* | LR_IRQ | | (user code return address)
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* | SPSR | -+ (user code status)
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@ -136,7 +137,6 @@ chSysSwitchI:
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*/
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.globl IrqHandler
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IrqHandler:
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sub lr, lr, #4
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stmfd sp!, {r0-r3, r12, lr}
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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@ -152,7 +152,6 @@ IrqHandler:
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.globl T0IrqHandler
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T0IrqHandler:
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sub lr, lr, #4
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stmfd sp!, {r0-r3, r12, lr}
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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@ -168,7 +167,6 @@ T0IrqHandler:
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.globl UART0IrqHandler
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UART0IrqHandler:
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sub lr, lr, #4
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stmfd sp!, {r0-r3, r12, lr}
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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@ -184,7 +182,6 @@ UART0IrqHandler:
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.globl UART1IrqHandler
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UART1IrqHandler:
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sub lr, lr, #4
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stmfd sp!, {r0-r3, r12, lr}
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#ifdef THUMB_NO_INTERWORKING
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add r0, pc, #1
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@ -216,12 +213,13 @@ IrqCommon:
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bl chSchRescRequiredI
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#endif
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cmp r0, #0 // Simply returns if a
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ldmeqfd sp!, {r0-r3, r12, pc}^ // reschedule is not required.
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ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not
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subeqs pc, lr, #4 // required.
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// Saves the IRQ mode registers in the system stack.
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ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty.
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msr CPSR_c, #MODE_SYS | I_BIT
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stmfd sp!, {r0-r3, r12} // Registers on System Stack.
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stmfd sp!, {r0-r3, r12, lr} // Registers on System Stack.
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msr CPSR_c, #MODE_IRQ | I_BIT
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mrs r0, SPSR
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mov r1, lr
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@ -247,6 +245,6 @@ IrqCommon:
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msr SPSR_fsxc, r0
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mov lr, r1
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msr CPSR_c, #MODE_SYS | I_BIT
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ldmfd sp!, {r0-r3, r12}
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ldmfd sp!, {r0-r3, r12, lr}
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msr CPSR_c, #MODE_IRQ | I_BIT
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subs pc, lr, #0
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subs pc, lr, #4
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@ -40,9 +40,15 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
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*****************************************************************************
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*** 0.4.4 ***
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- Fixed a very important bug in the preemption ARM code, important enough to
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make this update *mandatory*.
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Note: This is not a kernel bug but something specific with the ARM port, the
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other ports are not affected.
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- Fixed a nasty bug in the pure THUMB mode threads trampoline code (chcore2.s,
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threadstart), it failed on THUMB threads returning with a "bx" instruction.
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The bug did not affect ARM mode or THUMB with interworking mode.
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Note: This is not a kernel bug but something specific with the ARM port, the
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other ports are not affected.
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- Fixed a bug in chIQGetTimeout(), interrupts were not re-enabled when exiting
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the function because a timeout. The problem affected that API only.
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- Fixed a potential problem in chSysInit(), it should not affect any past
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@ -310,7 +310,7 @@ t_msg TestThread(void *p) {
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}
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print("Queues throughput = ");
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printn(i * 4);
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print(" bytes/S");
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println(" bytes/S");
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println("\r\nTest complete");
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return 0;
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