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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6101 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
pcirillo 2013-08-07 14:41:02 +00:00
parent f21695d466
commit 2401ee8c0d
4 changed files with 100 additions and 47 deletions
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21
os/hal/platforms/SPC5xx/eMIOS_v1/icu_lld.c
View File

@ -380,8 +380,12 @@ void icu_lld_init(void) {
A2_3 = 0U;
/* eMIOSx channels initially all not in use.*/
#if SPC5_HAS_EMIOS0
reset_emios0_active_channels();
#endif
#if SPC5_HAS_EMIOS1
reset_emios1_active_channels();
#endif
#if SPC5_ICU_USE_EMIOS0_CH0
/* Driver initialization.*/
@ -489,11 +493,14 @@ void icu_lld_init(void) {
*/
void icu_lld_start(ICUDriver *icup) {
chDbgAssert(get_emios0_active_channels() < 28, "icu_lld_start(), #1",
#if SPC5_HAS_EMIOS0
chDbgAssert(get_emios0_active_channels() < 25, "icu_lld_start(), #1",
"too many channels");
chDbgAssert(get_emios1_active_channels() < 28, "icu_lld_start(), #2",
#endif
#if SPC5_HAS_EMIOS1
chDbgAssert(get_emios1_active_channels() < 25, "icu_lld_start(), #2",
"too many channels");
#endif
if (icup->state == ICU_STOP) {
/* Enables the peripheral.*/
@ -598,10 +605,14 @@ void icu_lld_start(ICUDriver *icup) {
*/
void icu_lld_stop(ICUDriver *icup) {
chDbgAssert(get_emios0_active_channels() < 28, "icu_lld_stop(), #1",
#if SPC5_HAS_EMIOS0
chDbgAssert(get_emios0_active_channels() < 25, "icu_lld_stop(), #1",
"too many channels");
chDbgAssert(get_emios1_active_channels() < 28, "icu_lld_stop(), #2",
#endif
#if SPC5_HAS_EMIOS1
chDbgAssert(get_emios1_active_channels() < 25, "icu_lld_stop(), #2",
"too many channels");
#endif
if (icup->state == ICU_READY) {

39
os/hal/platforms/SPC5xx/eMIOS_v1/pwm_lld.c
View File

@ -696,8 +696,12 @@ CH_IRQ_HANDLER(SPC5_EMIOS1_GFR_F22F23_HANDLER) {
*/
void pwm_lld_init(void) {
/* eMIOSx channels initially all not in use.*/
#if SPC5_HAS_EMIOS0
reset_emios0_active_channels();
#endif
#if SPC5_HAS_EMIOS1
reset_emios1_active_channels();
#endif
#if SPC5_PWM_USE_EMIOS0_GROUP0
/* Driver initialization.*/
@ -772,10 +776,14 @@ void pwm_lld_start(PWMDriver *pwmp) {
uint32_t psc = 0, i = 0;
chDbgAssert(get_emios0_active_channels() < 28,
#if SPC5_HAS_EMIOS0
chDbgAssert(get_emios0_active_channels() < 25,
"pwm_lld_start(), #1", "too many channels");
chDbgAssert(get_emios1_active_channels() < 28,
#endif
#if SPC5_HAS_EMIOS1
chDbgAssert(get_emios1_active_channels() < 25,
"pwm_lld_start(), #2", "too many channels");
#endif
if (pwmp->state == PWM_STOP) {
#if SPC5_PWM_USE_EMIOS0_GROUP0
@ -882,6 +890,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
#endif
/* Set clock prescaler and control register.*/
#if SPC5_HAS_EMIOS0 && SPC5_HAS_EMIOS1
if (pwmp->emiosp == &EMIOS_0) {
psc = (SPC5_EMIOS0_CLK / pwmp->config->frequency);
chDbgAssert((psc <= 0xFFFF) &&
@ -895,7 +904,23 @@ void pwm_lld_start(PWMDriver *pwmp) {
((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)),
"pwm_lld_start(), #4", "invalid frequency");
}
#elif SPC5_HAS_EMIOS0
if (pwmp->emiosp == &EMIOS_0) {
psc = (SPC5_EMIOS0_CLK / pwmp->config->frequency);
chDbgAssert((psc <= 0xFFFF) &&
(((psc) * pwmp->config->frequency) == SPC5_EMIOS0_CLK) &&
((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)),
"pwm_lld_start(), #3", "invalid frequency");
}
#elif SPC5_HAS_EMIOS1
if (pwmp->emiosp == &EMIOS_1) {
psc = (SPC5_EMIOS1_CLK / pwmp->config->frequency);
chDbgAssert((psc <= 0xFFFF) &&
(((psc) * pwmp->config->frequency) == SPC5_EMIOS1_CLK) &&
((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)),
"pwm_lld_start(), #3", "invalid frequency");
}
#endif
#if SPC5_PWM_USE_EMIOS0_GROUP0
if (&PWMD1 == pwmp) {
@ -1310,10 +1335,14 @@ void pwm_lld_stop(PWMDriver *pwmp) {
uint32_t i = 0;
chDbgAssert(get_emios0_active_channels() < 28, "pwm_lld_stop(), #1",
#if SPC5_HAS_EMIOS0
chDbgAssert(get_emios0_active_channels() < 25, "pwm_lld_stop(), #1",
"too many channels");
chDbgAssert(get_emios1_active_channels() < 28, "pwm_lld_stop(), #2",
#endif
#if SPC5_HAS_EMIOS1
chDbgAssert(get_emios1_active_channels() < 25, "pwm_lld_stop(), #2",
"too many channels");
#endif
if (pwmp->state == PWM_READY) {

75
os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.c
View File

@ -44,29 +44,26 @@
/**
* @brief Number of active eMIOSx Channels.
*/
#if SPC5_HAS_EMIOS0
static uint32_t emios0_active_channels;
#endif
#if SPC5_HAS_EMIOS1
static uint32_t emios1_active_channels;
#endif
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
#if SPC5_HAS_EMIOS0
void reset_emios0_active_channels() {
emios0_active_channels = 0;
}
void reset_emios1_active_channels() {
emios1_active_channels = 0;
}
uint32_t get_emios0_active_channels() {
return emios0_active_channels;
}
uint32_t get_emios1_active_channels() {
return emios1_active_channels;
}
void increase_emios0_active_channels() {
emios0_active_channels++;
}
@ -75,14 +72,6 @@ void decrease_emios0_active_channels() {
emios0_active_channels--;
}
void increase_emios1_active_channels() {
emios1_active_channels++;
}
void decrease_emios1_active_channels() {
emios1_active_channels--;
}
void active_emios0_clock(ICUDriver *icup, PWMDriver *pwmp) {
/* If this is the first Channel activated then the eMIOS0 is enabled.*/
if (emios0_active_channels == 1) {
@ -113,6 +102,42 @@ void active_emios0_clock(ICUDriver *icup, PWMDriver *pwmp) {
}
}
void deactive_emios0_clock(ICUDriver *icup, PWMDriver *pwmp) {
/* If it is the last active channels then the eMIOS0 is disabled.*/
if (emios0_active_channels == 0) {
if (icup != NULL) {
if (icup->emiosp->UCDIS.R == 0) {
halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL,
SPC5_EMIOS0_STOP_PCTL);
}
} else if (pwmp != NULL) {
if (pwmp->emiosp->UCDIS.R == 0) {
halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL,
SPC5_EMIOS0_STOP_PCTL);
}
}
}
}
#endif
#if SPC5_HAS_EMIOS1
void reset_emios1_active_channels() {
emios1_active_channels = 0;
}
uint32_t get_emios1_active_channels() {
return emios1_active_channels;
}
void increase_emios1_active_channels() {
emios1_active_channels++;
}
void decrease_emios1_active_channels() {
emios1_active_channels--;
}
void active_emios1_clock(ICUDriver *icup, PWMDriver *pwmp) {
/* If this is the first Channel activated then the eMIOS1 is enabled.*/
if (emios1_active_channels == 1) {
@ -143,23 +168,6 @@ void active_emios1_clock(ICUDriver *icup, PWMDriver *pwmp) {
}
}
void deactive_emios0_clock(ICUDriver *icup, PWMDriver *pwmp) {
/* If it is the last active channels then the eMIOS0 is disabled.*/
if (emios0_active_channels == 0) {
if (icup != NULL) {
if (icup->emiosp->UCDIS.R == 0) {
halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL,
SPC5_EMIOS0_STOP_PCTL);
}
} else if (pwmp != NULL) {
if (pwmp->emiosp->UCDIS.R == 0) {
halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL,
SPC5_EMIOS0_STOP_PCTL);
}
}
}
}
void deactive_emios1_clock(ICUDriver *icup, PWMDriver *pwmp) {
/* If it is the last active channels then the eMIOS1 is disabled.*/
if (emios1_active_channels == 0) {
@ -176,6 +184,7 @@ void deactive_emios1_clock(ICUDriver *icup, PWMDriver *pwmp) {
}
}
}
#endif
/*===========================================================================*/
/* Driver interrupt handlers. */

12
os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.h
View File

@ -149,18 +149,22 @@
/* External declarations. */
/*===========================================================================*/
#if SPC5_HAS_EMIOS0
void reset_emios0_active_channels(void);
void reset_emios1_active_channels(void);
uint32_t get_emios0_active_channels(void);
uint32_t get_emios1_active_channels(void);
void increase_emios0_active_channels(void);
void decrease_emios0_active_channels(void);
void active_emios0_clock(ICUDriver *icup, PWMDriver *pwmp);
void deactive_emios0_clock(ICUDriver *icup, PWMDriver *pwmp);
#endif
#if SPC5_HAS_EMIOS1
void reset_emios1_active_channels(void);
uint32_t get_emios1_active_channels(void);
void increase_emios1_active_channels(void);
void decrease_emios1_active_channels(void);
void active_emios0_clock(ICUDriver *icup, PWMDriver *pwmp);
void active_emios1_clock(ICUDriver *icup, PWMDriver *pwmp);
void deactive_emios0_clock(ICUDriver *icup, PWMDriver *pwmp);
void deactive_emios1_clock(ICUDriver *icup, PWMDriver *pwmp);
#endif
#endif /* HAL_USE_ICU */