diff --git a/os/hal/ports/STM32/STM32F30x/adc_lld.c b/os/hal/ports/STM32/STM32F30x/adc_lld.c
index 4f84e9a7e..0f0838f12 100644
--- a/os/hal/ports/STM32/STM32F30x/adc_lld.c
+++ b/os/hal/ports/STM32/STM32F30x/adc_lld.c
@@ -463,7 +463,7 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
dmamode = adcp->dmamode;
ccr = grpp->ccr | (adcp->adcc->CCR & (ADC_CCR_CKMODE_MASK |
ADC_CCR_MDMA_MASK));
- cfgr = grpp->cfgr | ADC_CFGR_CONT | ADC_CFGR_DMAEN;
+ cfgr = grpp->cfgr | ADC_CFGR_DMAEN;
if (grpp->circular) {
dmamode |= STM32_DMA_CR_CIRC;
#if STM32_ADC_DUAL_MODE
diff --git a/os/hal/ports/STM32/STM32F30x/adc_lld.h b/os/hal/ports/STM32/STM32F30x/adc_lld.h
index 861034d7c..a720f02bb 100644
--- a/os/hal/ports/STM32/STM32F30x/adc_lld.h
+++ b/os/hal/ports/STM32/STM32F30x/adc_lld.h
@@ -405,8 +405,11 @@ typedef struct {
/* End of the mandatory fields.*/
/**
* @brief ADC CFGR register initialization data.
- * @note The bits DMAEN, DMACFG, OVRMOD, CONT are enforced internally
+ * @note The bits DMAEN and DMACFG are enforced internally
* to the driver, keep them to zero.
+ * @note The bits @p ADC_CFGR_CONT or @p ADC_CFGR_DISCEN must be
+ * specified in continuous more or if the buffer depth is
+ * greater than one.
*/
uint32_t cfgr;
/**
diff --git a/testhal/STM32/STM32F30x/ADC/debug/STM32F30x-ADC (OpenOCD, Flash and Run).launch b/testhal/STM32/STM32F30x/ADC/debug/STM32F30x-ADC (OpenOCD, Flash and Run).launch
new file mode 100644
index 000000000..a87c940bc
--- /dev/null
+++ b/testhal/STM32/STM32F30x/ADC/debug/STM32F30x-ADC (OpenOCD, Flash and Run).launch
@@ -0,0 +1,52 @@
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diff --git a/testhal/STM32/STM32F30x/ADC/main.c b/testhal/STM32/STM32F30x/ADC/main.c
index 9306b14d1..6795a5e2f 100644
--- a/testhal/STM32/STM32F30x/ADC/main.c
+++ b/testhal/STM32/STM32F30x/ADC/main.c
@@ -57,7 +57,7 @@ static const ADCConversionGroup adcgrpcfg1 = {
ADC_GRP1_NUM_CHANNELS,
NULL,
adcerrorcallback,
- 0, /* CFGR */
+ ADC_CFGR_CONT, /* CFGR */
ADC_TR(0, 4095), /* TR1 */
0, /* CCR */
{ /* SMPR[2] */
@@ -82,7 +82,7 @@ static const ADCConversionGroup adcgrpcfg2 = {
ADC_GRP2_NUM_CHANNELS,
adccallback,
adcerrorcallback,
- 0, /* CFGR */
+ ADC_CFGR_CONT, /* CFGR */
ADC_TR(0, 4095), /* TR1 */
ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */
{ /* SMPR[2] */
diff --git a/testhal/STM32/STM32F30x/ADC_DUAL/debug/STM32F30x-ADC_DUAL (OpenOCD, Flash and Run).launch b/testhal/STM32/STM32F30x/ADC_DUAL/debug/STM32F30x-ADC_DUAL (OpenOCD, Flash and Run).launch
new file mode 100644
index 000000000..ca8eacb3a
--- /dev/null
+++ b/testhal/STM32/STM32F30x/ADC_DUAL/debug/STM32F30x-ADC_DUAL (OpenOCD, Flash and Run).launch
@@ -0,0 +1,52 @@
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diff --git a/testhal/STM32/STM32F30x/ADC_DUAL/main.c b/testhal/STM32/STM32F30x/ADC_DUAL/main.c
index 849207de0..9dfcb73d0 100644
--- a/testhal/STM32/STM32F30x/ADC_DUAL/main.c
+++ b/testhal/STM32/STM32F30x/ADC_DUAL/main.c
@@ -57,7 +57,7 @@ static const ADCConversionGroup adcgrpcfg1 = {
ADC_GRP1_NUM_CHANNELS,
NULL,
adcerrorcallback,
- 0, /* CFGR */
+ ADC_CFGR_CONT, /* CFGR */
ADC_TR(0, 4095), /* TR1 */
ADC_CCR_DUAL(1), /* CCR */
{ /* SMPR[2] */
@@ -92,7 +92,7 @@ static const ADCConversionGroup adcgrpcfg2 = {
ADC_GRP2_NUM_CHANNELS,
adccallback,
adcerrorcallback,
- 0, /* CFGR */
+ ADC_CFGR_CONT, /* CFGR */
ADC_TR(0, 4095), /* TR1 */
ADC_CCR_DUAL(1) | ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */
{ /* SMPR[2] */