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Fixed some CH_IRQ_ remaining in STM32 drivers. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7872 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2015-04-07 19:37:46 +00:00
parent 7725e83be6
commit 2e05c03352
3 changed files with 42 additions and 42 deletions
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36
os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c
View File

@ -254,10 +254,10 @@ static void i2c_lld_serve_error_interrupt(I2CDriver *i2cp, uint32_t isr) {
*
* @notapi
*/
CH_IRQ_HANDLER(STM32_I2C1_GLOBAL_HANDLER) {
OSAL_IRQ_HANDLER(STM32_I2C1_GLOBAL_HANDLER) {
uint32_t isr = I2CD1.i2c->ISR;
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
/* Clearing IRQ bits.*/
I2CD1.i2c->ICR = isr;
@ -267,34 +267,34 @@ CH_IRQ_HANDLER(STM32_I2C1_GLOBAL_HANDLER) {
else if (isr & I2C_INT_MASK)
i2c_lld_serve_interrupt(&I2CD1, isr);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#elif defined(STM32_I2C1_EVENT_HANDLER) && defined(STM32_I2C1_ERROR_HANDLER)
CH_IRQ_HANDLER(STM32_I2C1_EVENT_HANDLER) {
OSAL_IRQ_HANDLER(STM32_I2C1_EVENT_HANDLER) {
uint32_t isr = I2CD1.i2c->ISR;
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
/* Clearing IRQ bits.*/
I2CD1.i2c->ICR = isr & I2C_INT_MASK;
i2c_lld_serve_interrupt(&I2CD1, isr);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
CH_IRQ_HANDLER(STM32_I2C1_ERROR_HANDLER) {
OSAL_IRQ_HANDLER(STM32_I2C1_ERROR_HANDLER) {
uint32_t isr = I2CD1.i2c->ISR;
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
/* Clearing IRQ bits.*/
I2CD1.i2c->ICR = isr & I2C_ERROR_MASK;
i2c_lld_serve_error_interrupt(&I2CD1, isr);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#else
@ -309,10 +309,10 @@ CH_IRQ_HANDLER(STM32_I2C1_ERROR_HANDLER) {
*
* @notapi
*/
CH_IRQ_HANDLER(STM32_I2C2_GLOBAL_HANDLER) {
OSAL_IRQ_HANDLER(STM32_I2C2_GLOBAL_HANDLER) {
uint32_t isr = I2CD2.i2c->ISR;
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
/* Clearing IRQ bits.*/
I2CD2.i2c->ICR = isr;
@ -322,34 +322,34 @@ CH_IRQ_HANDLER(STM32_I2C2_GLOBAL_HANDLER) {
else if (isr & I2C_INT_MASK)
i2c_lld_serve_interrupt(&I2CD2, isr);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#elif defined(STM32_I2C2_EVENT_HANDLER) && defined(STM32_I2C2_ERROR_HANDLER)
CH_IRQ_HANDLER(STM32_I2C2_EVENT_HANDLER) {
OSAL_IRQ_HANDLER(STM32_I2C2_EVENT_HANDLER) {
uint32_t isr = I2CD2.i2c->ISR;
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
/* Clearing IRQ bits.*/
I2CD2.i2c->ICR = isr & I2C_INT_MASK;
i2c_lld_serve_interrupt(&I2CD2, isr);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
CH_IRQ_HANDLER(STM32_I2C2_ERROR_HANDLER) {
OSAL_IRQ_HANDLER(STM32_I2C2_ERROR_HANDLER) {
uint32_t isr = I2CD2.i2c->ISR;
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
/* Clearing IRQ bits.*/
I2CD2.i2c->ICR = isr & I2C_ERROR_MASK;
i2c_lld_serve_error_interrupt(&I2CD2, isr);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#else

36
os/hal/ports/STM32/LLD/USARTv1/uart_lld.c
View File

@ -342,13 +342,13 @@ static void serve_usart_irq(UARTDriver *uartp) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_USART1_HANDLER) {
OSAL_IRQ_HANDLER(STM32_USART1_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
serve_usart_irq(&UARTD1);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_UART_USE_USART1 */
@ -361,13 +361,13 @@ CH_IRQ_HANDLER(STM32_USART1_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_USART2_HANDLER) {
OSAL_IRQ_HANDLER(STM32_USART2_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
serve_usart_irq(&UARTD2);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_UART_USE_USART2 */
@ -380,13 +380,13 @@ CH_IRQ_HANDLER(STM32_USART2_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_USART3_HANDLER) {
OSAL_IRQ_HANDLER(STM32_USART3_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
serve_usart_irq(&UARTD3);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_UART_USE_USART3 */
@ -399,13 +399,13 @@ CH_IRQ_HANDLER(STM32_USART3_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_UART4_HANDLER) {
OSAL_IRQ_HANDLER(STM32_UART4_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
serve_usart_irq(&UARTD4);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_UART_USE_UART4 */
@ -418,13 +418,13 @@ CH_IRQ_HANDLER(STM32_UART4_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_UART5_HANDLER) {
OSAL_IRQ_HANDLER(STM32_UART5_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
serve_usart_irq(&UARTD5);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_UART_USE_UART5 */
@ -437,13 +437,13 @@ CH_IRQ_HANDLER(STM32_UART5_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_USART6_HANDLER) {
OSAL_IRQ_HANDLER(STM32_USART6_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
serve_usart_irq(&UARTD6);
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_UART_USE_USART6 */

12
os/hal/ports/STM32/LLD/USBv1/usb_lld.c
View File

@ -267,11 +267,11 @@ static void usb_packet_write_from_queue(stm32_usb_descriptor_t *udp,
*
* @isr
*/
CH_IRQ_HANDLER(STM32_USB1_HP_HANDLER) {
OSAL_IRQ_HANDLER(STM32_USB1_HP_HANDLER) {
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_USB1_LP_NUMBER != STM32_USB1_HP_NUMBER */
@ -280,11 +280,11 @@ CH_IRQ_HANDLER(STM32_USB1_HP_HANDLER) {
*
* @isr
*/
CH_IRQ_HANDLER(STM32_USB1_LP_HANDLER) {
OSAL_IRQ_HANDLER(STM32_USB1_LP_HANDLER) {
uint32_t istr;
USBDriver *usbp = &USBD1;
CH_IRQ_PROLOGUE();
OSAL_IRQ_PROLOGUE();
istr = STM32_USB->ISTR;
@ -410,7 +410,7 @@ CH_IRQ_HANDLER(STM32_USB1_LP_HANDLER) {
istr = STM32_USB->ISTR;
}
CH_IRQ_EPILOGUE();
OSAL_IRQ_EPILOGUE();
}
#endif /* STM32_USB_USE_USB1 */