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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1486 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-01-01 15:29:17 +00:00
parent f8c40043e4
commit 307e9891e4
11 changed files with 247 additions and 226 deletions
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26
docs/reports/LPC2148-48-ARM.txt
View File

@ -5,7 +5,7 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
*** ChibiOS/RT test suite
***
*** Kernel: 1.3.5unstable
*** Kernel: 1.3.7unstable
*** Architecture: ARM7TDMI
*** GCC Version: 4.4.2
@ -89,51 +89,51 @@ Settings: CCLK=48, MAMCR=2, MAMTIM=3 (3 wait states)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 144427 msgs/S, 288854 ctxswc/S
--- Score : 144470 msgs/S, 288940 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 114644 msgs/S, 229288 ctxswc/S
--- Score : 114678 msgs/S, 229356 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 114644 msgs/S, 229288 ctxswc/S
--- Score : 114678 msgs/S, 229356 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 501240 ctxswc/S
--- Score : 501392 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 107671 threads/S
--- Score : 107703 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 150334 threads/S
--- Score : 150379 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedulation, 5 threads)
--- Score : 36494 reschedulations/S, 218964 ctxswc/S
--- Score : 36504 reschedulations/S, 219024 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 340828 reschedulations/S, 340828 ctxswc/S
--- Score : 340940 reschedulations/S, 340940 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 357104 bytes/S
--- Score : 357216 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 309452 timers/S
--- Score : 333278 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 622892 wait+signal/S
--- Score : 623080 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 380196 lock+unlock/S
--- Score : 380308 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)

24
docs/reports/STM32F103-72.txt
View File

@ -89,51 +89,51 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 221754 msgs/S, 443508 ctxswc/S
--- Score : 221749 msgs/S, 443498 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 185657 msgs/S, 371314 ctxswc/S
--- Score : 185652 msgs/S, 371304 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 185657 msgs/S, 371314 ctxswc/S
--- Score : 185652 msgs/S, 371304 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 696728 ctxswc/S
--- Score : 696712 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 173550 threads/S
--- Score : 173546 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 222446 threads/S
--- Score : 222440 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedulation, 5 threads)
--- Score : 56937 reschedulations/S, 341622 ctxswc/S
--- Score : 56935 reschedulations/S, 341610 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 505132 reschedulations/S, 505132 ctxswc/S
--- Score : 505120 reschedulations/S, 505120 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 474884 bytes/S
--- Score : 474876 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 647336 timers/S
--- Score : 647320 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 833180 wait+signal/S
--- Score : 833160 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 586604 lock+unlock/S
--- Score : 586588 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)

2
os/hal/platforms/AT91SAM7/serial_lld.c
View File

@ -266,7 +266,6 @@ void sd_lld_start(SerialDriver *sdp) {
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US0);
/* Enables associated interrupt vector.*/
AIC_EnableIT(AT91C_ID_US0);
return;
}
#endif
#if USE_SAM7_USART1
@ -275,7 +274,6 @@ void sd_lld_start(SerialDriver *sdp) {
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US1);
/* Enables associated interrupt vector.*/
AIC_EnableIT(AT91C_ID_US1);
return;
}
#endif
}

2
os/hal/platforms/AT91SAM7/serial_lld.h
View File

@ -78,7 +78,7 @@
/*===========================================================================*/
/**
* Serial Driver condition flags type.
* @brief Serial Driver condition flags type.
*/
typedef uint32_t sdflags_t;

35
os/hal/platforms/AVR/serial_lld.c
View File

@ -58,7 +58,7 @@ SerialDriver SD2;
/**
* @brief Driver default configuration.
*/
static const SerialDriverConfig default_config = {
static const SerialConfig default_config = {
UBRR(DEFAULT_USART_BITRATE),
(1 << UCSZ1) | (1 << UCSZ0)
};
@ -91,13 +91,13 @@ static void notify1(void) {
* @brief USART0 initialization.
* @param[in] config the architecture-dependent serial driver configuration
*/
static void usart0_init(const SerialDriverConfig *config) {
static void usart0_init(const SerialConfig *config) {
UBRR0L = config->brr;
UBRR0H = config->brr >> 8;
UBRR0L = config->sc_brr;
UBRR0H = config->sc_brr >> 8;
UCSR0A = 0;
UCSR0B = (1 << RXEN) | (1 << TXEN) | (1 << RXCIE);
UCSR0C = config->csrc;
UCSR0C = config->sc_csrc;
}
/**
@ -121,13 +121,13 @@ static void notify2(void) {
* @brief USART1 initialization.
* @param[in] config the architecture-dependent serial driver configuration
*/
static void usart1_init(const SerialDriverConfig *config) {
static void usart1_init(const SerialConfig *config) {
UBRR1L = config->brr;
UBRR1H = config->brr >> 8;
UBRR1L = config->sc_brr;
UBRR1H = config->sc_brr >> 8;
UCSR1A = 0;
UCSR1B = (1 << RXEN) | (1 << TXEN) | (1 << RXCIE);
UCSR1C = config->csrc;
UCSR1C = config->sc_csrc;
}
/**
@ -232,20 +232,19 @@ void sd_lld_init(void) {
* @brief Low level serial driver configuration and (re)start.
*
* @param[in] sdp pointer to a @p SerialDriver object
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*/
void sd_lld_start(SerialDriver *sdp, const SerialDriverConfig *config) {
void sd_lld_start(SerialDriver *sdp) {
if (config == NULL)
config = &default_config;
if (sdp->sd.config == NULL)
sdp->sd.config = &default_config;
#if USE_AVR_USART0
usart0_init(config);
if (&SD1 == sdp)
usart0_init(sdp->sd.config);
#endif
#if USE_AVR_USART1
usart1_init(config);
if (&SD2 == sdp)
usart1_init(sdp->sd.config);
#endif
}
@ -259,9 +258,11 @@ void sd_lld_start(SerialDriver *sdp, const SerialDriverConfig *config) {
void sd_lld_stop(SerialDriver *sdp) {
#if USE_AVR_USART0
if (&SD1 == sdp)
usart0_deinit();
#endif
#if USE_AVR_USART1
if (&SD2 == sdp)
usart1_deinit();
#endif
}

101
os/hal/platforms/AVR/serial_lld.h
View File

@ -37,16 +37,6 @@
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 32 bytes for both the transmission and receive buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 32
#endif
/**
* @brief Default bit rate.
* @details Configuration parameter, at startup the UARTs are configured at
@ -86,52 +76,67 @@
/*===========================================================================*/
/**
* Serial Driver condition flags type.
* @brief Serial Driver condition flags type.
*/
typedef uint8_t sdflags_t;
/**
* @brief @p SerialDriver specific data.
*/
struct _serial_driver_data {
/**
* Input queue, incoming data can be read from this input queue by
* using the queues APIs.
*/
InputQueue iqueue;
/**
* Output queue, outgoing data can be written to this output queue by
* using the queues APIs.
*/
OutputQueue oqueue;
/**
* Status Change @p EventSource. This event is generated when one or more
* condition flags change.
*/
EventSource sevent;
/**
* I/O driver status flags.
*/
sdflags_t flags;
/**
* Input circular buffer.
*/
uint8_t ib[SERIAL_BUFFERS_SIZE];
/**
* Output circular buffer.
*/
uint8_t ob[SERIAL_BUFFERS_SIZE];
};
/**
* @brief AVR Serial Driver configuration structure.
* @details An instance of this structure must be passed to @p sdStart()
* in order to configure and start a serial driver operations.
*/
typedef struct {
uint16_t brr;
uint8_t csrc;
} SerialDriverConfig;
/**
* @brief Initialization value for the BRR register.
*/
uint16_t sc_brr;
/**
* @brief Initialization value for the CSRC register.
*/
uint8_t sc_csrc;
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
*/
struct _serial_driver_data {
/**
* @brief Driver state.
*/
sdstate_t state;
/**
* @brief Current configuration data.
*/
const SerialConfig *config;
/**
* @brief Input queue, incoming data can be read from this input queue by
* using the queues APIs.
*/
InputQueue iqueue;
/**
* @brief Output queue, outgoing data can be written to this output queue by
* using the queues APIs.
*/
OutputQueue oqueue;
/**
* @brief Status Change @p EventSource. This event is generated when one or
* more condition flags change.
*/
EventSource sevent;
/**
* @brief I/O driver status flags.
*/
sdflags_t flags;
/**
* @brief Input circular buffer.
*/
uint8_t ib[SERIAL_BUFFERS_SIZE];
/**
* @brief Output circular buffer.
*/
uint8_t ob[SERIAL_BUFFERS_SIZE];
/* End of the mandatory fields.*/
};
/*===========================================================================*/
/* Driver macros. */
@ -159,7 +164,7 @@ extern SerialDriver SD2;
extern "C" {
#endif
void sd_lld_init(void);
void sd_lld_start(SerialDriver *sdp, const SerialDriverConfig *config);
void sd_lld_start(SerialDriver *sdp);
void sd_lld_stop(SerialDriver *sdp);
#ifdef __cplusplus
}

87
os/hal/platforms/LPC214x/serial_lld.c
View File

@ -48,7 +48,7 @@ SerialDriver SD2;
/*===========================================================================*/
/** @brief Driver default configuration.*/
static const SerialDriverConfig default_config = {
static const SerialConfig default_config = {
38400,
LCR_WL8 | LCR_STOP1 | LCR_NOPARITY,
FCR_TRIGGER0
@ -60,17 +60,18 @@ static const SerialDriverConfig default_config = {
/**
* @brief UART initialization.
* @param[in] u pointer to an UART I/O block
* @param[in] config the architecture-dependent serial driver configuration
*
* @param[in] sdp communication channel associated to the UART
*/
static void uart_init(UART *u, const SerialDriverConfig *config) {
static void uart_init(SerialDriver *sdp) {
UART *u = sdp->sd.uart;
uint32_t div = PCLK / (config->speed << 4);
u->UART_LCR = config->lcr | LCR_DLAB;
uint32_t div = PCLK / (sdp->sd.config->sc_speed << 4);
u->UART_LCR = sdp->sd.config->sc_lcr | LCR_DLAB;
u->UART_DLL = div;
u->UART_DLM = div >> 8;
u->UART_LCR = config->lcr;
u->UART_FCR = FCR_ENABLE | FCR_RXRESET | FCR_TXRESET | config->fcr;
u->UART_LCR = sdp->sd.config->sc_lcr;
u->UART_FCR = FCR_ENABLE | FCR_RXRESET | FCR_TXRESET | sdp->sd.config->sc_fcr;
u->UART_ACR = 0;
u->UART_FDR = 0x10;
u->UART_TER = TER_ENABLE;
@ -79,6 +80,7 @@ static void uart_init(UART *u, const SerialDriverConfig *config) {
/**
* @brief UART de-initialization.
*
* @param[in] u pointer to an UART I/O block
*/
static void uart_deinit(UART *u) {
@ -95,10 +97,11 @@ static void uart_deinit(UART *u) {
/**
* @brief Error handling routine.
* @param[in] err UART LSR register value
*
* @param[in] sdp communication channel associated to the UART
* @param[in] err UART LSR register value
*/
static void set_error(IOREG32 err, SerialDriver *sdp) {
static void set_error(SerialDriver *sdp, IOREG32 err) {
sdflags_t sts = 0;
if (err & LSR_OVERRUN)
@ -124,40 +127,44 @@ __attribute__((noinline))
* @note Tries hard to clear all the pending interrupt sources, we dont want to
* go through the whole ISR and have another interrupt soon after.
*/
static void serve_interrupt(UART *u, SerialDriver *sdp) {
static void serve_interrupt(SerialDriver *sdp) {
UART *u = sdp->sd.uart;
while (TRUE) {
int i;
switch (u->UART_IIR & IIR_SRC_MASK) {
case IIR_SRC_NONE:
return;
case IIR_SRC_ERROR:
set_error(u->UART_LSR, sdp);
set_error(sdp, u->UART_LSR);
break;
case IIR_SRC_TIMEOUT:
case IIR_SRC_RX:
chSysLockFromIsr();
if (chIQIsEmpty(&sdp->sd.iqueue))
chEvtBroadcastI(&sdp->bac.ievent);
chSysUnlockFromIsr();
while (u->UART_LSR & LSR_RBR_FULL) {
chSysLockFromIsr();
if (chIQPutI(&sdp->d2.iqueue, u->UART_RBR) < Q_OK)
if (chIQPutI(&sdp->sd.iqueue, u->UART_RBR) < Q_OK)
sdAddFlagsI(sdp, SD_OVERRUN_ERROR);
chSysUnlockFromIsr();
}
chSysLockFromIsr();
chEvtBroadcastI(&sdp->d1.ievent);
chSysUnlockFromIsr();
break;
case IIR_SRC_TX:
{
#if UART_FIFO_PRELOAD > 0
int i = UART_FIFO_PRELOAD;
i = UART_FIFO_PRELOAD;
do {
msg_t b;
chSysLockFromIsr();
msg_t b = chOQGetI(&sdp->d2.oqueue);
b = chOQGetI(&sdp->sd.oqueue);
chSysUnlockFromIsr();
if (b < Q_OK) {
u->UART_IER &= ~IER_THRE;
chSysLockFromIsr();
chEvtBroadcastI(&sdp->d1.oevent);
chEvtBroadcastI(&sdp->bac.oevent);
chSysUnlockFromIsr();
break;
}
@ -172,7 +179,7 @@ static void serve_interrupt(UART *u, SerialDriver *sdp) {
else
u->UART_THR = b;
#endif
}
break;
default:
(void) u->UART_THR;
(void) u->UART_RBR;
@ -181,17 +188,18 @@ static void serve_interrupt(UART *u, SerialDriver *sdp) {
}
#if UART_FIFO_PRELOAD > 0
static void preload(UART *u, SerialDriver *sdp) {
static void preload(SerialDriver *sdp) {
UART *u = sdp->sd.uart;
if (u->UART_LSR & LSR_THRE) {
int i = UART_FIFO_PRELOAD;
do {
chSysLockFromIsr();
msg_t b = chOQGetI(&sdp->d2.oqueue);
msg_t b = chOQGetI(&sdp->sd.oqueue);
chSysUnlockFromIsr();
if (b < Q_OK) {
chSysLockFromIsr();
chEvtBroadcastI(&sdp->d1.oevent);
chEvtBroadcastI(&sdp->bac.oevent);
chSysUnlockFromIsr();
return;
}
@ -206,7 +214,7 @@ static void preload(UART *u, SerialDriver *sdp) {
static void notify1(void) {
#if UART_FIFO_PRELOAD > 0
preload(U0Base, &SD1);
preload(&SD1);
#else
UART *u = U0Base;
@ -224,7 +232,7 @@ static void notify1(void) {
static void notify2(void) {
#if UART_FIFO_PRELOAD > 0
preload(U1Base, &SD2);
preload(&SD2);
#else
UART *u = U1Base;
@ -244,7 +252,7 @@ CH_IRQ_HANDLER(UART0IrqHandler) {
CH_IRQ_PROLOGUE();
serve_interrupt(U0Base, &SD1);
serve_interrupt(&SD1);
VICVectAddr = 0;
CH_IRQ_EPILOGUE();
@ -256,7 +264,7 @@ CH_IRQ_HANDLER(UART1IrqHandler) {
CH_IRQ_PROLOGUE();
serve_interrupt(U1Base, &SD2);
serve_interrupt(&SD2);
VICVectAddr = 0;
CH_IRQ_EPILOGUE();
@ -275,10 +283,12 @@ void sd_lld_init(void) {
#if USE_LPC214x_UART0
sdObjectInit(&SD1, NULL, notify1);
SD1.sd.uart = U0Base;
SetVICVector(UART0IrqHandler, LPC214x_UART1_PRIORITY, SOURCE_UART0);
#endif
#if USE_LPC214x_UART1
sdObjectInit(&SD2, NULL, notify2);
SD2.sd.uart = U1Base;
SetVICVector(UART1IrqHandler, LPC214x_UART2_PRIORITY, SOURCE_UART1);
#endif
}
@ -287,32 +297,28 @@ void sd_lld_init(void) {
* @brief Low level serial driver configuration and (re)start.
*
* @param[in] sdp pointer to a @p SerialDriver object
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*/
void sd_lld_start(SerialDriver *sdp, const SerialDriverConfig *config) {
void sd_lld_start(SerialDriver *sdp) {
if (config == NULL)
config = &default_config;
if (sdp->sd.config == NULL)
sdp->sd.config = &default_config;
if (sdp->sd.state == SD_STOP) {
#if USE_LPC214x_UART1
if (&SD1 == sdp) {
PCONP = (PCONP & PCALL) | PCUART0;
uart_init(U0Base, config);
VICIntEnable = INTMASK(SOURCE_UART0);
return;
}
#endif
#if USE_LPC214x_UART2
if (&SD2 == sdp) {
PCONP = (PCONP & PCALL) | PCUART1;
uart_init(U1Base, config);
VICIntEnable = INTMASK(SOURCE_UART1);
return;
}
#endif
}
uart_init(sdp);
}
/**
* @brief Low level serial driver stop.
@ -323,9 +329,10 @@ void sd_lld_start(SerialDriver *sdp, const SerialDriverConfig *config) {
*/
void sd_lld_stop(SerialDriver *sdp) {
if (sdp->sd.state == SD_READY) {
uart_deinit(sdp->sd.uart);
#if USE_LPC214x_UART1
if (&SD1 == sdp) {
uart_deinit(U0Base);
PCONP = (PCONP & PCALL) & ~PCUART0;
VICIntEnClear = INTMASK(SOURCE_UART0);
return;
@ -333,13 +340,13 @@ void sd_lld_stop(SerialDriver *sdp) {
#endif
#if USE_LPC214x_UART2
if (&SD2 == sdp) {
uart_deinit(U1Base);
PCONP = (PCONP & PCALL) & ~PCUART1;
VICIntEnClear = INTMASK(SOURCE_UART1);
return;
}
#endif
}
}
#endif /* CH_HAL_USE_SERIAL */

110
os/hal/platforms/LPC214x/serial_lld.h
View File

@ -37,16 +37,6 @@
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 128 bytes for both the transmission and receive buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 128
#endif
/**
* @brief FIFO preload parameter.
* @details Configuration parameter, this values defines how many bytes are
@ -104,53 +94,75 @@
/*===========================================================================*/
/**
* Serial Driver condition flags type.
* @brief Serial Driver condition flags type.
*/
typedef uint32_t sdflags_t;
/**
* @brief @p SerialDriver specific data.
*/
struct _serial_driver_data {
/**
* Input queue, incoming data can be read from this input queue by
* using the queues APIs.
*/
InputQueue iqueue;
/**
* Output queue, outgoing data can be written to this output queue by
* using the queues APIs.
*/
OutputQueue oqueue;
/**
* Status Change @p EventSource. This event is generated when one or more
* condition flags change.
*/
EventSource sevent;
/**
* I/O driver status flags.
*/
sdflags_t flags;
/**
* Input circular buffer.
*/
uint8_t ib[SERIAL_BUFFERS_SIZE];
/**
* Output circular buffer.
*/
uint8_t ob[SERIAL_BUFFERS_SIZE];
};
/**
* @brief LPC214x Serial Driver configuration structure.
* @details An instance of this structure must be passed to @p sdStart()
* in order to configure and start a serial driver operations.
*/
typedef struct {
uint32_t speed;
uint32_t lcr;
uint32_t fcr;
} SerialDriverConfig;
/**
* @brief Bit rate.
*/
uint32_t sc_speed;
/**
* @brief Initialization value for the LCR register.
*/
uint32_t sc_lcr;
/**
* @brief Initialization value for the FCR register.
*/
uint32_t sc_fcr;
} SerialConfig;
/**
* @brief @p SerialDriver specific data.
*/
struct _serial_driver_data {
/**
* @brief Driver state.
*/
sdstate_t state;
/**
* @brief Current configuration data.
*/
const SerialConfig *config;
/**
* @brief Input queue, incoming data can be read from this input queue by
* using the queues APIs.
*/
InputQueue iqueue;
/**
* @brief Output queue, outgoing data can be written to this output queue by
* using the queues APIs.
*/
OutputQueue oqueue;
/**
* @brief Status Change @p EventSource. This event is generated when one or
* more condition flags change.
*/
EventSource sevent;
/**
* @brief I/O driver status flags.
*/
sdflags_t flags;
/**
* @brief Input circular buffer.
*/
uint8_t ib[SERIAL_BUFFERS_SIZE];
/**
* @brief Output circular buffer.
*/
uint8_t ob[SERIAL_BUFFERS_SIZE];
/* End of the mandatory fields.*/
/**
* @brief Pointer to the USART registers block.
*/
UART *uart;
};
/*===========================================================================*/
/* Driver macros. */
@ -172,7 +184,7 @@ extern SerialDriver SD2;
extern "C" {
#endif
void sd_lld_init(void);
void sd_lld_start(SerialDriver *sdp, const SerialDriverConfig *config);
void sd_lld_start(SerialDriver *sdp);
void sd_lld_stop(SerialDriver *sdp);
#ifdef __cplusplus
}

3
os/hal/platforms/STM32/serial_lld.c
View File

@ -264,21 +264,18 @@ void sd_lld_start(SerialDriver *sdp) {
if (&SD1 == sdp) {
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
NVICEnableVector(USART1_IRQn, STM32_USART1_PRIORITY);
return;
}
#endif
#if USE_STM32_USART2
if (&SD2 == sdp) {
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
NVICEnableVector(USART2_IRQn, STM32_USART2_PRIORITY);
return;
}
#endif
#if USE_STM32_USART3
if (&SD3 == sdp) {
RCC->APB1ENR |= RCC_APB1ENR_USART3EN;
NVICEnableVector(USART3_IRQn, STM32_USART3_PRIORITY);
return;
}
#endif
}

6
os/hal/platforms/STM32/serial_lld.h
View File

@ -43,7 +43,7 @@
* @note The default is @p FALSE.
*/
#if !defined(USE_STM32_USART1) || defined(__DOXYGEN__)
#define USE_STM32_USART1 FALSE
#define USE_STM32_USART1 TRUE
#endif
/**
@ -61,7 +61,7 @@
* @note The default is @p FALSE.
*/
#if !defined(USE_STM32_USART3) || defined(__DOXYGEN__)
#define USE_STM32_USART3 FALSE
#define USE_STM32_USART3 TRUE
#endif
/**
@ -97,7 +97,7 @@
/*===========================================================================*/
/**
* Serial Driver condition flags type.
* @brief Serial Driver condition flags type.
*/
typedef uint32_t sdflags_t;

5
readme.txt
View File

@ -9,10 +9,11 @@
- FIX: Fixed section separators comments into the HAL-related files. Now all
the files should use the same style.
- NEW: Improved HAL configuration file.
- NEW: Readability improvements to the channels code.
- NEW: Serial driver model improvements, added states management and checks,
added a new SD_NOISE_ERROR error event.
- NEW: Readability improvements to the channels code.
- NEW: Improvements and optimizations to the STM32 serial driver.
- NEW: Improvements and optimizations in the various serial driver
implementations.
- Documentation fixes and improvements.
*** 1.3.6 ***