diff --git a/testhal/ATSAMA5D2/UART/debug/SAMA5D2-UART (DDRAM).launch b/testhal/ATSAMA5D2/UART/debug/SAMA5D2-UART (DDRAM).launch new file mode 100644 index 000000000..4cfd21840 --- /dev/null +++ b/testhal/ATSAMA5D2/UART/debug/SAMA5D2-UART (DDRAM).launch @@ -0,0 +1,58 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/ATSAMA5D2/UART/main.c b/testhal/ATSAMA5D2/UART/main.c index 12bf9b55d..8cd5aa714 100644 --- a/testhal/ATSAMA5D2/UART/main.c +++ b/testhal/ATSAMA5D2/UART/main.c @@ -114,9 +114,9 @@ static UARTConfig uart_cfg_1 = { rxerr, NULL, 0, - 38400, - 0, - US_MR_CHRL_8_BIT | US_MR_PAR_NO + 38400, /* Baud rate */ + 0, /* CR register */ + US_MR_CHRL_8_BIT | US_MR_PAR_NO /* MR register */ }; /* @@ -136,7 +136,8 @@ int main(void) { chSysInit(); /* - * Activates the flexcom uart driver 0, PB28(RX) and PB29(RX) are routed to FLEXCOM0. + * Activates the flexcom uart driver 0. + * PB28 and PB29 are routed to FLEXCOM0. */ uartStart(&FUARTD0, &uart_cfg_1); @@ -150,16 +151,15 @@ int main(void) { */ while (true) { if (!palReadPad(PIOB, PIOB_USER_PB)) { - /* - * Starts both a transmission and a receive operations, both will be - * handled entirely in background. - */ + /* + * Starts both a transmission and a receive operations, both will be + * handled entirely in background. + */ uartStopReceive(&FUARTD0); uartStopSend(&FUARTD0); uartStartReceive(&FUARTD0, BUFFER, buffer); uartStartSend(&FUARTD0, BUFFER+1, message); } - chThdSleepMilliseconds(500); } } diff --git a/testhal/ATSAMA5D2/UART/readme.txt b/testhal/ATSAMA5D2/UART/readme.txt index cc6e568f6..65cd69a56 100644 --- a/testhal/ATSAMA5D2/UART/readme.txt +++ b/testhal/ATSAMA5D2/UART/readme.txt @@ -8,6 +8,8 @@ The demo targets a generic ARM Cortex-A5 device without HAL support. ** The Demo ** +Pressing user button, Uart sends and receives packets in loopback. + ** Build Procedure ** ** Notes **