From 3719f651a94ddd9683fb1120104abb6ffc96a2aa Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sun, 29 Sep 2019 16:11:03 +0000
Subject: [PATCH] Enabled I2C on G4.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13050 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
---
 .../RT-STM32G474RE-NUCLEO64/cfg/halconf.h     |  4 ++--
 .../RT-STM32G474RE-NUCLEO64/cfg/mcuconf.h     | 22 +++++++++++++++++++
 os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h    |  5 +++++
 .../conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl    | 22 +++++++++++++++++++
 4 files changed, 51 insertions(+), 2 deletions(-)

diff --git a/demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/halconf.h b/demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/halconf.h
index b05b25144..a3abe97ab 100644
--- a/demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/halconf.h
+++ b/demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/halconf.h
@@ -65,7 +65,7 @@
  * @brief   Enables the DAC subsystem.
  */
 #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                         TRUE
+#define HAL_USE_DAC                         FALSE
 #endif
 
 /**
@@ -86,7 +86,7 @@
  * @brief   Enables the I2C subsystem.
  */
 #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                         FALSE
+#define HAL_USE_I2C                         TRUE
 #endif
 
 /**
diff --git a/demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/mcuconf.h b/demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/mcuconf.h
index 228f4a7f5..9898824bf 100644
--- a/demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/mcuconf.h
+++ b/demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/mcuconf.h
@@ -162,6 +162,28 @@
 /*
  * I2C driver system settings.
  */
+#define STM32_I2C_USE_I2C1                  FALSE
+#define STM32_I2C_USE_I2C2                  FALSE
+#define STM32_I2C_USE_I2C3                  FALSE
+#define STM32_I2C_USE_I2C4                  FALSE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID_ANY
+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID_ANY
+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID_ANY
+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID_ANY
+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID_ANY
+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID_ANY
+#define STM32_I2C_I2C4_RX_DMA_STREAM        STM32_DMA_STREAM_ID_ANY
+#define STM32_I2C_I2C4_TX_DMA_STREAM        STM32_DMA_STREAM_ID_ANY
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C3_IRQ_PRIORITY         5
+#define STM32_I2C_I2C4_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_I2C3_DMA_PRIORITY         3
+#define STM32_I2C_I2C4_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
 
 /*
  * ICU driver system settings.
diff --git a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h b/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h
index 34075c026..b1004e793 100644
--- a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h
+++ b/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.h
@@ -279,6 +279,9 @@
 #error "I2C4 DMA streams not defined"
 #endif
 
+/* Devices without DMAMUX require an additional check.*/
+#if !STM32_DMA_SUPPORTS_DMAMUX
+
 /* Check on the validity of the assigned DMA channels.*/
 #if STM32_I2C_USE_I2C1 &&                                                   \
     !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_RX_DMA_STREAM,                    \
@@ -328,6 +331,8 @@
 #error "invalid DMA stream associated to I2C4 TX"
 #endif
 
+#endif /* !STM32_DMA_SUPPORTS_DMAMUX */
+
 #endif /* STM32_ADVANCED_DMA */
 
 #if !defined(STM32_DMA_REQUIRED)
diff --git a/tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl
index 6f3d83faf..ecc8dfc98 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl
@@ -173,6 +173,28 @@
 /*
  * I2C driver system settings.
  */
+#define STM32_I2C_USE_I2C1                  ${doc.STM32_I2C_USE_I2C1!"FALSE"}
+#define STM32_I2C_USE_I2C2                  ${doc.STM32_I2C_USE_I2C2!"FALSE"}
+#define STM32_I2C_USE_I2C3                  ${doc.STM32_I2C_USE_I2C3!"FALSE"}
+#define STM32_I2C_USE_I2C4                  ${doc.STM32_I2C_USE_I2C4!"FALSE"}
+#define STM32_I2C_BUSY_TIMEOUT              ${doc.STM32_I2C_BUSY_TIMEOUT!"50"}
+#define STM32_I2C_I2C1_RX_DMA_STREAM        ${doc.STM32_I2C_I2C1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_I2C_I2C1_TX_DMA_STREAM        ${doc.STM32_I2C_I2C1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_I2C_I2C2_RX_DMA_STREAM        ${doc.STM32_I2C_I2C2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_I2C_I2C2_TX_DMA_STREAM        ${doc.STM32_I2C_I2C2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_I2C_I2C3_RX_DMA_STREAM        ${doc.STM32_I2C_I2C3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_I2C_I2C3_TX_DMA_STREAM        ${doc.STM32_I2C_I2C3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_I2C_I2C4_RX_DMA_STREAM        ${doc.STM32_I2C_I2C4_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_I2C_I2C4_TX_DMA_STREAM        ${doc.STM32_I2C_I2C4_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_I2C_I2C1_IRQ_PRIORITY         ${doc.STM32_I2C_I2C1_IRQ_PRIORITY!"5"}
+#define STM32_I2C_I2C2_IRQ_PRIORITY         ${doc.STM32_I2C_I2C2_IRQ_PRIORITY!"5"}
+#define STM32_I2C_I2C3_IRQ_PRIORITY         ${doc.STM32_I2C_I2C3_IRQ_PRIORITY!"5"}
+#define STM32_I2C_I2C4_IRQ_PRIORITY         ${doc.STM32_I2C_I2C4_IRQ_PRIORITY!"5"}
+#define STM32_I2C_I2C1_DMA_PRIORITY         ${doc.STM32_I2C_I2C1_DMA_PRIORITY!"3"}
+#define STM32_I2C_I2C2_DMA_PRIORITY         ${doc.STM32_I2C_I2C2_DMA_PRIORITY!"3"}
+#define STM32_I2C_I2C3_DMA_PRIORITY         ${doc.STM32_I2C_I2C3_DMA_PRIORITY!"3"}
+#define STM32_I2C_I2C4_DMA_PRIORITY         ${doc.STM32_I2C_I2C4_DMA_PRIORITY!"3"}
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
 
 /*
  * ICU driver system settings.