git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3492 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/ports/GCC/ARMCMx/chcore_v7m.h

@@ -66,6 +66,13 @@
 #endif
 #endif
 
+/**
+ * @brief   NVIC VTOR initialization expression.
+ */
+#if !defined(CORTEX_VTOR_INIT) || defined(__DOXYGEN__)
+#define CORTEX_VTOR_INIT              0x00000000
+#endif
+
 /*===========================================================================*/
 /* Port derived parameters.                                                  */
 /*===========================================================================*/
@@ -192,6 +199,7 @@ struct intctx {
  * @brief   Port-related initialization code.
  */
 #define port_init() {                                                       \
+  SCB_VTOR = CORTEX_VTOR_INIT;                                              \
   SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0);                            \
   NVICSetSystemHandlerPriority(HANDLER_SVCALL,                              \
     CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL));                          \

os/ports/IAR/ARMCMx/chcore_v7m.h

@@ -66,6 +66,13 @@
 #endif
 #endif
 
+/**
+ * @brief   NVIC VTOR initialization expression.
+ */
+#if !defined(CORTEX_VTOR_INIT) || defined(__DOXYGEN__)
+#define CORTEX_VTOR_INIT              0x00000000
+#endif
+
 /*===========================================================================*/
 /* Port derived parameters.                                                  */
 /*===========================================================================*/
@@ -192,6 +199,7 @@ struct intctx {
  * @brief   Port-related initialization code.
  */
 #define port_init() {                                                       \
+  SCB_VTOR = CORTEX_VTOR_INIT;                                              \
   SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0);                            \
   NVICSetSystemHandlerPriority(HANDLER_SVCALL,                              \
     CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL));                          \

os/ports/RVCT/ARMCMx/chcore_v7m.h

@@ -66,6 +66,13 @@
 #endif
 #endif
 
+/**
+ * @brief   NVIC VTOR initialization expression.
+ */
+#if !defined(CORTEX_VTOR_INIT) || defined(__DOXYGEN__)
+#define CORTEX_VTOR_INIT              0x00000000
+#endif
+
 /*===========================================================================*/
 /* Port derived parameters.                                                  */
 /*===========================================================================*/
@@ -192,6 +199,7 @@ struct intctx {
  * @brief   Port-related initialization code.
  */
 #define port_init() {                                                       \
+  SCB_VTOR = CORTEX_VTOR_INIT;                                              \
   SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0);                            \
   NVICSetSystemHandlerPriority(HANDLER_SVCALL,                              \
     CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL));                          \

readme.txt

@@ -84,6 +84,9 @@
   (backported to 2.2.8).
 - FIX: Fixed broken TIM8 support in STM32 PWM driver (bug 3418620).
 - FIX: Fixed halconf.h file corrupted in some STM32 demos (bug 3418626).
+- NEW: Added initialization of the NVIC VTOR register to all Cortex-Mx (v7M)
+  ports. Also added a port option CORTEX_VTOR_INIT to enforce a different
+  default value into the register.
 - NEW: Removed the warning about the "untested M4 platform", now it is
   tested and officially supported.
 - NEW: Reorganized the STM32F1xx hal_lld_xxx.h files in order to distribute