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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16415 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2023-11-18 18:00:02 +00:00
parent 5e357462f9
commit 379e0169e8
4 changed files with 28 additions and 20 deletions
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4
os/hal/ports/STM32/LLD/GPDMAv1/stm32_gpdma.c
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@ -602,9 +602,9 @@ void gpdmaServeInterrupt(const stm32_gpdma_channel_t *dmachp) {
uint32_t csr;
uint32_t selfindex = (uint32_t)(dmachp - __stm32_gpdma_channels);
csr = dmachp->channel->CSR;
csr = dmachp->channel->CSR ;
dmachp->channel->CFCR = csr;
if (csr & dmachp->channel->CCR) {
if ((csr & dmachp->channel->CCR & STM32_GPDMA_CSR_ALL_FLAGS) != 0U) {
if (gpdma.channels[selfindex].func) {
gpdma.channels[selfindex].func(gpdma.channels[selfindex].param, csr);
}

2
os/hal/ports/STM32/LLD/GPDMAv1/stm32_gpdma.h
View File

@ -62,7 +62,7 @@
#define STM32_GPDMA_CSR_IDLEF DMA_CSR_IDLEF
#define STM32_GPDMA_CSR_ERRORS (DMA_CSR_TOF | DMA_CSR_USEF | \
DMA_CSR_ULEF | DMA_CSR_DTEF)
#define STM32_GPDMA_CSR_ALL (DMA_CSR_TOF | DMA_CSR_SUSPF | \
#define STM32_GPDMA_CSR_ALL_FLAGS (DMA_CSR_TOF | DMA_CSR_SUSPF | \
DMA_CSR_USEF | DMA_CSR_ULEF | \
DMA_CSR_DTEF | DMA_CSR_HTF | \
DMA_CSR_TCF)

26
os/hal/ports/STM32/LLD/SPIv4/hal_spi_v2_lld.c
View File

@ -672,7 +672,15 @@ msg_t spi_lld_start(SPIDriver *spip) {
}
}
/* Configuration-specific GPDMA setup.*/
#if SPI_SUPPORTS_CIRCULAR
dmalbar = (uint32_t)&__gpdma_base__;
osalDbgAssert((dmalbar &0xFFFFU) == 0U, "unaligned LBAR");
#else
dmalbar = 0U;
#endif
/* RX GPDMA setup.*/
dmaccr = STM32_GPDMA_CCR_PRIO((uint32_t)spip->dprio) |
STM32_GPDMA_CCR_LAP_MEM |
STM32_GPDMA_CCR_TOIE |
@ -680,19 +688,19 @@ msg_t spi_lld_start(SPIDriver *spip) {
STM32_GPDMA_CCR_ULEIE |
STM32_GPDMA_CCR_DTEIE |
STM32_GPDMA_CCR_TCIE;
#if SPI_SUPPORTS_CIRCULAR
dmalbar = (uint32_t)&__gpdma_base__;
osalDbgAssert((dmalbar &0xFFFFU) == 0U, "unaligned LBAR");
if (spip->config->circular) {
dmaccr |= STM32_GPDMA_CCR_HTIE;
}
#else
dmalbar = 0U;
#endif
gpdmaChannelInit(spip->dmarx, dmalbar, dmaccr);
gpdmaChannelSetSource(spip->dmarx, &spip->spi->RXDR);
/* TX GPDMA setup.*/
dmaccr = STM32_GPDMA_CCR_PRIO((uint32_t)spip->dprio) |
STM32_GPDMA_CCR_LAP_MEM |
STM32_GPDMA_CCR_TOIE |
STM32_GPDMA_CCR_USEIE |
STM32_GPDMA_CCR_ULEIE |
STM32_GPDMA_CCR_DTEIE;
gpdmaChannelInit(spip->dmatx, dmalbar, dmaccr);
gpdmaChannelSetDestination(spip->dmatx, &spip->spi->TXDR);

16
os/hal/ports/STM32/STM32H5xx/stm32_isr.h
View File

@ -77,14 +77,14 @@
/*
* DMA unit.
*/
#define STM32_GPDMA1_CH0_HANDLER VectorA8
#define STM32_GPDMA1_CH1_HANDLER VectorAC
#define STM32_GPDMA1_CH2_HANDLER VectorB0
#define STM32_GPDMA1_CH3_HANDLER VectorB4
#define STM32_GPDMA1_CH4_HANDLER VectorB8
#define STM32_GPDMA1_CH5_HANDLER VectorBC
#define STM32_GPDMA1_CH6_HANDLER VectorC0
#define STM32_GPDMA1_CH7_HANDLER VectorC4
#define STM32_GPDMA1_CH0_HANDLER VectorAC
#define STM32_GPDMA1_CH1_HANDLER VectorB0
#define STM32_GPDMA1_CH2_HANDLER VectorB4
#define STM32_GPDMA1_CH3_HANDLER VectorB8
#define STM32_GPDMA1_CH4_HANDLER VectorBC
#define STM32_GPDMA1_CH5_HANDLER VectorC0
#define STM32_GPDMA1_CH6_HANDLER VectorC4
#define STM32_GPDMA1_CH7_HANDLER VectorC8
#define STM32_GPDMA2_CH0_HANDLER Vector1A8
#define STM32_GPDMA2_CH1_HANDLER Vector1AC
#define STM32_GPDMA2_CH2_HANDLER Vector1B0