mirror of https://github.com/rusefi/ChibiOS.git
ARM7/9 port update, other improvements.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2389 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
parent
d519ffda2a
commit
3ae01fd47b
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@ -47,7 +47,7 @@ CHIBIOS = ../..
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include $(CHIBIOS)/boards/OLIMEX_SAM7_P256/board.mk
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include $(CHIBIOS)/boards/OLIMEX_SAM7_P256/board.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
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include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/ext/fatfs/fatfs.mk
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include $(CHIBIOS)/ext/fatfs/fatfs.mk
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@ -91,13 +91,13 @@ TCPPSRC =
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# List ASM source files here
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# List ASM source files here
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ASMSRC = $(PORTASM) \
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ASMSRC = $(PORTASM) \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(FATFSINC) \
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$(FATFSINC) \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7
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#
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#
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# Project, sources and paths
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# Project, sources and paths
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@ -47,7 +47,7 @@ CHIBIOS = ../..
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include $(CHIBIOS)/boards/OLIMEX_SAM7_P256/board.mk
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include $(CHIBIOS)/boards/OLIMEX_SAM7_P256/board.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
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include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/test/test.mk
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@ -87,12 +87,12 @@ TCPPSRC =
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# List ASM source files here
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# List ASM source files here
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ASMSRC = $(PORTASM) \
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ASMSRC = $(PORTASM) \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7
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#
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#
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# Project, sources and paths
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# Project, sources and paths
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@ -47,7 +47,7 @@ CHIBIOS = ../..
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include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
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include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
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include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/ext/fatfs/fatfs.mk
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include $(CHIBIOS)/ext/fatfs/fatfs.mk
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@ -91,13 +91,13 @@ TCPPSRC =
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# List ASM source files here
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# List ASM source files here
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ASMSRC = $(PORTASM) \
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ASMSRC = $(PORTASM) \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(FATFSINC) \
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$(FATFSINC) \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7
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#
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#
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# Project, sources and paths
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# Project, sources and paths
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@ -47,7 +47,7 @@ CHIBIOS = ../..
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include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
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include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
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include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/test/test.mk
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@ -87,12 +87,12 @@ TCPPSRC =
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# List ASM source files here
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# List ASM source files here
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ASMSRC = $(PORTASM) \
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ASMSRC = $(PORTASM) \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7
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#
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#
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# Project, sources and paths
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# Project, sources and paths
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@ -47,7 +47,7 @@ CHIBIOS = ../..
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include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
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include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
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include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/test/test.mk
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include ./lwip/lwip.mk
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include ./lwip/lwip.mk
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@ -96,12 +96,12 @@ TCPPSRC =
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# List ASM source files here
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# List ASM source files here
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ASMSRC = $(PORTASM) \
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ASMSRC = $(PORTASM) \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) $(LWINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) $(LWINC) \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7 \
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7 \
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./lwip
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./lwip
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#
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#
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@ -47,7 +47,7 @@ CHIBIOS = ../..
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include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
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include $(CHIBIOS)/boards/OLIMEX_SAM7_EX256/board.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/platforms/AT91SAM7/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
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include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/test/test.mk
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@ -100,12 +100,12 @@ TCPPSRC =
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# List ASM source files here
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# List ASM source files here
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ASMSRC = $(PORTASM) \
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ASMSRC = $(PORTASM) \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7/vectors.s
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7/vectors.s
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/ports/GCC/ARM7/AT91SAM7 \
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$(CHIBIOS)/os/ports/GCC/ARM/AT91SAM7 \
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./web $(CHIBIOS)/ext/uip-1.0/uip $(CHIBIOS)/ext/uip-1.0/apps/webserver
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./web $(CHIBIOS)/ext/uip-1.0/uip $(CHIBIOS)/ext/uip-1.0/apps/webserver
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#
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#
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@ -47,7 +47,7 @@ CHIBIOS = ../..
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include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk
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include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk
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include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk
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include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
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include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/os/kernel/kernel.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/test/test.mk
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include $(CHIBIOS)/ext/fatfs/fatfs.mk
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include $(CHIBIOS)/ext/fatfs/fatfs.mk
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@ -92,13 +92,13 @@ TCPPSRC =
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# List ASM source files here
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# List ASM source files here
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ASMSRC = $(PORTASM) \
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ASMSRC = $(PORTASM) \
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$(CHIBIOS)/os/ports/GCC/ARM7/LPC214x/vectors.s
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$(CHIBIOS)/os/ports/GCC/ARM/LPC214x/vectors.s
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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$(HALINC) $(PLATFORMINC) $(BOARDINC) \
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||||||
$(FATFSINC) \
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$(FATFSINC) \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/various \
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$(CHIBIOS)/os/ports/GCC/ARM7/LPC214x
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$(CHIBIOS)/os/ports/GCC/ARM/LPC214x
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#
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#
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# Project, sources and paths
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# Project, sources and paths
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||||||
|
|
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@ -47,7 +47,7 @@ CHIBIOS = ../..
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include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk
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include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk
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include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk
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include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
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include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
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||||||
include $(CHIBIOS)/os/kernel/kernel.mk
|
include $(CHIBIOS)/os/kernel/kernel.mk
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||||||
include $(CHIBIOS)/test/test.mk
|
include $(CHIBIOS)/test/test.mk
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||||||
|
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|
@ -87,12 +87,12 @@ TCPPSRC =
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||||||
|
|
||||||
# List ASM source files here
|
# List ASM source files here
|
||||||
ASMSRC = $(PORTASM) \
|
ASMSRC = $(PORTASM) \
|
||||||
$(CHIBIOS)/os/ports/GCC/ARM7/LPC214x/vectors.s
|
$(CHIBIOS)/os/ports/GCC/ARM/LPC214x/vectors.s
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||||||
|
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INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
|
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
|
||||||
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
|
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
|
||||||
$(CHIBIOS)/os/various \
|
$(CHIBIOS)/os/various \
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||||||
$(CHIBIOS)/os/ports/GCC/ARM7/LPC214x
|
$(CHIBIOS)/os/ports/GCC/ARM/LPC214x
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||||||
|
|
||||||
#
|
#
|
||||||
# Project, sources and paths
|
# Project, sources and paths
|
||||||
|
|
|
@ -47,7 +47,7 @@ CHIBIOS = ../..
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||||||
include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk
|
include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk
|
||||||
include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk
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include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk
|
||||||
include $(CHIBIOS)/os/hal/hal.mk
|
include $(CHIBIOS)/os/hal/hal.mk
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||||||
include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
|
include $(CHIBIOS)/os/ports/GCC/ARM/port.mk
|
||||||
include $(CHIBIOS)/os/kernel/kernel.mk
|
include $(CHIBIOS)/os/kernel/kernel.mk
|
||||||
include $(CHIBIOS)/test/test.mk
|
include $(CHIBIOS)/test/test.mk
|
||||||
|
|
||||||
|
@ -87,12 +87,12 @@ TCPPSRC =
|
||||||
|
|
||||||
# List ASM source files here
|
# List ASM source files here
|
||||||
ASMSRC = $(PORTASM) \
|
ASMSRC = $(PORTASM) \
|
||||||
$(CHIBIOS)/os/ports/GCC/ARM7/LPC214x/vectors.s
|
$(CHIBIOS)/os/ports/GCC/ARM/LPC214x/vectors.s
|
||||||
|
|
||||||
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
|
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
|
||||||
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
|
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
|
||||||
$(CHIBIOS)/os/various \
|
$(CHIBIOS)/os/various \
|
||||||
$(CHIBIOS)/os/ports/GCC/ARM7/LPC214x
|
$(CHIBIOS)/os/ports/GCC/ARM/LPC214x
|
||||||
|
|
||||||
#
|
#
|
||||||
# Project, sources and paths
|
# Project, sources and paths
|
||||||
|
|
|
@ -616,13 +616,15 @@ INPUT = ../docs/src \
|
||||||
../os/kernel/src \
|
../os/kernel/src \
|
||||||
../os/kernel/templates \
|
../os/kernel/templates \
|
||||||
../os/ports \
|
../os/ports \
|
||||||
../os/ports/GCC/AVR \
|
|
||||||
../os/ports/GCC/ARM \
|
../os/ports/GCC/ARM \
|
||||||
|
../os/ports/GCC/ARM\LPC214x \
|
||||||
|
../os/ports/GCC/ARM\AT91SAM7 \
|
||||||
../os/ports/GCC/ARMCMx \
|
../os/ports/GCC/ARMCMx \
|
||||||
../os/ports/GCC/ARMCMx/STM32 \
|
../os/ports/GCC/ARMCMx/STM32 \
|
||||||
../os/ports/GCC/ARMCMx/LPC11xx \
|
../os/ports/GCC/ARMCMx/LPC11xx \
|
||||||
../os/ports/GCC/ARMCMx/LPC13xx \
|
../os/ports/GCC/ARMCMx/LPC13xx \
|
||||||
../os/ports/GCC/PPC \
|
../os/ports/GCC/PPC \
|
||||||
|
../os/ports/GCC/AVR \
|
||||||
../os/ports/GCC/MSP430 \
|
../os/ports/GCC/MSP430 \
|
||||||
../os/ports/cosmic/STM8 \
|
../os/ports/cosmic/STM8 \
|
||||||
../os/ports/RC/STM8 \
|
../os/ports/RC/STM8 \
|
||||||
|
@ -640,7 +642,8 @@ INPUT = ../docs/src \
|
||||||
../os/hal/platforms/MSP430/platform.dox \
|
../os/hal/platforms/MSP430/platform.dox \
|
||||||
../os/hal/platforms/SPC56x/platform.dox \
|
../os/hal/platforms/SPC56x/platform.dox \
|
||||||
../os/hal/platforms/STM32/platform.dox \
|
../os/hal/platforms/STM32/platform.dox \
|
||||||
../os/hal/platforms/STM8/platform.dox \
|
../os/hal/platforms/STM8L/platform.dox \
|
||||||
|
../os/hal/platforms/STM8S/platform.dox \
|
||||||
../os/various \
|
../os/various \
|
||||||
../test \
|
../test \
|
||||||
../ext/ext.dox
|
../ext/ext.dox
|
||||||
|
|
|
@ -26,6 +26,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "ch.h"
|
#include "ch.h"
|
||||||
|
#include "hal.h"
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief VIC Initialization.
|
* @brief VIC Initialization.
|
||||||
|
|
|
@ -45,7 +45,6 @@
|
||||||
* @details The STM8L PAL driver uses the GPIO peripherals.
|
* @details The STM8L PAL driver uses the GPIO peripherals.
|
||||||
*
|
*
|
||||||
* @section stm8l_pal_1 Supported HW resources
|
* @section stm8l_pal_1 Supported HW resources
|
||||||
* - AFIO.
|
|
||||||
* - GPIOA.
|
* - GPIOA.
|
||||||
* - GPIOB.
|
* - GPIOB.
|
||||||
* - GPIOC.
|
* - GPIOC.
|
||||||
|
|
|
@ -18,7 +18,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @defgroup STM8S STM8Sx Drivers
|
* @defgroup STM8S STM8S Drivers
|
||||||
* @details This section describes all the supported drivers on the STM8S
|
* @details This section describes all the supported drivers on the STM8S
|
||||||
* platform and the implementation details of the single drivers.
|
* platform and the implementation details of the single drivers.
|
||||||
*
|
*
|
||||||
|
@ -44,7 +44,6 @@
|
||||||
* @details The STM8S PAL driver uses the GPIO peripherals.
|
* @details The STM8S PAL driver uses the GPIO peripherals.
|
||||||
*
|
*
|
||||||
* @section stm8s_pal_1 Supported HW resources
|
* @section stm8s_pal_1 Supported HW resources
|
||||||
* - AFIO.
|
|
||||||
* - GPIOA.
|
* - GPIOA.
|
||||||
* - GPIOB.
|
* - GPIOB.
|
||||||
* - GPIOC.
|
* - GPIOC.
|
||||||
|
|
|
@ -0,0 +1,55 @@
|
||||||
|
/*
|
||||||
|
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
|
||||||
|
|
||||||
|
This file is part of ChibiOS/RT.
|
||||||
|
|
||||||
|
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file ARM/AT91SAM7/armparams.h
|
||||||
|
* @brief ARM7 AT91SAM7 Specific Parameters.
|
||||||
|
*
|
||||||
|
* @defgroup ARM_AT91SAM7 AT91SAM7 Specific Parameters
|
||||||
|
* @ingroup ARM_SPECIFIC
|
||||||
|
* @details This file contains the ARM specific parameters for the
|
||||||
|
* AT91SAM7 platform.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _ARMPARAMS_H_
|
||||||
|
#define _ARMPARAMS_H_
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ARM core model.
|
||||||
|
*/
|
||||||
|
#define ARM_CORE ARM_CORE_ARM7TDMI
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief AT91SAM7-specific wait for interrupt.
|
||||||
|
* @details This implementation writes 1 into the PMC_SCDR register.
|
||||||
|
*/
|
||||||
|
#if !defined(port_wait_for_interrupt) || defined(__DOXYGEN__)
|
||||||
|
#if ENABLE_WFI_IDLE || defined(__DOXYGEN__)
|
||||||
|
#define port_wait_for_interrupt() { \
|
||||||
|
(*((volatile uint32_t *)0xFFFFFC04)) = 1; \
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
#define port_wait_for_interrupt()
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* _ARMPARAMS_H_ */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -17,6 +17,29 @@
|
||||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file ARM/AT91SAM7/vectors.s
|
||||||
|
* @brief Interrupt vectors for the AT91SAM7 family.
|
||||||
|
*
|
||||||
|
* @defgroup ARM_AT91SAM7_VECTORS AT91SAM7 Interrupt Vectors
|
||||||
|
* @ingroup ARM_SPECIFIC
|
||||||
|
* @details Interrupt vectors for the AT91SAM7 family.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(__DOXYGEN__)
|
||||||
|
/**
|
||||||
|
* @brief Unhandled exceptions handler.
|
||||||
|
* @details Any undefined exception vector points to this function by default.
|
||||||
|
* This function simply stops the system into an infinite loop.
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
void _unhandled_exception(void) {}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(__DOXYGEN__)
|
||||||
|
|
||||||
.section vectors
|
.section vectors
|
||||||
.code 32
|
.code 32
|
||||||
.balign 4
|
.balign 4
|
||||||
|
@ -71,4 +94,10 @@ AbortHandler:
|
||||||
.weak FiqHandler
|
.weak FiqHandler
|
||||||
FiqHandler:
|
FiqHandler:
|
||||||
|
|
||||||
.loop: b .loop
|
.global _unhandled_exception
|
||||||
|
_unhandled_exception:
|
||||||
|
b _unhandled_exception
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
|
@ -0,0 +1,55 @@
|
||||||
|
/*
|
||||||
|
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
|
||||||
|
|
||||||
|
This file is part of ChibiOS/RT.
|
||||||
|
|
||||||
|
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file ARM/LPC214x/armparams.h
|
||||||
|
* @brief ARM7 LPC214x Specific Parameters.
|
||||||
|
*
|
||||||
|
* @defgroup ARM_LPC214x LPC214x Specific Parameters
|
||||||
|
* @ingroup ARM_SPECIFIC
|
||||||
|
* @details This file contains the ARM specific parameters for the
|
||||||
|
* LPC214x platform.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _ARMPARAMS_H_
|
||||||
|
#define _ARMPARAMS_H_
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ARM core model.
|
||||||
|
*/
|
||||||
|
#define ARM_CORE ARM_CORE_ARM7TDMI
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LPC214x-specific wait for interrupt code.
|
||||||
|
* @details This implementation writes 1 into the PCON register.
|
||||||
|
*/
|
||||||
|
#if !defined(port_wait_for_interrupt) || defined(__DOXYGEN__)
|
||||||
|
#if ENABLE_WFI_IDLE || defined(__DOXYGEN__)
|
||||||
|
#define port_wait_for_interrupt() { \
|
||||||
|
(*((volatile uint32_t *)0xE01FC0C0)) = 1; \
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
#define port_wait_for_interrupt()
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* _ARMPARAMS_H_ */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -17,6 +17,29 @@
|
||||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file ARM/LPC214x/vectors.s
|
||||||
|
* @brief Interrupt vectors for the LPC214x family.
|
||||||
|
*
|
||||||
|
* @defgroup ARM_LPC214x_VECTORS LPC214x Interrupt Vectors
|
||||||
|
* @ingroup ARM_SPECIFIC
|
||||||
|
* @details Interrupt vectors for the LPC214x family.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(__DOXYGEN__)
|
||||||
|
/**
|
||||||
|
* @brief Unhandled exceptions handler.
|
||||||
|
* @details Any undefined exception vector points to this function by default.
|
||||||
|
* This function simply stops the system into an infinite loop.
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
void _unhandled_exception(void) {}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(__DOXYGEN__)
|
||||||
|
|
||||||
.section vectors
|
.section vectors
|
||||||
.code 32
|
.code 32
|
||||||
.balign 4
|
.balign 4
|
||||||
|
@ -68,4 +91,10 @@ AbortHandler:
|
||||||
.weak FiqHandler
|
.weak FiqHandler
|
||||||
FiqHandler:
|
FiqHandler:
|
||||||
|
|
||||||
.loop: b .loop
|
.global _unhandled_exception
|
||||||
|
_unhandled_exception:
|
||||||
|
b _unhandled_exception
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
|
@ -18,10 +18,10 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @file ARM7/chcore.c
|
* @file ARM/chcore.c
|
||||||
* @brief ARM7 architecture port code.
|
* @brief ARM7/9 architecture port code.
|
||||||
*
|
*
|
||||||
* @addtogroup ARM7_CORE
|
* @addtogroup ARM_CORE
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
|
@ -18,38 +18,106 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @file ARM7/chcore.h
|
* @file ARM/chcore.h
|
||||||
* @brief ARM7 architecture port macros and structures.
|
* @brief ARM7/9 architecture port macros and structures.
|
||||||
*
|
*
|
||||||
* @addtogroup ARM7_CORE
|
* @addtogroup ARM_CORE
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _CHCORE_H_
|
#ifndef _CHCORE_H_
|
||||||
#define _CHCORE_H_
|
#define _CHCORE_H_
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Port constants. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/* Core variants identifiers.*/
|
||||||
|
#define ARM_CORE_ARM7TDMI 7 /**< ARM77TDMI core identifier. */
|
||||||
|
#define ARM_CORE_ARM9 9 /**< ARM9 core identifier. */
|
||||||
|
|
||||||
|
/* Inclusion of the ARM implementation specific parameters.*/
|
||||||
|
#include "armparams.h"
|
||||||
|
|
||||||
|
/* ARM core check, only ARM7TDMI and ARM9 supported right now.*/
|
||||||
|
#if (ARM_CORE == ARM_CORE_ARM7TDMI) || (ARM_CORE == ARM_CORE_ARM9)
|
||||||
|
#else
|
||||||
|
#error "unknown or unsupported ARM core"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Port statically derived parameters. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Port macros. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Port configurable parameters. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief If enabled allows the idle thread to enter a low power mode.
|
* @brief If enabled allows the idle thread to enter a low power mode.
|
||||||
*/
|
*/
|
||||||
#ifndef ENABLE_WFI_IDLE
|
#ifndef ARM_ENABLE_WFI_IDLE
|
||||||
#define ENABLE_WFI_IDLE 0
|
#define ARM_ENABLE_WFI_IDLE FALSE
|
||||||
#endif
|
#endif
|
||||||
#include <wfi.h>
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Port exported info. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Macro defining the ARM7 architecture.
|
* @brief Macro defining a generic ARM architecture.
|
||||||
*/
|
*/
|
||||||
#define CH_ARCHITECTURE_ARM7
|
#define CH_ARCHITECTURE_ARM
|
||||||
|
|
||||||
|
#if defined(__DOXYGEN__)
|
||||||
|
/**
|
||||||
|
* @brief Macro defining the specific ARM architecture.
|
||||||
|
* @note This macro is for documentation only, the real name changes
|
||||||
|
* depending on the selected architecture, the possible names are:
|
||||||
|
* - CH_ARCHITECTURE_ARM7TDMI.
|
||||||
|
* - CH_ARCHITECTURE_ARM9.
|
||||||
|
* .
|
||||||
|
*/
|
||||||
|
#define CH_ARCHITECTURE_ARMx
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Name of the implemented architecture.
|
* @brief Name of the implemented architecture.
|
||||||
|
* @note The value is for documentation only, the real value changes
|
||||||
|
* depending on the selected architecture, the possible values are:
|
||||||
|
* - "ARM7".
|
||||||
|
* - "ARM9".
|
||||||
|
* .
|
||||||
*/
|
*/
|
||||||
#define CH_ARCHITECTURE_NAME "ARM"
|
#define CH_ARCHITECTURE_NAME "ARMx"
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Name of the architecture variant (optional).
|
* @brief Name of the architecture variant (optional).
|
||||||
|
* @note The value is for documentation only, the real value changes
|
||||||
|
* depending on the selected architecture, the possible values are:
|
||||||
|
* - "ARM7TDMI"
|
||||||
|
* - "ARM9"
|
||||||
|
* .
|
||||||
*/
|
*/
|
||||||
#define CH_CORE_VARIANT_NAME "ARM7TDMI"
|
#define CH_CORE_VARIANT_NAME "ARMxy"
|
||||||
|
|
||||||
|
#elif ARM_CORE == ARM_CORE_ARM7TDMI
|
||||||
|
#define CH_ARCHITECTURE_ARM7TDMI
|
||||||
|
#define CH_ARCHITECTURE_NAME "ARM7"
|
||||||
|
#define CH_CORE_VARIANT_NAME "ARM7TDMI"
|
||||||
|
|
||||||
|
#elif ARM_MODEL == ARM_VARIANT_ARM9
|
||||||
|
#define CH_ARCHITECTURE_ARM9
|
||||||
|
#define CH_ARCHITECTURE_NAME "ARM9"
|
||||||
|
#define CH_CORE_VARIANT_NAME "ARM9"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Port implementation part (common). */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief 32 bits stack and memory alignment enforcement.
|
* @brief 32 bits stack and memory alignment enforcement.
|
||||||
|
|
|
@ -18,10 +18,10 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @file ARM7/chcoreasm.s
|
* @file ARM/chcoreasm.s
|
||||||
* @brief ARM7 architecture port low level code.
|
* @brief ARM7/9 architecture port low level code.
|
||||||
*
|
*
|
||||||
* @addtogroup ARM7_CORE
|
* @addtogroup ARM_CORE
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
|
@ -18,10 +18,10 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @file ARM7/chtypes.h
|
* @file ARM/chtypes.h
|
||||||
* @brief ARM7 architecture port system types.
|
* @brief ARM7/9 architecture port system types.
|
||||||
*
|
*
|
||||||
* @addtogroup ARM7_CORE
|
* @addtogroup ARM_CORE
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
|
@ -18,10 +18,10 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @file ARM7/crt0.s
|
* @file ARM/crt0.s
|
||||||
* @brief Generic ARM7 startup file for ChibiOS/RT.
|
* @brief Generic ARM7/9 startup file for ChibiOS/RT.
|
||||||
*
|
*
|
||||||
* @addtogroup ARM7_CORE
|
* @addtogroup ARM_CORE
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
|
@ -18,41 +18,42 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @defgroup ARM7 ARM7
|
* @defgroup ARM ARM7/9
|
||||||
* @details ARM7 port for the GCC compiler.
|
* @details ARM7/9 port for the GCC compiler.
|
||||||
*
|
*
|
||||||
* @section ARM7_INTRO Introduction
|
* @section ARM_INTRO Introduction
|
||||||
* The ARM7-GCC port supports the ARM7 code in the following three modes:
|
* The ARM7/9-GCC port supports the ARM7/9 core in the following three modes:
|
||||||
* - Pure ARM mode, this is the preferred mode for code speed. The code size
|
* - <b>Pure ARM</b> mode, this is the preferred mode for code speed, this
|
||||||
* is larger however. This mode is enabled when all the modules are compiled
|
* mode increases the memory footprint however. This mode is enabled when
|
||||||
* in ARM mode, see the Makefiles.
|
* all the modules are compiled in ARM mode, see the Makefiles.
|
||||||
* - Pure THUMB mode, this is the preferred mode for code size. In this mode
|
* - <b>Pure THUMB</b> mode, this is the preferred mode for code size. In
|
||||||
* the execution speed is slower than the ARM mode. This mode is enabled
|
* this mode the execution speed is slower than the ARM mode. This mode
|
||||||
* when all the modules are compiled in THUMB mode, see the Makefiles.
|
* is enabled when all the modules are compiled in THUMB mode, see the
|
||||||
* - Interworking mode, when in the system there are ARM modules mixed with
|
* Makefiles.
|
||||||
* THUMB modules then the interworking compiler option is enabled. This is
|
* - <b>Interworking</b> mode, when in the system there are ARM modules mixed
|
||||||
* usually the slowest mode and the code size is not as good as in pure
|
* with THUMB modules then the interworking compiler option is enabled.
|
||||||
* THUMB mode.
|
* This is usually the slowest mode and the code size is not as good as
|
||||||
|
* in pure THUMB mode.
|
||||||
* .
|
* .
|
||||||
* @section ARM7_STATES Mapping of the System States in the ARM7 port
|
* @section ARM_STATES Mapping of the System States in the ARM7/9 port
|
||||||
* The ChibiOS/RT logical system states are mapped as follow in the ARM7
|
* The ChibiOS/RT logical system states are mapped as follow in the ARM7/9
|
||||||
* port:
|
* port:
|
||||||
* - <b>Init</b>. This state is represented by the startup code and the
|
* - <b>Init</b>. This state is represented by the startup code and the
|
||||||
* initialization code before @p chSysInit() is executed. It has not a
|
* initialization code before @p chSysInit() is executed. It has not a
|
||||||
* special hardware state associated, usually the CPU goes through several
|
* special hardware state associated, usually the CPU goes through several
|
||||||
* hardware states during the startup phase.
|
* hardware states during the startup phase.
|
||||||
* - <b>Normal</b>. This is the state the system has after executing
|
* - <b>Normal</b>. This is the state the system has after executing
|
||||||
* @p chSysInit(). In this state the ARM7TDMI has both the interrupt sources
|
* @p chSysInit(). In this state the CPU has both the interrupt sources
|
||||||
* (IRQ and FIQ) enabled and is running in ARM System Mode.
|
* (IRQ and FIQ) enabled and is running in ARM System Mode.
|
||||||
* - <b>Suspended</b>. In this state the IRQ sources are disabled but the FIQ
|
* - <b>Suspended</b>. In this state the IRQ sources are disabled but the FIQ
|
||||||
* sources are served, the core is running in ARM System Mode.
|
* sources are served, the core is running in ARM System Mode.
|
||||||
* - <b>Disabled</b>. Both the IRQ and FIQ sources are disabled, the core is
|
* - <b>Disabled</b>. Both the IRQ and FIQ sources are disabled, the core is
|
||||||
* running in ARM System Mode.
|
* running in ARM System Mode.
|
||||||
* - <b>Sleep</b>. The ARM7 code does not have any built-in low power mode but
|
* - <b>Sleep</b>. ARM7/9 cores does not have an explicit built-in low power
|
||||||
* there are clock stop modes implemented in custom ways by the various
|
* mode but there are clock stop modes implemented in custom ways by the
|
||||||
* silicon vendors. This state is implemented in each microcontroller support
|
* various silicon vendors. This state is implemented in each microcontroller
|
||||||
* code in a different way, the core is running (or freezed...) in ARM
|
* support code in a different way, the core is running (or freezed...)
|
||||||
* System Mode.
|
* in ARM System Mode.
|
||||||
* - <b>S-Locked</b>. IRQ sources disabled, core running in ARM System Mode.
|
* - <b>S-Locked</b>. IRQ sources disabled, core running in ARM System Mode.
|
||||||
* - <b>I-Locked</b>. IRQ sources disabled, core running in ARM IRQ Mode. Note
|
* - <b>I-Locked</b>. IRQ sources disabled, core running in ARM IRQ Mode. Note
|
||||||
* that this state is not different from the SRI state in this port, the
|
* that this state is not different from the SRI state in this port, the
|
||||||
|
@ -63,14 +64,14 @@
|
||||||
* - <b>Serving Fast Interrupt</b>. IRQ and FIQ sources disabled, core running
|
* - <b>Serving Fast Interrupt</b>. IRQ and FIQ sources disabled, core running
|
||||||
* in ARM FIQ Mode.
|
* in ARM FIQ Mode.
|
||||||
* - <b>Serving Non-Maskable Interrupt</b>. There are no asynchronous NMI
|
* - <b>Serving Non-Maskable Interrupt</b>. There are no asynchronous NMI
|
||||||
* sources in ARM7 architecture but synchronous SVC, ABT and UND exception
|
* sources in ARM7/9 architecture but synchronous SVC, ABT and UND exception
|
||||||
* handlers can be seen as belonging to this category.
|
* handlers can be seen as belonging to this category.
|
||||||
* - <b>Halted</b>. Implemented as an infinite loop after disabling both IRQ
|
* - <b>Halted</b>. Implemented as an infinite loop after disabling both IRQ
|
||||||
* and FIQ sources. The ARM state is whatever the processor was running when
|
* and FIQ sources. The ARM state is whatever the processor was running when
|
||||||
* @p chSysHalt() was invoked.
|
* @p chSysHalt() was invoked.
|
||||||
* .
|
* .
|
||||||
* @section ARM7_NOTES The ARM7 port notes
|
* @section ARM_NOTES The ARM7/9 port notes
|
||||||
* The ARM7 port is organized as follow:
|
* The ARM7/9 port is organized as follow:
|
||||||
* - The @p main() function is invoked in system mode.
|
* - The @p main() function is invoked in system mode.
|
||||||
* - Each thread has a private user/system stack, the system has a single
|
* - Each thread has a private user/system stack, the system has a single
|
||||||
* interrupt stack where all the interrupts are processed.
|
* interrupt stack where all the interrupts are processed.
|
||||||
|
@ -83,18 +84,18 @@
|
||||||
* - Other modes are not preempt-able because the system code assumes the
|
* - Other modes are not preempt-able because the system code assumes the
|
||||||
* threads running in system mode. When running in supervisor or other
|
* threads running in system mode. When running in supervisor or other
|
||||||
* modes make sure that the interrupts are globally disabled.
|
* modes make sure that the interrupts are globally disabled.
|
||||||
* - Interrupts nesting is not supported in the ARM7 code because their
|
* - Interrupts nesting is not supported in the ARM7/9 port because their
|
||||||
* implementation, even if possible, is not really efficient in this
|
* implementation, even if possible, is not really efficient in this
|
||||||
* architecture.
|
* architecture.
|
||||||
* - FIQ sources can preempt the kernel (by design) so it is not possible to
|
* - FIQ sources can preempt the kernel (by design) so it is not possible to
|
||||||
* invoke the kernel APIs from inside a FIQ handler. FIQ handlers are not
|
* invoke the kernel APIs from inside a FIQ handler. FIQ handlers are not
|
||||||
* affected by the kernel activity so there is not added jitter.
|
* affected by the kernel activity so there is not added jitter.
|
||||||
* .
|
* .
|
||||||
* @section ARM7_IH ARM7 Interrupt Handlers
|
* @section ARM_IH ARM7/9 Interrupt Handlers
|
||||||
* ARM7 Interrupt handlers do not save function-saved registers so you need to
|
* In the current implementation the ARM7/9 Interrupt handlers do not save
|
||||||
* make sure your code saves them or does not use them (this happens
|
* function-saved registers so you need to make sure your code saves them
|
||||||
* because in the ARM7 port all the OS interrupt handler functions are declared
|
* or does not use them (this happens because in the ARM7/9 port all the
|
||||||
* naked).<br>
|
* OS interrupt handler functions are declared naked).<br>
|
||||||
* Function-trashed registers (R0-R3, R12, LR, SR) are saved/restored by the
|
* Function-trashed registers (R0-R3, R12, LR, SR) are saved/restored by the
|
||||||
* system macros @p CH_IRQ_PROLOGUE() and @p CH_IRQ_EPILOGUE().<br>
|
* system macros @p CH_IRQ_PROLOGUE() and @p CH_IRQ_EPILOGUE().<br>
|
||||||
* The easiest way to ensure this is to just invoke a normal function from
|
* The easiest way to ensure this is to just invoke a normal function from
|
||||||
|
@ -136,8 +137,8 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @defgroup ARM7_CONF Configuration Options
|
* @defgroup ARM_CONF Configuration Options
|
||||||
* @details ARM7 specific configuration options. The ARM7 port allows some
|
* @details ARM7/9 specific configuration options. The ARM7/9 port allows some
|
||||||
* architecture-specific configurations settings that can be overridden by
|
* architecture-specific configurations settings that can be overridden by
|
||||||
* redefining them in @p chconf.h. Usually there is no need to change the
|
* redefining them in @p chconf.h. Usually there is no need to change the
|
||||||
* default values.
|
* default values.
|
||||||
|
@ -151,28 +152,33 @@
|
||||||
* The default for this value is @p 0x10 which should be a safe value, you
|
* The default for this value is @p 0x10 which should be a safe value, you
|
||||||
* can trim this down by defining the macro externally. This would save
|
* can trim this down by defining the macro externally. This would save
|
||||||
* some valuable RAM space for each thread present in the system.<br>
|
* some valuable RAM space for each thread present in the system.<br>
|
||||||
* The default value is set into <b>./os/ports/GCC/ARM7/chcore.h</b>.
|
* The default value is set into <b>./os/ports/GCC/ARM/chcore.h</b>.
|
||||||
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
|
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
|
||||||
* thread. Usually there is no need to change this value unless inserting
|
* thread. Usually there is no need to change this value unless inserting
|
||||||
* code in the IDLE thread hook macro.
|
* code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
|
||||||
|
* - @p ARM_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
|
||||||
|
* an implementation-specific clock stop mode from within the idle loop.
|
||||||
|
* This option is defaulted to FALSE because it can create problems with
|
||||||
|
* some debuggers. Setting this option to TRUE reduces the system power
|
||||||
|
* requirements.
|
||||||
* .
|
* .
|
||||||
* @ingroup ARM7
|
* @ingroup ARM
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @defgroup ARM7_CORE Core Port Implementation
|
* @defgroup ARM_CORE Core Port Implementation
|
||||||
* @details ARM7 specific port code, structures and macros.
|
* @details ARM7/9 specific port code, structures and macros.
|
||||||
*
|
*
|
||||||
* @ingroup ARM7
|
* @ingroup ARM
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @defgroup ARM7_STARTUP Startup Support
|
* @defgroup ARM_STARTUP Startup Support
|
||||||
* @details ARM7 startup code support. ChibiOS/RT provides its own generic
|
* @details ARM7/9 startup code support. ChibiOS/RT provides its own generic
|
||||||
* startup file for the ARM7 port. Of course it is not mandatory to use it
|
* startup file for the ARM7/9 port. Of course it is not mandatory to use it
|
||||||
* but care should be taken about the startup phase details.
|
* but care should be taken about the startup phase details.
|
||||||
*
|
*
|
||||||
* @section ARM7_STARTUP_1 Startup Process
|
* @section ARM_STARTUP_1 Startup Process
|
||||||
* The startup process, as implemented, is the following:
|
* The startup process, as implemented, is the following:
|
||||||
* -# The stacks are initialized by assigning them the sizes defined in the
|
* -# The stacks are initialized by assigning them the sizes defined in the
|
||||||
* linker script (usually named @p ch.ld). Stack areas are allocated from
|
* linker script (usually named @p ch.ld). Stack areas are allocated from
|
||||||
|
@ -191,7 +197,7 @@
|
||||||
* -# Should the @p main() function return a branch is performed to the weak
|
* -# Should the @p main() function return a branch is performed to the weak
|
||||||
* symbol MainExitHandler. The default code is an endless empty loop.
|
* symbol MainExitHandler. The default code is an endless empty loop.
|
||||||
* .
|
* .
|
||||||
* @section ARM7_STARTUP_2 Expected linker symbols
|
* @section ARM_STARTUP_2 Expected linker symbols
|
||||||
* The startup code starts at the symbol @p ResetHandler and expects the
|
* The startup code starts at the symbol @p ResetHandler and expects the
|
||||||
* following symbols to be defined in the linker script:
|
* following symbols to be defined in the linker script:
|
||||||
* - @p __ram_end__ RAM end location +1.
|
* - @p __ram_end__ RAM end location +1.
|
||||||
|
@ -208,6 +214,12 @@
|
||||||
* - @p _bss_start BSS start location.
|
* - @p _bss_start BSS start location.
|
||||||
* - @p _bss_end BSS end location +1.
|
* - @p _bss_end BSS end location +1.
|
||||||
* .
|
* .
|
||||||
* @ingroup ARM7
|
* @ingroup ARM
|
||||||
* @file ARM7/crt0.s Startup code.
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @defgroup ARM_SPECIFIC Specific Implementations
|
||||||
|
* @details Platform-specific port code.
|
||||||
|
*
|
||||||
|
* @ingroup ARM
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
* @brief ARM Cortex-M0 LPC11xx Specific Parameters.
|
* @brief ARM Cortex-M0 LPC11xx Specific Parameters.
|
||||||
*
|
*
|
||||||
* @defgroup ARMCMx_LPC11xx LPC11xx Specific Parameters
|
* @defgroup ARMCMx_LPC11xx LPC11xx Specific Parameters
|
||||||
* @ingroup ARMCMx
|
* @ingroup ARMCMx_SPECIFIC
|
||||||
* @details This file contains the Cortex-M0 specific parameters for the
|
* @details This file contains the Cortex-M0 specific parameters for the
|
||||||
* LPC11xx platform.
|
* LPC11xx platform.
|
||||||
* @{
|
* @{
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
* @brief ARM Cortex-M3 LPC13xx Specific Parameters.
|
* @brief ARM Cortex-M3 LPC13xx Specific Parameters.
|
||||||
*
|
*
|
||||||
* @defgroup ARMCMx_LPC13xx LPC13xx Specific Parameters
|
* @defgroup ARMCMx_LPC13xx LPC13xx Specific Parameters
|
||||||
* @ingroup ARMCMx
|
* @ingroup ARMCMx_SPECIFIC
|
||||||
* @details This file contains the Cortex-M3 specific parameters for the
|
* @details This file contains the Cortex-M3 specific parameters for the
|
||||||
* LPC13xx platform.
|
* LPC13xx platform.
|
||||||
* @{
|
* @{
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
* @brief ARM Cortex-M3 parameters for the STM32.
|
* @brief ARM Cortex-M3 parameters for the STM32.
|
||||||
*
|
*
|
||||||
* @defgroup ARMCMx_STM32 STM32 Specific Parameters
|
* @defgroup ARMCMx_STM32 STM32 Specific Parameters
|
||||||
* @ingroup ARMCMx
|
* @ingroup ARMCMx_SPECIFIC
|
||||||
* @details This file contains the Cortex-M3 specific parameters for the
|
* @details This file contains the Cortex-M3 specific parameters for the
|
||||||
* STM32 platform.
|
* STM32 platform.
|
||||||
* @{
|
* @{
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
* @brief Interrupt vectors for the STM32 family.
|
* @brief Interrupt vectors for the STM32 family.
|
||||||
*
|
*
|
||||||
* @defgroup ARMCMx_STM32_VECTORS STM32 Interrupt Vectors
|
* @defgroup ARMCMx_STM32_VECTORS STM32 Interrupt Vectors
|
||||||
* @ingroup ARMCMx
|
* @ingroup ARMCMx_SPECIFIC
|
||||||
* @details Interrupt vectors for the STM32 family.
|
* @details Interrupt vectors for the STM32 family.
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -34,10 +34,10 @@
|
||||||
/* Port constants. */
|
/* Port constants. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
|
#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
|
||||||
#define CORTEX_M1 1 /**< @brief Cortex-M1 variant. */
|
#define CORTEX_M1 1 /**< @brief Cortex-M1 variant. */
|
||||||
#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
|
#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
|
||||||
#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */
|
#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */
|
||||||
|
|
||||||
/* Inclusion of the Cortex-Mx implementation specific parameters.*/
|
/* Inclusion of the Cortex-Mx implementation specific parameters.*/
|
||||||
#include "cmparams.h"
|
#include "cmparams.h"
|
||||||
|
@ -57,26 +57,26 @@
|
||||||
/**
|
/**
|
||||||
* @brief Total priority levels.
|
* @brief Total priority levels.
|
||||||
*/
|
*/
|
||||||
#define CORTEX_PRIORITY_LEVELS (1 << CORTEX_PRIORITY_BITS)
|
#define CORTEX_PRIORITY_LEVELS (1 << CORTEX_PRIORITY_BITS)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Minimum priority level.
|
* @brief Minimum priority level.
|
||||||
* @details This minimum priority level is calculated from the number of
|
* @details This minimum priority level is calculated from the number of
|
||||||
* priority bits supported by the specific Cortex-Mx implementation.
|
* priority bits supported by the specific Cortex-Mx implementation.
|
||||||
*/
|
*/
|
||||||
#define CORTEX_MINIMUM_PRIORITY (CORTEX_PRIORITY_LEVELS - 1)
|
#define CORTEX_MINIMUM_PRIORITY (CORTEX_PRIORITY_LEVELS - 1)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Maximum priority level.
|
* @brief Maximum priority level.
|
||||||
* @details The maximum allowed priority level is always zero.
|
* @details The maximum allowed priority level is always zero.
|
||||||
*/
|
*/
|
||||||
#define CORTEX_MAXIMUM_PRIORITY 0
|
#define CORTEX_MAXIMUM_PRIORITY 0
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Disabled value for BASEPRI register.
|
* @brief Disabled value for BASEPRI register.
|
||||||
* @note ARMv7-M architecture only.
|
* @note ARMv7-M architecture only.
|
||||||
*/
|
*/
|
||||||
#define CORTEX_BASEPRI_DISABLED 0
|
#define CORTEX_BASEPRI_DISABLED 0
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Port macros. */
|
/* Port macros. */
|
||||||
|
@ -91,7 +91,8 @@
|
||||||
/**
|
/**
|
||||||
* @brief Priority level to priority mask conversion macro.
|
* @brief Priority level to priority mask conversion macro.
|
||||||
*/
|
*/
|
||||||
#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
|
#define CORTEX_PRIORITY_MASK(n) \
|
||||||
|
((n) << (8 - CORTEX_PRIORITY_BITS))
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Port configurable parameters. */
|
/* Port configurable parameters. */
|
||||||
|
@ -101,7 +102,7 @@
|
||||||
* @brief Enables the use of the WFI instruction in the idle thread loop.
|
* @brief Enables the use of the WFI instruction in the idle thread loop.
|
||||||
*/
|
*/
|
||||||
#ifndef CORTEX_ENABLE_WFI_IDLE
|
#ifndef CORTEX_ENABLE_WFI_IDLE
|
||||||
#define CORTEX_ENABLE_WFI_IDLE FALSE
|
#define CORTEX_ENABLE_WFI_IDLE FALSE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -110,7 +111,7 @@
|
||||||
* level in the middle of the numeric priorities range.
|
* level in the middle of the numeric priorities range.
|
||||||
*/
|
*/
|
||||||
#ifndef CORTEX_PRIORITY_SYSTICK
|
#ifndef CORTEX_PRIORITY_SYSTICK
|
||||||
#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
|
#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
|
||||||
#else
|
#else
|
||||||
/* If it is externally redefined then better perform a validity check on it.*/
|
/* If it is externally redefined then better perform a validity check on it.*/
|
||||||
#if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
|
#if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
|
||||||
|
@ -128,7 +129,7 @@
|
||||||
* to user in the ARMv6-M port.
|
* to user in the ARMv6-M port.
|
||||||
*/
|
*/
|
||||||
#ifndef CORTEX_PRIORITY_SVCALL
|
#ifndef CORTEX_PRIORITY_SVCALL
|
||||||
#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1)
|
#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1)
|
||||||
#else
|
#else
|
||||||
/* If it is externally redefined then better perform a validity check on it.*/
|
/* If it is externally redefined then better perform a validity check on it.*/
|
||||||
#if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
|
#if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
|
||||||
|
@ -146,7 +147,7 @@
|
||||||
* the minimum priority level.
|
* the minimum priority level.
|
||||||
*/
|
*/
|
||||||
#ifndef CORTEX_PRIORITY_PENDSV
|
#ifndef CORTEX_PRIORITY_PENDSV
|
||||||
#define CORTEX_PRIORITY_PENDSV CORTEX_MINIMUM_PRIORITY
|
#define CORTEX_PRIORITY_PENDSV CORTEX_MINIMUM_PRIORITY
|
||||||
#else
|
#else
|
||||||
/* If it is externally redefined then better perform a validity check on it.*/
|
/* If it is externally redefined then better perform a validity check on it.*/
|
||||||
#if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_PENDSV)
|
#if !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_PENDSV)
|
||||||
|
@ -161,7 +162,8 @@
|
||||||
* @note ARMv7-M architecture only.
|
* @note ARMv7-M architecture only.
|
||||||
*/
|
*/
|
||||||
#ifndef CORTEX_BASEPRI_KERNEL
|
#ifndef CORTEX_BASEPRI_KERNEL
|
||||||
#define CORTEX_BASEPRI_KERNEL CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL+1)
|
#define CORTEX_BASEPRI_KERNEL \
|
||||||
|
CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL+1)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -172,7 +174,7 @@
|
||||||
* @note Allowed values are 32 or 64.
|
* @note Allowed values are 32 or 64.
|
||||||
*/
|
*/
|
||||||
#ifndef CORTEX_STACK_ALIGNMENT
|
#ifndef CORTEX_STACK_ALIGNMENT
|
||||||
#define CORTEX_STACK_ALIGNMENT 64
|
#define CORTEX_STACK_ALIGNMENT 64
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
@ -204,7 +206,7 @@
|
||||||
* - "ARMv7-ME".
|
* - "ARMv7-ME".
|
||||||
* .
|
* .
|
||||||
*/
|
*/
|
||||||
#define CH_ARCHITECTURE_NAME "ARMvx-M"
|
#define CH_ARCHITECTURE_NAME "ARMvx-M"
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Name of the architecture variant (optional).
|
* @brief Name of the architecture variant (optional).
|
||||||
|
@ -216,24 +218,24 @@
|
||||||
* - "Cortex-M4"
|
* - "Cortex-M4"
|
||||||
* .
|
* .
|
||||||
*/
|
*/
|
||||||
#define CH_CORE_VARIANT_NAME "Cortex-Mx"
|
#define CH_CORE_VARIANT_NAME "Cortex-Mx"
|
||||||
|
|
||||||
#elif CORTEX_MODEL == CORTEX_M4
|
#elif CORTEX_MODEL == CORTEX_M4
|
||||||
#define CH_ARCHITECTURE_ARM_v7M
|
#define CH_ARCHITECTURE_ARM_v7M
|
||||||
#define CH_ARCHITECTURE_NAME "ARMv7-ME"
|
#define CH_ARCHITECTURE_NAME "ARMv7-ME"
|
||||||
#define CH_CORE_VARIANT_NAME "Cortex-M4"
|
#define CH_CORE_VARIANT_NAME "Cortex-M4"
|
||||||
#elif CORTEX_MODEL == CORTEX_M3
|
#elif CORTEX_MODEL == CORTEX_M3
|
||||||
#define CH_ARCHITECTURE_ARM_v7M
|
#define CH_ARCHITECTURE_ARM_v7M
|
||||||
#define CH_ARCHITECTURE_NAME "ARMv7-M"
|
#define CH_ARCHITECTURE_NAME "ARMv7-M"
|
||||||
#define CH_CORE_VARIANT_NAME "Cortex-M3"
|
#define CH_CORE_VARIANT_NAME "Cortex-M3"
|
||||||
#elif CORTEX_MODEL == CORTEX_M1
|
#elif CORTEX_MODEL == CORTEX_M1
|
||||||
#define CH_ARCHITECTURE_ARM_v6M
|
#define CH_ARCHITECTURE_ARM_v6M
|
||||||
#define CH_ARCHITECTURE_NAME "ARMv6-M"
|
#define CH_ARCHITECTURE_NAME "ARMv6-M"
|
||||||
#define CH_CORE_VARIANT_NAME "Cortex-M1"
|
#define CH_CORE_VARIANT_NAME "Cortex-M1"
|
||||||
#elif CORTEX_MODEL == CORTEX_M0
|
#elif CORTEX_MODEL == CORTEX_M0
|
||||||
#define CH_ARCHITECTURE_ARM_v6M
|
#define CH_ARCHITECTURE_ARM_v6M
|
||||||
#define CH_ARCHITECTURE_NAME "ARMv6-M"
|
#define CH_ARCHITECTURE_NAME "ARMv6-M"
|
||||||
#define CH_CORE_VARIANT_NAME "Cortex-M0"
|
#define CH_CORE_VARIANT_NAME "Cortex-M0"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
|
@ -135,7 +135,7 @@
|
||||||
* structures.
|
* structures.
|
||||||
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
|
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
|
||||||
* thread. Usually there is no need to change this value unless inserting
|
* thread. Usually there is no need to change this value unless inserting
|
||||||
* code in the IDLE thread hook macro.
|
* code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
|
||||||
* - @p CORTEX_BASEPRI_KERNEL, this is the @p BASEPRI value for the kernel lock
|
* - @p CORTEX_BASEPRI_KERNEL, this is the @p BASEPRI value for the kernel lock
|
||||||
* code. Code running at higher priority levels must not invoke any OS API.
|
* code. Code running at higher priority levels must not invoke any OS API.
|
||||||
* This setting is specific to the ARMv7-M architecture.
|
* This setting is specific to the ARMv7-M architecture.
|
||||||
|
@ -143,9 +143,9 @@
|
||||||
* - @p CORTEX_PRIORITY_SVCALL, priority of the SVCALL handler.
|
* - @p CORTEX_PRIORITY_SVCALL, priority of the SVCALL handler.
|
||||||
* - @p CORTEX_PRIORITY_PENDSV, priority of the PENDSV handler.
|
* - @p CORTEX_PRIORITY_PENDSV, priority of the PENDSV handler.
|
||||||
* - @p CORTEX_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
|
* - @p CORTEX_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
|
||||||
* @p <b>wfi</b> instruction from within the idle loop. This is defaulted to
|
* @p <b>wfi</b> instruction from within the idle loop. This option is
|
||||||
* FALSE because it can create problems with some debuggers. Setting this
|
* defaulted to FALSE because it can create problems with some debuggers.
|
||||||
* option to TRUE reduces the system power requirements.
|
* Setting this option to TRUE reduces the system power requirements.
|
||||||
* .
|
* .
|
||||||
* @ingroup ARMCMx
|
* @ingroup ARMCMx
|
||||||
*/
|
*/
|
||||||
|
@ -219,3 +219,10 @@
|
||||||
*
|
*
|
||||||
* @ingroup ARMCMx
|
* @ingroup ARMCMx
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @defgroup ARMCMx_SPECIFIC Specific Implementations
|
||||||
|
* @details Platform-specific port code.
|
||||||
|
*
|
||||||
|
* @ingroup ARMCMx
|
||||||
|
*/
|
||||||
|
|
18
readme.txt
18
readme.txt
|
@ -31,8 +31,8 @@
|
||||||
| | | +--MSP430/ - Drivers for MSP430 platform.
|
| | | +--MSP430/ - Drivers for MSP430 platform.
|
||||||
| | | +--SPC56x/ - Drivers for SPC56x/MPC563xx platforms.
|
| | | +--SPC56x/ - Drivers for SPC56x/MPC563xx platforms.
|
||||||
| | | +--STM32/ - Drivers for STM32 platform.
|
| | | +--STM32/ - Drivers for STM32 platform.
|
||||||
| | | +--STM8S/ - Drivers for STM8S platform.
|
|
||||||
| | | +--STM8L/ - Drivers for STM8L platform.
|
| | | +--STM8L/ - Drivers for STM8L platform.
|
||||||
|
| | | +--STM8S/ - Drivers for STM8S platform.
|
||||||
| | | +--Posix/ - Drivers for x86 Linux/OSX simulator platform.
|
| | | +--Posix/ - Drivers for x86 Linux/OSX simulator platform.
|
||||||
| | | +--Win32/ - Drivers for x86 Win32 simulator platform.
|
| | | +--Win32/ - Drivers for x86 Win32 simulator platform.
|
||||||
| | +--templates/ - Driver template files.
|
| | +--templates/ - Driver template files.
|
||||||
|
@ -40,7 +40,7 @@
|
||||||
| +--ports/ - Port files for the various architectures.
|
| +--ports/ - Port files for the various architectures.
|
||||||
| | +--GCC/ - Ports for the GCC compiler.
|
| | +--GCC/ - Ports for the GCC compiler.
|
||||||
| | | +--ARM/ - Port files for ARM7 and ARM9 architectures.
|
| | | +--ARM/ - Port files for ARM7 and ARM9 architectures.
|
||||||
| | | +--ARMCM3/ - Port files for ARMCMx architectures (ARMv6/7-M).
|
| | | +--ARMCMx/ - Port files for ARMCMx architectures (ARMv6/7-M).
|
||||||
| | | +--PPC/ - Port files for PowerPC architecture.
|
| | | +--PPC/ - Port files for PowerPC architecture.
|
||||||
| | | +--AVR/ - Port files for AVR architecture.
|
| | | +--AVR/ - Port files for AVR architecture.
|
||||||
| | | +--MSP430/ - Port files for MSP430 architecture.
|
| | | +--MSP430/ - Port files for MSP430 architecture.
|
||||||
|
@ -65,13 +65,17 @@
|
||||||
*****************************************************************************
|
*****************************************************************************
|
||||||
|
|
||||||
*** 2.1.4 ***
|
*** 2.1.4 ***
|
||||||
|
- NEW: ARM7 port reorganization following the same pattern of the ARMCMx
|
||||||
|
one, on now the port is also supports the ARM9 architecture (but not
|
||||||
|
tested yet hardware). Removed the dependencies between the port layer
|
||||||
|
and the vendors-provided headers.
|
||||||
- NEW: Initial STM8L support: HAL, PAL and Serial drivers.
|
- NEW: Initial STM8L support: HAL, PAL and Serial drivers.
|
||||||
- NEW: Added demo for the ST STM8L-Discovery kit.
|
- NEW: Added demo for the ST STM8L-Discovery kit.
|
||||||
- NEW: Added support for the STM32 Value Line to the HAL.
|
- NEW: Added support for the STM32 Value Line to the HAL.
|
||||||
- NEW: Added demo for the ST STM32VL-Discovery kit.
|
- NEW: Added demo for the ST STM32VL-Discovery kit.
|
||||||
- CHANGE: Improved the STM32 HAL to support multiple sub-families, now it
|
- CHANGE: Improved the STM32 HAL to support multiple sub-families, at compile
|
||||||
is possible to test the presence of any single peripheral into the
|
time now it is possible to test the presence of any single peripheral into
|
||||||
specified STM32 device.
|
the specified STM32 device.
|
||||||
- CHANGE: Separated dynamic threads code into dedicated files: chdynamic.c
|
- CHANGE: Separated dynamic threads code into dedicated files: chdynamic.c
|
||||||
and chdynamic.h.
|
and chdynamic.h.
|
||||||
- CHANGE: Moved the declaration of the variable pal_default_config from
|
- CHANGE: Moved the declaration of the variable pal_default_config from
|
||||||
|
@ -80,11 +84,11 @@
|
||||||
- CHANGE: Removed the various assembler files for the STM32 interrupt
|
- CHANGE: Removed the various assembler files for the STM32 interrupt
|
||||||
vectors, now it is a single vectors.c file.
|
vectors, now it is a single vectors.c file.
|
||||||
- CHANGE: Deleted ./os/ports/GCC/ARM.
|
- CHANGE: Deleted ./os/ports/GCC/ARM.
|
||||||
- CHANGE: Renamed ./os/ports/GCC/ARM7 in ./os/ports/GCC/ARM. Now the port is
|
- CHANGE: Renamed ./os/ports/GCC/ARM7 in ./os/ports/GCC/ARM.
|
||||||
meant for ARM9 too (requires more testing).
|
|
||||||
- CHANGE: Renamed ./os/hal/platforms/STM8 in ./os/hal/platforms/STM8S.
|
- CHANGE: Renamed ./os/hal/platforms/STM8 in ./os/hal/platforms/STM8S.
|
||||||
- CHANGE: Renamed ./testhal/STM8 in ./testhal/STM8S.
|
- CHANGE: Renamed ./testhal/STM8 in ./testhal/STM8S.
|
||||||
- Added SPI driver to the STM8S documentation, it was missing.
|
- Added SPI driver to the STM8S documentation, it was missing.
|
||||||
|
- Improved documentation for the ARM and ARMCMx ports.
|
||||||
|
|
||||||
*** 2.1.3 ***
|
*** 2.1.3 ***
|
||||||
- FIX: Fixed broken STM32 synchronous UART driver (bug 3100946).
|
- FIX: Fixed broken STM32 synchronous UART driver (bug 3100946).
|
||||||
|
|
Loading…
Reference in New Issue