mirror of https://github.com/rusefi/ChibiOS.git
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6436 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) {
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#if STM32_LSE_ENABLED
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#if STM32_LSE_ENABLED
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#if defined(STM32_LSE_BYPASS)
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#if defined(STM32_LSE_BYPASS)
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/* LSE Bypass.*/
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/* LSE Bypass.*/
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RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
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RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
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#else
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#else
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/* No LSE Bypass.*/
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/* No LSE Bypass.*/
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RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON;
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RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
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#endif
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#endif
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
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; /* Waits until LSE is stable. */
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; /* Waits until LSE is stable. */
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@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) {
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#if STM32_LSE_ENABLED
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#if STM32_LSE_ENABLED
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#if defined(STM32_LSE_BYPASS)
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#if defined(STM32_LSE_BYPASS)
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/* LSE Bypass.*/
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/* LSE Bypass.*/
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RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
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RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
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#else
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#else
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/* No LSE Bypass.*/
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/* No LSE Bypass.*/
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RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON;
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RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
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#endif
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#endif
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
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; /* Waits until LSE is stable. */
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; /* Waits until LSE is stable. */
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@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) {
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#if STM32_LSE_ENABLED
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#if STM32_LSE_ENABLED
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#if defined(STM32_LSE_BYPASS)
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#if defined(STM32_LSE_BYPASS)
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/* LSE Bypass.*/
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/* LSE Bypass.*/
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RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
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RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
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#else
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#else
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/* No LSE Bypass.*/
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/* No LSE Bypass.*/
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RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON;
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RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
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#endif
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#endif
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
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; /* Waits until LSE is stable. */
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; /* Waits until LSE is stable. */
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@ -61,7 +61,13 @@ static void hal_lld_backup_domain_init(void) {
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}
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}
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#if STM32_LSE_ENABLED
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#if STM32_LSE_ENABLED
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#if defined(STM32_LSE_BYPASS)
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/* LSE Bypass.*/
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RCC->BDCR |= RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
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#else
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/* No LSE Bypass.*/
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RCC->BDCR |= RCC_BDCR_LSEON;
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RCC->BDCR |= RCC_BDCR_LSEON;
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#endif
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
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while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
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; /* Waits until LSE is stable. */
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; /* Waits until LSE is stable. */
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#endif
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#endif
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@ -20,7 +20,6 @@
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* @pre This module requires the following macros to be defined in the
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* @pre This module requires the following macros to be defined in the
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* @p board.h file:
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* @p board.h file:
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* - STM32_LSECLK.
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* - STM32_LSECLK.
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* - STM32_LSEDRV.
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* - STM32_LSE_BYPASS (optionally).
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* - STM32_LSE_BYPASS (optionally).
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* - STM32_HSECLK.
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* - STM32_HSECLK.
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* - STM32_HSE_BYPASS (optionally).
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* - STM32_HSE_BYPASS (optionally).
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