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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6436 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-11-11 10:47:38 +00:00
parent 3693a12c72
commit 3c0d502601
5 changed files with 12 additions and 7 deletions
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4
os/hal/platforms/STM32F0xx/hal_lld.c
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@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) {
#if STM32_LSE_ENABLED #if STM32_LSE_ENABLED
#if defined(STM32_LSE_BYPASS) #if defined(STM32_LSE_BYPASS)
/* LSE Bypass.*/ /* LSE Bypass.*/
RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP; RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
#else #else
/* No LSE Bypass.*/ /* No LSE Bypass.*/
RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON; RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
#endif #endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */ ; /* Waits until LSE is stable. */

4
os/hal/platforms/STM32F30x/hal_lld.c
View File

@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) {
#if STM32_LSE_ENABLED #if STM32_LSE_ENABLED
#if defined(STM32_LSE_BYPASS) #if defined(STM32_LSE_BYPASS)
/* LSE Bypass.*/ /* LSE Bypass.*/
RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP; RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
#else #else
/* No LSE Bypass.*/ /* No LSE Bypass.*/
RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON; RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
#endif #endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */ ; /* Waits until LSE is stable. */

4
os/hal/platforms/STM32F37x/hal_lld.c
View File

@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) {
#if STM32_LSE_ENABLED #if STM32_LSE_ENABLED
#if defined(STM32_LSE_BYPASS) #if defined(STM32_LSE_BYPASS)
/* LSE Bypass.*/ /* LSE Bypass.*/
RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP; RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
#else #else
/* No LSE Bypass.*/ /* No LSE Bypass.*/
RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON; RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
#endif #endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */ ; /* Waits until LSE is stable. */

6
os/hal/platforms/STM32F4xx/hal_lld.c
View File

@ -61,7 +61,13 @@ static void hal_lld_backup_domain_init(void) {
} }
#if STM32_LSE_ENABLED #if STM32_LSE_ENABLED
#if defined(STM32_LSE_BYPASS)
/* LSE Bypass.*/
RCC->BDCR |= RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
#else
/* No LSE Bypass.*/
RCC->BDCR |= RCC_BDCR_LSEON; RCC->BDCR |= RCC_BDCR_LSEON;
#endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */ ; /* Waits until LSE is stable. */
#endif #endif

1
os/hal/platforms/STM32F4xx/hal_lld.h
View File

@ -20,7 +20,6 @@
* @pre This module requires the following macros to be defined in the * @pre This module requires the following macros to be defined in the
* @p board.h file: * @p board.h file:
* - STM32_LSECLK. * - STM32_LSECLK.
* - STM32_LSEDRV.
* - STM32_LSE_BYPASS (optionally). * - STM32_LSE_BYPASS (optionally).
* - STM32_HSECLK. * - STM32_HSECLK.
* - STM32_HSE_BYPASS (optionally). * - STM32_HSE_BYPASS (optionally).