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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8610 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
Giovanni Di Sirio 2015-12-16 12:54:45 +00:00
parent d2e8ef6bfe
commit 3e15ae6226
3 changed files with 16 additions and 2 deletions
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9
os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.h
View File

@ -39,6 +39,15 @@
* @name Configuration options
* @{
*/
/**
* @brief SDMMC driver enable switch.
* @details If set to @p TRUE the support for SDMMC1 is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SDC_USE_SDMMC1) || defined(__DOXYGEN__)
#define STM32_SDC_USE_SDMMC1 FALSE
#endif
/**
* @brief Support for unaligned transfers.
* @note Unaligned transfers are much slower.

4
os/hal/ports/STM32/STM32L4xx/hal_lld.h
View File

@ -1935,7 +1935,7 @@
#if (STM32_CLK48SEL == STM32_CLK48SEL_NOCLK) || defined(__DOXYGEN__)
#define STM32_48CLK 0
#elif STM32_CLK48SEL == STM32_CLK48SEL_PLLSAI1
#define STM32_48CLK (STM32_PLLVCO / STM32_PLLSAI1Q_VALUE)
#define STM32_48CLK (STM32_PLLSAI1VCO / STM32_PLLSAI1Q_VALUE)
#elif STM32_CLK48SEL == STM32_CLK48SEL_PLL
#define STM32_48CLK (STM32_PLLVCO / STM32_PLLQ_VALUE)
#elif STM32_CLK48SEL == STM32_CLK48SEL_MSI
@ -1984,7 +1984,7 @@
/**
* @brief SDMMC frequency.
*/
#define STM32_SDMMCCLK STM32_48CLK
#define STM32_SDMMCCLK STM32_48CLK
/**
* @brief Clock of timers connected to APB1

5
os/hal/ports/STM32/STM32L4xx/platform.mk
View File

@ -31,6 +31,9 @@ endif
ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c
endif
ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c
endif
ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c
endif
@ -66,6 +69,7 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c \
@ -87,6 +91,7 @@ PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
$(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1 \
$(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2 \