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Renamed ports/ARMCMAx-TZ as ports/ARMCAx-TZ 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10342 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Rocco Marco Guglielmi 2017-07-29 08:34:26 +00:00
parent 4633e54ba9
commit 3ea96b878c
8 changed files with 14 additions and 14 deletions
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2
demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/Makefile
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@ -120,7 +120,7 @@ include $(CHIBIOS)/os/common/startup/ARM/compilers/GCC/mk/startup_sama5d2.mk
#include $(CHIBIOS)/os/hal/osal/rt/osal.mk
# RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/os/common/ports/ARMCMAx-TZ/compilers/GCC/mk/port_generic.mk
include $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/mk/port_generic.mk
# Other files (optional).
#include $(CHIBIOS)/test/rt/test.mk

0
os/common/ports/ARMCMAx-TZ/chcore.c → os/common/ports/ARMCAx-TZ/chcore.c Executable file → Normal file
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0
os/common/ports/ARMCMAx-TZ/chcore.h → os/common/ports/ARMCAx-TZ/chcore.h Executable file → Normal file
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0
os/common/ports/ARMCMAx-TZ/chcore_timer.h → os/common/ports/ARMCAx-TZ/chcore_timer.h Executable file → Normal file
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12
os/common/ports/ARMCMAx-TZ/compilers/GCC/chcoreasm.S → os/common/ports/ARMCAx-TZ/compilers/GCC/chcoreasm.S
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@ -64,8 +64,8 @@
.equ SCR_FW, 0x10
.equ SCR_AW, 0x20
.set MON_S_SCR, SCR_IRQ
.set MON_NS_SCR, SCR_FIQ|SCR_NS
.equ MON_S_SCR, SCR_IRQ
.equ MON_NS_SCR, SCR_FIQ|SCR_NS
.text
@ -161,7 +161,7 @@ Mon_Irq_Handler:
ldmfd sp!, {r0-r3, r12, lr}
msr CPSR_c, #MODE_MON | I_BIT | F_BIT
stmfd sp!, {lr} // save lr into monitor stack
ldr lr, =#MON_NS_SCR // set non-secure SCR before return
ldr lr, =MON_NS_SCR // set non-secure SCR before return
mrc p15, 0, lr, c1, c1, 0
ldmfd sp!, {lr}
subs pc, lr, #4 // return into non-secure world
@ -173,7 +173,7 @@ Mon_Fiq_Handler:
// here the fiq is taken from non-secure state
// current mode is monitor (so current state is secure)
stmfd sp!, {lr} // save lr into monitor stack
ldr lr, =#MON_S_SCR // set secure SCR before to switch to FIQ mode
ldr lr, =MON_S_SCR // set secure SCR before to switch to FIQ mode
mrc p15, 0, lr, c1, c1, 0
cpsid if, #MODE_FIQ // secure FIQ mode
stmfd sp!, {r0-r3, r12} // IRQ frame, save scratch registers
@ -185,7 +185,7 @@ _mon_fiq_ret_arm:
cmp r0, #0
ldmfd sp!, {r0-r3, r12}
cpsid if, #MODE_MON
ldr lr, =#MON_NS_SCR // set non-secure SCR before return
ldr lr, =MON_NS_SCR // set non-secure SCR before return
mrceq p15, 0, lr, c1, c1, 0 // only if it will return
ldmfd sp!, {lr}
subeqs pc, lr, #4 // No reschedule, returns.
@ -218,7 +218,7 @@ _mon_fiq_ret_arm:
ldmfd sp!, {r0-r3, r12, lr}
msr CPSR_c, #MODE_MON | I_BIT | F_BIT
stmfd sp!, {lr} // save lr into monitor stack
ldr lr, =#MON_NS_SCR // set non-secure SCR before return
ldr lr, =MON_NS_SCR // set non-secure SCR before return
mrc p15, 0, lr, c1, c1, 0
ldmfd sp!, {lr}
subs pc, lr, #4 // return into non-secure world

0
os/common/ports/ARMCMAx-TZ/compilers/GCC/chtypes.h → os/common/ports/ARMCAx-TZ/compilers/GCC/chtypes.h Executable file → Normal file
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7
os/common/ports/ARMCAx-TZ/compilers/GCC/mk/port_generic.mk Normal file
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@ -0,0 +1,7 @@
# List of the ChibiOS/RT ARMCAx-TZ generic port files.
PORTSRC = ${CHIBIOS}/os/common/ports/ARMCAx-TZ/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/chcoreasm.S
PORTINC = ${CHIBIOS}/os/common/ports/ARMCAx-TZ \
${CHIBIOS}/os/common/ports/ARMCAx-TZ/compilers/GCC

7
os/common/ports/ARMCMAx-TZ/compilers/GCC/mk/port_generic.mk
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@ -1,7 +0,0 @@
# List of the ChibiOS/RT ARMCMAx-TZ generic port files.
PORTSRC = ${CHIBIOS}/os/common/ports/ARMCMAx-TZ/chcore.c
PORTASM = $(CHIBIOS)/os/common/ports/ARMCMAx-TZ/compilers/GCC/chcoreasm.S
PORTINC = ${CHIBIOS}/os/common/ports/ARMCMAx-TZ \
${CHIBIOS}/os/common/ports/ARMCMAx-TZ/compilers/GCC