diff --git a/boards/GENERIC_SPC560P/board.c b/boards/GENERIC_SPC560P/board.c index 84eec2035..23154bf8d 100644 --- a/boards/GENERIC_SPC560P/board.c +++ b/boards/GENERIC_SPC560P/board.c @@ -24,14 +24,16 @@ #if HAL_USE_PAL || defined(__DOXYGEN__) /* Initial setup of all defined pads, the list is terminated by a {0, 0}.*/ static const spc560p_siu_init_t spc560p_siu_init[] = { - {PCR(PD, PD_BUTTON1), PAL_LOW, PAL_MODE_INPUT}, - {PCR(PD, PD_BUTTON2), PAL_LOW, PAL_MODE_INPUT}, - {PCR(PD, PD_BUTTON3), PAL_LOW, PAL_MODE_INPUT}, - {PCR(PD, PD_BUTTON4), PAL_LOW, PAL_MODE_INPUT}, - {PCR(PD, PD_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, - {PCR(PD, PD_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, - {PCR(PD, PD_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, - {PCR(PD, PD_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, + {PCR(PB, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)}, + {PCR(PB, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT}, + {PCR(PD, PD_BUTTON1), PAL_LOW, PAL_MODE_INPUT}, + {PCR(PD, PD_BUTTON2), PAL_LOW, PAL_MODE_INPUT}, + {PCR(PD, PD_BUTTON3), PAL_LOW, PAL_MODE_INPUT}, + {PCR(PD, PD_BUTTON4), PAL_LOW, PAL_MODE_INPUT}, + {PCR(PD, PD_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, + {PCR(PD, PD_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, + {PCR(PD, PD_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, + {PCR(PD, PD_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL}, {0, 0, 0} }; diff --git a/boards/GENERIC_SPC560P/board.h b/boards/GENERIC_SPC560P/board.h index 5d33620d8..60edcddec 100644 --- a/boards/GENERIC_SPC560P/board.h +++ b/boards/GENERIC_SPC560P/board.h @@ -41,6 +41,9 @@ /* * I/O definitions. */ +#define PB_LIN0_TDX 2 +#define PB_LIN0_RDX 3 + #define PD_BUTTON1 0 #define PD_BUTTON2 1 #define PD_BUTTON3 2 diff --git a/demos/PPC-SPC560P-GCC/Makefile b/demos/PPC-SPC560P-GCC/Makefile index 0d17f25cd..62303fdd1 100644 --- a/demos/PPC-SPC560P-GCC/Makefile +++ b/demos/PPC-SPC560P-GCC/Makefile @@ -51,7 +51,7 @@ include $(CHIBIOS)/os/hal/platforms/SPC560Pxx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/PPC/SPC560Pxx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/SPC560P44.ld @@ -63,10 +63,10 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c -# $(CHIBIOS)/os/various/evtimer.c \ -# $(CHIBIOS)/os/various/shell.c \ -# $(CHIBIOS)/os/various/chprintf.c \ # C++ sources here. CPPSRC = diff --git a/demos/PPC-SPC560P-GCC/main.c b/demos/PPC-SPC560P-GCC/main.c index 73df39549..b296da222 100644 --- a/demos/PPC-SPC560P-GCC/main.c +++ b/demos/PPC-SPC560P-GCC/main.c @@ -20,6 +20,75 @@ #include "ch.h" #include "hal.h" +#include "test.h" +#include "shell.h" +#include "chprintf.h" + +#define SHELL_WA_SIZE THD_WA_SIZE(1024) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { + static const char *states[] = {THD_STATE_NAMES}; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.sp, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + chprintf(chp, "out of memory\r\n"); + return; + } + chThdWait(tp); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&SD1, + commands +}; /* * LEDs blinker thread, times are in milliseconds. @@ -95,6 +164,7 @@ static msg_t Thread1(void *arg) { * Application entry point. */ int main(void) { + Thread *shelltp = NULL; /* * System initializations. @@ -106,6 +176,11 @@ int main(void) { halInit(); chSysInit(); + /* + * Activates the serial driver 1 using the driver default configuration. + */ + sdStart(&SD1, NULL); + /* * Creates the blinker thread. */ @@ -115,6 +190,13 @@ int main(void) { * Normal main() thread activity. */ while (TRUE) { + + if (!shelltp) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } chThdSleepMilliseconds(1000); } return 0; diff --git a/os/hal/platforms/SPC560Pxx/hal_lld.c b/os/hal/platforms/SPC560Pxx/hal_lld.c index e37b8fed0..7f340e6fc 100644 --- a/os/hal/platforms/SPC560Pxx/hal_lld.c +++ b/os/hal/platforms/SPC560Pxx/hal_lld.c @@ -125,7 +125,7 @@ void spc560p_clock_init(void) { /* Initialization of the FMPLLs settings.*/ CGM.FMPLL[0].CR.R = SPC5_FMPLL0_ODF | - (SPC5_FMPLL0_IDF_VALUE << 26) | + ((SPC5_FMPLL0_IDF_VALUE - 1) << 26) | (SPC5_FMPLL0_NDIV_VALUE << 16); CGM.FMPLL[0].MR.R = 0; /* TODO: Add a setting. */ CGM.FMPLL[1].CR.R = SPC5_FMPLL1_ODF | diff --git a/os/hal/platforms/SPC560Pxx/hal_lld.h b/os/hal/platforms/SPC560Pxx/hal_lld.h index 1e4cf3e2b..f02194c2e 100644 --- a/os/hal/platforms/SPC560Pxx/hal_lld.h +++ b/os/hal/platforms/SPC560Pxx/hal_lld.h @@ -290,7 +290,9 @@ * is no need to specify them. */ #if !defined(SPC5_ME_ME_BITS) || defined(__DOXYGEN__) -#define SPC5_ME_ME_BITS 0 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0) #endif /** diff --git a/os/hal/platforms/SPC560Pxx/spc560p_registry.h b/os/hal/platforms/SPC560Pxx/spc560p_registry.h index 131201ed2..46b7785fa 100644 --- a/os/hal/platforms/SPC560Pxx/spc560p_registry.h +++ b/os/hal/platforms/SPC560Pxx/spc560p_registry.h @@ -39,6 +39,7 @@ */ /* LINFlex attributes.*/ #define SPC5_HAS_LINFLEX0 TRUE +#define SPC5_LINFLEX0_PCTL 48 #define SPC5_LINFLEX0_RXI_HANDLER vector79 #define SPC5_LINFLEX0_TXI_HANDLER vector80 #define SPC5_LINFLEX0_ERR_HANDLER vector81 @@ -47,6 +48,7 @@ #define SPC5_LINFLEX0_ERR_NUMBER 81 #define SPC5_HAS_LINFLEX1 TRUE +#define SPC5_LINFLEX1_PCTL 49 #define SPC5_LINFLEX1_RXI_HANDLER vector99 #define SPC5_LINFLEX1_TXI_HANDLER vector100 #define SPC5_LINFLEX1_ERR_HANDLER vector101 diff --git a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c index 8e392fce6..a84dfc815 100644 --- a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c +++ b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c @@ -72,7 +72,7 @@ SerialDriver SD4; */ static const SerialConfig default_config = { SERIAL_DEFAULT_BITRATE, - 0 + SD_MODE_8BITS_PARITY_NONE }; /*===========================================================================*/ @@ -95,12 +95,12 @@ static void spc5_linflex_init(SerialDriver *sdp, const SerialConfig *config) { /* Configures the LINFlex in UART mode with all the required parameters.*/ - div = halSPC560PGetSystemClock() / (16 * config->speed); + linflexp->UARTCR.R = SPC5_UARTCR_UART; /* UART mode FIRST. */ + linflexp->UARTCR.R = SPC5_UARTCR_UART | SPC5_UARTCR_RXEN | config->mode; + div = halSPC560PGetSystemClock() / config->speed; linflexp->LINFBRR.R = (uint16_t)(div & 15); /* Fractional divider. */ linflexp->LINIBRR.R = (uint16_t)(div >> 4); /* Integer divider. */ linflexp->UARTSR.R = 0xFFFF; /* Clearing UARTSR register.*/ - linflexp->UARTCR.R = config->mode | - SPC5_UARTCR_RXEN | SPC5_UARTCR_UART; linflexp->LINIER.R = SPC5_LINIER_DTIE | SPC5_LINIER_DRIE | SPC5_LINIER_BOIE | SPC5_LINIER_FEIE | SPC5_LINIER_SZIE; /* Interrupts enabled. */ @@ -152,7 +152,7 @@ static void spc5xx_serve_rxi_interrupt(SerialDriver *sdp) { chSysUnlockFromIsr(); } if (sr & SPC5_UARTSR_DRF) { - sdIncomingDataI(sdp, sdp->linflexp->BDRL.B.DATA0); + sdIncomingDataI(sdp, sdp->linflexp->BDRM.B.DATA4); sdp->linflexp->UARTSR.R = SPC5_UARTSR_RMB; } } @@ -331,7 +331,6 @@ void sd_lld_init(void) { #if SPC5_SERIAL_USE_LINFLEX0 sdObjectInit(&SD1, NULL, notify1); SD1.linflexp = &LINFLEX_0; -// ESCI_A.CR2.R = 0x8000; /* MDIS ON. */ INTC.PSR[SPC5_LINFLEX0_RXI_NUMBER].R = SPC5_SERIAL_LINFLEX0_PRIORITY; INTC.PSR[SPC5_LINFLEX0_TXI_NUMBER].R = SPC5_SERIAL_LINFLEX0_PRIORITY; INTC.PSR[SPC5_LINFLEX0_ERR_NUMBER].R = SPC5_SERIAL_LINFLEX0_PRIORITY; @@ -340,7 +339,6 @@ void sd_lld_init(void) { #if SPC5_SERIAL_USE_LINFLEX1 sdObjectInit(&SD2, NULL, notify2); SD2.linflexp = &LINFLEX_1; -// ESCI_B.CR2.R = 0x8000; /* MDIS ON. */ INTC.PSR[SPC5_LINFLEX1_RXI_NUMBER].R = SPC5_SERIAL_LINFLEX1_PRIORITY; INTC.PSR[SPC5_LINFLEX1_TXI_NUMBER].R = SPC5_SERIAL_LINFLEX1_PRIORITY; INTC.PSR[SPC5_LINFLEX1_ERR_NUMBER].R = SPC5_SERIAL_LINFLEX1_PRIORITY; @@ -361,6 +359,19 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { if (config == NULL) config = &default_config; + + if (sdp->state == SD_STOP) { +#if SPC5_SERIAL_USE_LINFLEX0 + if (&SD1 == sdp) { + ME.PCTL[SPC5_LINFLEX0_PCTL].R = SPC5_SERIAL_LINFLEX0_START_PCTL; + } +#endif +#if SPC5_SERIAL_USE_LINFLEX1 + if (&SD2 == sdp) { + ME.PCTL[SPC5_LINFLEX1_PCTL].R = SPC5_SERIAL_LINFLEX1_START_PCTL; + } +#endif + } spc5_linflex_init(sdp, config); } @@ -373,8 +384,22 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { */ void sd_lld_stop(SerialDriver *sdp) { - if (sdp->state == SD_READY) + if (sdp->state == SD_READY) { spc5_linflex_deinit(sdp->linflexp); + +#if SPC5_SERIAL_USE_LINFLEX0 + if (&SD1 == sdp) { + ME.PCTL[SPC5_LINFLEX0_PCTL].R = SPC5_SERIAL_LINFLEX0_STOP_PCTL; + return; + } +#endif +#if SPC5_SERIAL_USE_LINFLEX1 + if (&SD2 == sdp) { + ME.PCTL[SPC5_LINFLEX1_PCTL].R = SPC5_SERIAL_LINFLEX1_STOP_PCTL; + return; + } +#endif + } } #endif /* HAL_USE_SERIAL */ diff --git a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h index 12ab8cbcc..71287b484 100644 --- a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h +++ b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.h @@ -91,7 +91,7 @@ * @name Serial driver allowable modes * @{ */ -#define SD_MODE_8BITS_PARITY_NONE 0 +#define SD_MODE_8BITS_PARITY_NONE (SPC5_UARTCR_WL) #define SD_MODE_8BITS_PARITY_EVEN (SPC5_UARTCR_WL | \ SPC5_UARTCR_PCE) #define SD_MODE_8BITS_PARITY_ODD (SPC5_UARTCR_WL | \ @@ -133,6 +133,50 @@ #define SPC5_SERIAL_LINFLEX1_PRIORITY 8 #endif +/** + * @brief LINFlex-0 peripheral configuration when started. + * @note The default configuration is 0 (always run) in run mode and + * 2 (only halt) in low power mode. The defaults of the run modes + * are defined in @p hal_lld.h. + */ +#if !defined(SPC5_SERIAL_LINFLEX0_START_PCTL) || defined(__DOXYGEN__) +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(2)) +#endif + +/** + * @brief LINFlex-0 peripheral configuration when stopped. + * @note The default configuration is 1 (never run) in run mode and + * 1 (never run) in low power mode. The defaults of the run modes + * are defined in @p hal_lld.h. + */ +#if !defined(SPC5_SERIAL_LINFLEX0_STOP_PCTL) || defined(__DOXYGEN__) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(1)) +#endif + +/** + * @brief LINFlex-1 peripheral configuration when started. + * @note The default configuration is 0 (always run) in run mode and + * 2 (only halt) in low power mode. The defaults of the run modes + * are defined in @p hal_lld.h. + */ +#if !defined(SPC5_SERIAL_LINFLEX1_START_PCTL) || defined(__DOXYGEN__) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(2)) +#endif + +/** + * @brief LINFlex-1 peripheral configuration when stopped. + * @note The default configuration is 1 (never run) in run mode and + * 1 (never run) in low power mode. The defaults of the run modes + * are defined in @p hal_lld.h. + */ +#if !defined(SPC5_SERIAL_LINFLEX1_STOP_PCTL) || defined(__DOXYGEN__) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(1)) +#endif + /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h index e747139f8..ecdb5b114 100644 --- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h +++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h @@ -105,6 +105,12 @@ */ #define PAL_MODE_OUTPUT_OPENDRAIN (PAL_SPC5_IBE | PAL_SPC5_OBE | \ PAL_SPC5_ODE) + +/** + * @brief Alternate "n" output pad. + */ +#define PAL_MODE_OUTPUT_ALTERNATE(n) (PAL_SPC5_IBE | PAL_SPC5_OBE | \ + PAL_SPC5_PA(n)) /** @} */ /*===========================================================================*/