diff --git a/demos/ARM7-LPC214x-FatFS-GCC/Makefile b/demos/ARM7-LPC214x-FatFS-GCC/Makefile
new file mode 100644
index 000000000..f361c8d2a
--- /dev/null
+++ b/demos/ARM7-LPC214x-FatFS-GCC/Makefile
@@ -0,0 +1,188 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+  USE_THUMB = no
+endif
+
+# Enable register caching optimization (read documentation).
+ifeq ($(USE_CURRP_CACHING),)
+  USE_CURRP_CACHING = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Define linker script file here
+LDSCRIPT = ch.ld
+
+# Imported source files
+CHIBIOS = ../..
+include $(CHIBIOS)/boards/OLIMEX_LPC_P2148/board.mk
+include $(CHIBIOS)/os/hal/platforms/LPC214x/platform.mk
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/ports/GCC/ARM7/port.mk
+include $(CHIBIOS)/os/kernel/kernel.mk
+include $(CHIBIOS)/test/test.mk
+include $(CHIBIOS)/ext/fatfs/fatfs.mk
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+       $(KERNSRC) \
+       $(TESTSRC) \
+       $(HALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       $(FATFSSRC) \
+       $(CHIBIOS)/os/various/evtimer.c \
+       $(CHIBIOS)/os/various/syscalls.c \
+       main.c
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM) \
+         $(CHIBIOS)/os/ports/GCC/ARM7/LPC214x/vectors.s
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+         $(HALINC) $(PLATFORMINC) $(BOARDINC) \
+         $(FATFSINC) \
+         $(CHIBIOS)/os/various \
+         $(CHIBIOS)/os/ports/GCC/ARM7/LPC214x
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU  = arm7tdmi
+
+TRGT = arm-elf-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+OD   = $(TRGT)objdump
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of default section
+#
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS = -DSTDOUT_SD=SD1 -DSTDIN_SD=SD1
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk
diff --git a/demos/ARM7-LPC214x-FatFS-GCC/ch.ld b/demos/ARM7-LPC214x-FatFS-GCC/ch.ld
new file mode 100644
index 000000000..9dd4d388e
--- /dev/null
+++ b/demos/ARM7-LPC214x-FatFS-GCC/ch.ld
@@ -0,0 +1,101 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * LPC2148 memory setup.
+ */
+__und_stack_size__	= 0x0004;
+__abt_stack_size__	= 0x0004;
+__fiq_stack_size__	= 0x0010;
+__irq_stack_size__	= 0x0080;
+__svc_stack_size__	= 0x0004;
+__sys_stack_size__	= 0x0400;
+__stacks_total_size__	= __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
+
+MEMORY
+{
+    flash : org = 0x00000000, len = 512k - 12k
+    ram : org = 0x40000200, len = 32k - 0x200 - 288
+}
+
+__ram_start__       = ORIGIN(ram);
+__ram_size__        = LENGTH(ram);
+__ram_end__         = __ram_start__ + __ram_size__;
+__dma_start__       = 0x7FD00000;
+__dma_size__        = 8k;
+__dma_end__         = 0x7FD00000 + __dma_size__;
+
+SECTIONS
+{
+	. = 0;
+
+	.text : ALIGN(16) SUBALIGN(16)
+	{
+        _text = .;
+        KEEP(*(vectors))
+        *(.text)
+        *(.text.*);
+        *(.rodata);
+        *(.rodata.*);
+        *(.glue_7t);
+        *(.glue_7);
+        *(.gcc*);
+        *(.ctors);
+        *(.dtors);
+        . = ALIGN(4);
+        _etext = .;
+    } > flash
+
+    _textdata = _etext;
+
+    .data :
+    {
+        _data = .;
+        *(.data)
+        . = ALIGN(4);
+        *(.data.*)
+        . = ALIGN(4);
+        *(.ramtext)
+        . = ALIGN(4);
+        _edata = .;
+    } > ram AT > flash
+
+    .bss :
+    {
+        _bss_start = .;
+        *(.bss)
+        . = ALIGN(4);
+        *(.bss.*)
+        . = ALIGN(4);
+        *(COMMON)
+        . = ALIGN(4);
+        _bss_end = .;
+    } > ram    
+    
+    /DISCARD/ :
+    {
+        *(.eh_*)
+    }
+}
+
+PROVIDE(end = .);
+_end =			.;
+
+__heap_base__		= _end;
+__heap_end__		= __ram_end__ - __stacks_total_size__;
diff --git a/demos/ARM7-LPC214x-FatFS-GCC/chconf.h b/demos/ARM7-LPC214x-FatFS-GCC/chconf.h
new file mode 100644
index 000000000..3b29983cb
--- /dev/null
+++ b/demos/ARM7-LPC214x-FatFS-GCC/chconf.h
@@ -0,0 +1,464 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @addtogroup config
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/* Kernel parameters.                                                        */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ *          setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY                    1000
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ *          threads before preemption occurs. Setting this value to zero
+ *          disables the round robin mechanism.
+ *
+ * @note Disabling round robin makes the kernel more compact and generally
+ *       faster but forbids multiple threads at the same priority level.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM                 20
+#endif
+
+/**
+ * @brief Nested locks.
+ * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
+ *          operations is allowed.<br>
+ *          For performance and code size reasons the recommended setting
+ *          is to leave this option disabled.<br>
+ *          You may use this option if you need to merge ChibiOS/RT with
+ *          external libraries that require nested lock/unlock operations.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
+#define CH_USE_NESTED_LOCKS             FALSE
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ *          then the whole available RAM is used. The core memory is made
+ *          available to the heap allocator and/or can be used directly through
+ *          the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ *       provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_COREMEM.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE                 0
+#endif
+
+/*===========================================================================*/
+/* Performance options.                                                      */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ *          is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED               TRUE
+#endif
+
+/**
+ * @brief Exotic optimization.
+ * @details If defined then a CPU register is used as storage for the global
+ *          @p currp variable. Caching this variable in a register greatly
+ *          improves both space and time OS efficiency. A side effect is that
+ *          one less register has to be saved during the context switch
+ *          resulting in lower RAM usage and faster context switch.
+ *
+ * @note This option is only usable with the GCC compiler and is only useful
+ *       on processors with many registers like ARM cores.
+ * @note If this option is enabled then ALL the libraries linked to the
+ *       ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
+ *       -ffixed-@<reg@>.
+ * @note This option must be enabled in the Makefile, it is listed here for
+ *       documentation only.
+ */
+#if defined(__DOXYGEN__)
+#define CH_CURRP_REGISTER_CACHE         "reg"
+#endif
+
+/*===========================================================================*/
+/* Subsystem options.                                                        */
+/*===========================================================================*/
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ *          the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT                 TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES               TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ *          priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY      FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemWaitSignal() API
+ *          is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW                    TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES                  TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ *          in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS                 TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ *          specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT         TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS                   TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ *          are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT           TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ *          in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES                 TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ *          FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY        FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ *          included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES                TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES                   TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ *          in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE                  TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ *          in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
+ *       @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP                     TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ *          @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
+ *       appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP              FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ *          in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS                 TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ *          in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC                  TRUE
+#endif
+
+/*===========================================================================*/
+/* Debug options.                                                            */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ *          parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS            FALSE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ *          activated. This includes consistency checks inside the kernel,
+ *          runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS           FALSE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ *          activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE             FALSE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way. It
+ *       may not be implemented or some ports.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK       FALSE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ *          value when a thread is created. This can be useful for the
+ *          runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS             FALSE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ *          counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ *       some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING        TRUE
+#endif
+
+/*===========================================================================*/
+/* Kernel hooks.                                                             */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure hook.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS                                               \
+struct {                                                                \
+  /* Add threads custom fields here.*/                                  \
+};
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitily from all
+ *       the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT(tp) {                                           \
+  /* Add threads initialization code here.*/                            \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ *       terminate.
+ */
+#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT(tp) {                                           \
+  /* Add threads finalization code here.*/                              \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() {                                              \
+  /* Idle loop code here.*/                                             \
+}
+#endif
+
+#endif  /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/ARM7-LPC214x-FatFS-GCC/halconf.h b/demos/ARM7-LPC214x-FatFS-GCC/halconf.h
new file mode 100644
index 000000000..6fb0e97fa
--- /dev/null
+++ b/demos/ARM7-LPC214x-FatFS-GCC/halconf.h
@@ -0,0 +1,96 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+/*
+ * HAL configuration file, this file allows to enable or disable the various
+ * device drivers from your application. You may also use this file in order
+ * to change the device drivers settings found in the low level drivers
+ * headers, just define here the new settings and those will override the
+ * defaults defined in the LLD headers.
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
+#define CH_HAL_USE_PAL                  TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
+#define CH_HAL_USE_ADC                  FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
+#define CH_HAL_USE_CAN                  FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
+#define CH_HAL_USE_MAC                  FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
+#define CH_HAL_USE_PWM                  FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define CH_HAL_USE_SERIAL               TRUE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
+#define CH_HAL_USE_SPI                  TRUE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define CH_HAL_USE_MMC_SPI              TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/demos/ARM7-LPC214x-FatFS-GCC/main.c b/demos/ARM7-LPC214x-FatFS-GCC/main.c
new file mode 100644
index 000000000..8da531413
--- /dev/null
+++ b/demos/ARM7-LPC214x-FatFS-GCC/main.c
@@ -0,0 +1,263 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <stdio.h>
+#include <string.h>
+
+#include "ch.h"
+#include "hal.h"
+#include "test.h"
+#include "evtimer.h"
+
+#include "ff.h"
+
+/**
+ * @brief FS object.
+ */
+FATFS MMC_FS;
+
+/**
+ * MMC driver instance.
+ */
+MMCDriver MMCD1;
+
+/* FS mounted and ready.*/
+static bool_t fs_ready = FALSE;
+
+/* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0).*/
+static SPIConfig hs_spicfg = {
+  IOPORT1,
+  PA_SSEL1,
+  CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0),
+  0,
+  2
+};
+
+/* Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0).*/
+static SPIConfig ls_spicfg = {
+  IOPORT1,
+  PA_SSEL1,
+  CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0),
+  0,
+  254
+};
+
+/* MMC configuration (empty).*/
+static const MMCConfig mmc_cfg = {};
+
+/* Card insertion verification.*/
+static bool_t mmc_is_inserted(void) {
+  return !palReadPad(IOPORT2, PB_CP1);
+}
+
+/* Card protection verification.*/
+static bool_t mmc_is_protected(void) {
+  return palReadPad(IOPORT2, PB_WP1);
+}
+
+/* Generic large buffer.*/
+uint8_t fbuff[1024];
+
+/*
+ * Red LEDs blinker thread, times are in milliseconds.
+ */
+static WORKING_AREA(waThread1, 128);
+static msg_t Thread1(void *arg) {
+
+  (void)arg;
+  while (TRUE) {
+    palClearPort(IOPORT1, PAL_PORT_BIT(PA_LED2));
+    chThdSleepMilliseconds(200);
+    palSetPort(IOPORT1, PAL_PORT_BIT(PA_LED1) | PAL_PORT_BIT(PA_LED2));
+    chThdSleepMilliseconds(800);
+    palClearPort(IOPORT1, PAL_PORT_BIT(PA_LED1));
+    chThdSleepMilliseconds(200);
+    palSetPort(IOPORT1, PAL_PORT_BIT(PA_LED1) | PAL_PORT_BIT(PA_LED2));
+    chThdSleepMilliseconds(800);
+  }
+  return 0;
+}
+
+/*
+ * Yellow LED blinker thread, times are in milliseconds.
+ */
+static WORKING_AREA(waThread2, 128);
+static msg_t Thread2(void *arg) {
+
+  (void)arg;
+  while (TRUE) {
+    palClearPad(IOPORT1, PA_LEDUSB);
+    chThdSleepMilliseconds(200);
+    palSetPad(IOPORT1, PA_LEDUSB);
+    chThdSleepMilliseconds(300);
+  }
+  return 0;
+}
+
+static FRESULT scan_files(char *path)
+{
+  FRESULT res;
+  FILINFO fno;
+  DIR dir;
+  int i;
+  char *fn;
+
+  res = f_opendir(&dir, path);
+  if (res == FR_OK) {
+    i = strlen(path);
+    for (;;) {
+      res = f_readdir(&dir, &fno);
+      if (res != FR_OK || fno.fname[0] == 0)
+        break;
+      if (fno.fname[0] == '.')
+        continue;
+      fn = fno.fname;
+      if (fno.fattrib & AM_DIR) {
+        siprintf(&path[i], "/%s", fn);
+        res = scan_files(path);
+        if (res != FR_OK)
+          break;
+        path[i] = 0;
+      }
+      else {
+        iprintf("%s/%s\r\n", path, fn);
+      }
+    }
+  }
+  return res;
+}
+
+/*
+ * Executed as event handler at 500mS intervals.
+ */
+static void TimerHandler(eventid_t id) {
+
+  (void)id;
+  if (!palReadPad(IOPORT1, PA_BUTTON1)) {
+    if (fs_ready) {
+      FRESULT err;
+      uint32_t clusters;
+      FATFS *fsp;
+
+      err = f_getfree("/", &clusters, &fsp);
+      if (err != FR_OK) {
+        iprintf("FS: f_getfree() failed\r\n");
+        return;
+      }
+      iprintf("FS: %lu free clusters, %u sectors per cluster, %lu bytes free\r\n",
+              clusters, MMC_FS.csize,
+              clusters * (uint32_t)MMC_FS.csize * (uint32_t)MMC_SECTOR_SIZE);
+      fbuff[0] = 0;
+      scan_files((char *)fbuff);
+    }
+  }
+  else if (!palReadPad(IOPORT1, PA_BUTTON2)) {
+    static WORKING_AREA(waTestThread, 256);
+    Thread *tp = chThdCreateStatic(waTestThread, sizeof(waTestThread),
+                                   NORMALPRIO, TestThread, &SD1);
+    chThdWait(tp);
+  }
+}
+
+/*
+ * MMC card insertion event.
+ */
+static void InsertHandler(eventid_t id) {
+  FRESULT err;
+
+  (void)id;
+  iprintf("MMC: inserted\r\n");
+  /*
+   * On insertion MMC initialization and FS mount.
+   */
+  iprintf("MMC: initialization ");
+  if (mmcConnect(&MMCD1)) {
+    iprintf("failed\r\n");
+    return;
+  }
+  iprintf("ok\r\n");
+  iprintf("FS: mount ");
+  err = f_mount(0, &MMC_FS);
+  if (err != FR_OK) {
+    iprintf("failed\r\n");
+    mmcDisconnect(&MMCD1);
+    return;
+  }
+  fs_ready = TRUE;
+  iprintf("ok\r\n");
+}
+
+/*
+ * MMC card removal event.
+ */
+static void RemoveHandler(eventid_t id) {
+
+  (void)id;
+  iprintf("MMC: removed\r\n");
+  fs_ready = FALSE;
+}
+
+/*
+ * Entry point, note, the main() function is already a thread in the system
+ * on entry.
+ */
+int main(int argc, char **argv) {
+  static const evhandler_t evhndl[] = {
+    TimerHandler,
+    InsertHandler,
+    RemoveHandler
+  };
+  static EvTimer evt;
+  struct EventListener el0, el1, el2;
+
+  (void)argc;
+  (void)argv;
+
+  /*
+   * Activates the serial driver 2 using the driver default configuration.
+   */
+  sdStart(&SD1, NULL);
+
+  /*
+   * Initializes the MMC driver to work with SPI2.
+   */
+  mmcObjectInit(&MMCD1, &SPID1,
+                &ls_spicfg, &hs_spicfg,
+                mmc_is_protected, mmc_is_inserted);
+  mmcStart(&MMCD1, &mmc_cfg);
+
+  /*
+   * Creates the blinker threads.
+   */
+  chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+  chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, NULL);
+
+  /*
+   * Normal main() thread activity, in this demo it does nothing except
+   * sleeping in a loop and listed for events.
+   */
+  evtInit(&evt, MS2ST(500));            /* Initializes an event timer object.   */
+  evtStart(&evt);                       /* Starts the event timer.              */
+  chEvtRegister(&evt.et_es, &el0, 0);   /* Registers on the timer event source. */
+  chEvtRegister(&MMCD1.mmc_inserted_event, &el1, 1);
+  chEvtRegister(&MMCD1.mmc_removed_event, &el2, 2);
+  while (TRUE)// chThdSleepMilliseconds(50);
+    chEvtDispatch(evhndl, chEvtWaitOne(ALL_EVENTS));
+  return 0;
+}
diff --git a/demos/ARM7-LPC214x-FatFS-GCC/readme.txt b/demos/ARM7-LPC214x-FatFS-GCC/readme.txt
new file mode 100644
index 000000000..83abee7c6
--- /dev/null
+++ b/demos/ARM7-LPC214x-FatFS-GCC/readme.txt
@@ -0,0 +1,19 @@
+*****************************************************************************
+** ChibiOS/RT + FatFS demo for LPC214x.                                    **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on an Olimex LPC-P2148 board. The port on other boards or other
+members of the LPC2000 family should be an easy task.
+
+** The Demo **
+
+The demo blinks the leds on the board by using multiple threads.
+By pressing button 1 a directory scan on the MMC slot is performed, by
+pressing the button 2 the test suite is activated on serial port 1.
+
+** Build Procedure **
+
+The demo was built using the YAGARTO toolchain but any toolchain based on GCC
+and GNU userspace programs will work.
diff --git a/os/hal/platforms/LPC214x/spi_lld.c b/os/hal/platforms/LPC214x/spi_lld.c
index f3f3e13b7..6e7f7a44b 100644
--- a/os/hal/platforms/LPC214x/spi_lld.c
+++ b/os/hal/platforms/LPC214x/spi_lld.c
@@ -55,20 +55,23 @@ SPIDriver SPID1;
  * @param[out] rxbuf    the pointer to the receive buffer or @p NULL
  */
 void rw8(size_t n, const uint8_t *txbuf, uint8_t *rxbuf) {
+  size_t ntx = n;
 
   while (n > 0) {
-    if (SSPBase->SSP_SR & SR_RNE) {
+    uint32_t sr = SSPBase->SSP_SR;
+    if (sr & SR_RNE) {
       uint8_t w = SSPBase->SSP_DR;
       if (rxbuf != NULL)
         *rxbuf++ = w;
       n--;
       continue; /* Priority over transmission. */
     }
-    if (SSPBase->SSP_SR & SR_TNF) {
+    if ((ntx > 0) && (sr & SR_TNF)) {
       if (txbuf != NULL)
         SSPBase->SSP_DR = *txbuf++;
       else
-        SSPBase->SSP_DR = 0xFF;
+        SSPBase->SSP_DR = 0xFFFFFFFF;
+      ntx--;
     }
   }
 }
@@ -104,6 +107,9 @@ void spi_lld_start(SPIDriver *spip) {
   }
   /* Configuration.*/
   SSPBase->SSP_CR1  = 0;
+  /* Emptying the receive FIFO, it happens to not be empty while debugging.*/
+  while (SSPBase->SSP_SR & SR_RNE)
+    (void) SSPBase->SSP_DR;
   SSPBase->SSP_CR0  = spip->spd_config->spc_cr0;
   SSPBase->SSP_CPSR = spip->spd_config->spc_cpsr;
   SSPBase->SSP_CR1  = spip->spd_config->spc_cr1 | CR1_SSE;
diff --git a/readme.txt b/readme.txt
index 2ffacad68..27680e2a0 100644
--- a/readme.txt
+++ b/readme.txt
@@ -8,6 +8,8 @@
 - NEW: STM32 PWM driver implementation.
 - NEW: LPC214x SPI driver implementation (SSP only, polled mode, no IRQ), this
   driver replaces the old, not HAL compatible, SSP driver.
+- NEW: LPC214x FatFS demo added, LPC214x minimal demo removed, LPC214x "normal"
+  demo reduced to work like all the other generic demos.
 - NEW: Added custom mode settings to the STM32 PAL driver:
   - PAL_MODE_STM32_ALTERNATE_PUSHPULL
   - PAL_MODE_STM32_ALTERNATE_OPENDRAIN
@@ -17,6 +19,8 @@
 - CHANGE: The STM32 device drivers now no more configure the I/O pins on
   initialization. Pins must be configured in board.h, the change was required
   in order to support the STM32 AFIO remapping feature.
+- CHANGE: Removed the mmcsd.c driver, it is replaced by the generic MMC_SPI
+  driver present into the HAL.
 
 *** 1.3.5 ***
 - FIX: Fixed problem with memory core allocator (bug 2912528).