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Splitted boards for secure and not secure configuration 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11393 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
edolomb 2018-01-22 19:51:16 +00:00
parent 8b9d39d2a8
commit 53044c14a4
6 changed files with 819 additions and 0 deletions
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138
os/hal/boards/ATSAMA5D2_XULT_NSEC/board.c Normal file
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/*
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#define _PIOA ((Pio*)0xFC038000U)
/*
* SAMA PIO CFGR masks.
*/
#define SAMA_PIO_FUNC_GPIO 0U
#define SAMA_PIO_FUNC_PERIPH_A 1U
#define SAMA_PIO_FUNC_PERIPH_B 2U
#define SAMA_PIO_FUNC_PERIPH_C 3U
#define SAMA_PIO_FUNC_PERIPH_D 4U
#define SAMA_PIO_FUNC_PERIPH_E 5U
#define SAMA_PIO_FUNC_PERIPH_F 6U
#define SAMA_PIO_FUNC_PERIPH_G 7U
#define SAMA_PIO_FUNC(n) (n)
#define SAMA_PIO_DIR_INPUT (0U)
#define SAMA_PIO_DIR_OUTPUT (1U << 8U)
#define SAMA_PIO_PUEN (1U << 9U)
#define SAMA_PIO_PDEN (1U << 10U)
#define SAMA_PIO_IFEN (1U << 12U)
#define SAMA_PIO_IFSCEN (1U << 13U)
#define SAMA_PIO_OPD (1U << 14U)
#define SAMA_PIO_SCHMITT (1U << 15U)
#define SAMA_PIO_DRVSTR_LO (0U << 16U)
#define SAMA_PIO_DRVSTR_ME (2U << 16U)
#define SAMA_PIO_DRVSTR_HI (3U << 16U)
#define SAMA_PIO_LOW 0U
#define SAMA_PIO_HIGH 1U
/*
* SAMA PIO default SIOSR, MSKR and CFGR values.
*/
#define SAMA_DEFAULT_SIOSR 0x00000000U
#define SAMA_DEFAULT_SIONR 0xFFFFFFFFU
#define SAMA_DEFAULT_MSKR 0xFFFFFFFFU
#define SAMA_DEFAULT_CFGR SAMA_PIO_FUNC_GPIO | SAMA_PIO_PUEN | \
SAMA_PIO_DIR_INPUT | SAMA_PIO_SCHMITT
/*
* This macro converts a pin identifier to a bitmask.
*/
#define SAMA_PIN_N(n) (1U << n)
/**
* @brief SIU/SIUL register initializer type.
*/
typedef struct {
int32_t pio_id;
uint32_t pio_msk;
uint32_t pio_cfg;
uint32_t pio_ods;
} sama_pio_init_t;
/*
* @brief Initial setup of all defined pads.
* @note All pads are secured when SAMA_HAL_IS_SECURE is set as @p TRUE.
* @note The list is terminated by a {-1, 0, 0, 0}
*/
static const sama_pio_init_t sama_inits[] = {
/* RGB Led */
{SAMA_PIOB,
SAMA_PIN_N(PIOB_LED_RED),
SAMA_PIO_FUNC_GPIO | SAMA_PIO_DIR_OUTPUT | SAMA_PIO_DRVSTR_HI,
SAMA_PIO_HIGH},
/* list terminated*/
{-1, 0, 0, 0}
};
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
sama_clock_init();
}
/**
* @brief Board-specific initialization code.
*/
void boardInit(void) {
unsigned i;
/* Configuring all PIO A pads with default configuration. */
#if SAMA_HAS_PIOA
_PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_MSKR = SAMA_DEFAULT_MSKR;
_PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_CFGR = SAMA_DEFAULT_CFGR;
#endif /* SAMA_HAS_PIOA */
/* Configuring all PIO B pads with default configuration. */
#if SAMA_HAS_PIOB
_PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_MSKR = SAMA_DEFAULT_MSKR;
_PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_CFGR = SAMA_DEFAULT_CFGR;
#endif /* SAMA_HAS_PIOB */
/* Configuring all PIO C pads with default configuration. */
#if SAMA_HAS_PIOC
_PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_MSKR = SAMA_DEFAULT_MSKR;
_PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_CFGR = SAMA_DEFAULT_CFGR;
#endif /* SAMA_HAS_PIOC */
/* Configuring all PIO D pads with default configuration. */
#if SAMA_HAS_PIOD
_PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_MSKR = SAMA_DEFAULT_MSKR;
_PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_CFGR = SAMA_DEFAULT_CFGR;
#endif /* SAMA_HAS_PIOD */
/* Initialize PIO registers for defined pads.*/
i = 0;
while (sama_inits[i].pio_id != -1) {
_PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_MSKR = sama_inits[i].pio_msk;
_PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_CFGR = sama_inits[i].pio_cfg;
if(sama_inits[i].pio_ods == SAMA_PIO_HIGH) {
_PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_SODR = sama_inits[i].pio_msk;
}
else {
_PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_CODR = sama_inits[i].pio_msk;
}
i++;
}
}

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/*
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for Atmel SAM A5 D27 Xplained Ultra board.
*/
/*
* Board identifier.
*/
#define BOARD_ATSAM5D2_XULT
#define BOARD_NAME "Atmel SAM A5 D27 Xplained Ultra"
/*
* Ethernet PHY type.
*/
#define BOARD_PHY_ID MII_KSZ8081_ID
#define BOARD_PHY_RMII
/*
* Board oscillators-related settings.
*/
#if !defined(SAMA_OSCXTCLK)
#define SAMA_OSCXTCLK 32768U
#endif
#if !defined(SAMA_MOSCXTCLK)
#define SAMA_MOSCXTCLK 12000000U
#endif
/*
* MCU type as defined in the Atmel header.
*/
#define SAMA5D27
/**
* Port identifiers.
*/
#define SAMA_PIOA 0U
#define SAMA_PIOB 1U
#define SAMA_PIOC 2U
#define SAMA_PIOD 3U
/*
* Forms a line identifier. In this driver the pad number is encoded in the
* lower 5 bits of line and the port in sixth and seventh bits.
*/
#define SAMA_LINE(port, pad) \
((uint32_t)((uint32_t)(port << 5U)) | ((uint32_t)(pad)))
/*
* Decodes a port identifier from a line identifier.
*/
#define SAMA_PORT(line) \
((uint32_t)((line & 0xFFFFFFE0U) >> 5U)
/**
* Decodes a pad identifier from a line identifier.
*/
#define SAMA_PAD(line) \
((uint32_t)(line & 0x0000001FU))
/*
* IO pins assignments.
*/
#define PIOA_PIO0 0U
#define PIOA_PIN1 1U
#define PIOA_PIN2 2U
#define PIOA_PIN3 3U
#define PIOA_PIN4 4U
#define PIOA_PIN5 5U
#define PIOA_PIN6 6U
#define PIOA_PIN7 7U
#define PIOA_PIN8 8U
#define PIOA_PIN9 9U
#define PIOA_PIN10 10U
#define PIOA_PIN11 11U
#define PIOA_PIN12 12U
#define PIOA_PIN13 13U
#define PIOA_PIN14 14U
#define PIOA_PIN15 15U
#define PIOA_PIN16 16U
#define PIOA_PIN17 17U
#define PIOA_PIN18 18U
#define PIOA_PIN19 19U
#define PIOA_PIN20 20U
#define PIOA_PIN21 21U
#define PIOA_PIN22 22U
#define PIOA_PIN23 23U
#define PIOA_PIN24 24U
#define PIOA_PIN25 25U
#define PIOA_PIN26 26U
#define PIOA_PIN27 27U
#define PIOA_PIN28 28U
#define PIOA_PIN29 29U
#define PIOA_PIN30 30U
#define PIOA_PIN31 31U
#define PIOB_LED_BLUE 0U
#define PIOB_PIN1 1U
#define PIOB_PIN2 2U
#define PIOB_PIN3 3U
#define PIOB_PIN4 4U
#define PIOB_LED_GREEN 5U
#define PIOB_LED_RED 6U
#define PIOB_PIN7 7U
#define PIOB_PIN8 8U
#define PIOB_USER_PB 9U
#define PIOB_PIN10 10U
#define PIOB_PIN11 11U
#define PIOB_PIN12 12U
#define PIOB_PIN13 13U
#define PIOB_ETH_GTXCK 14U
#define PIOB_ETH_GTXEN 15U
#define PIOB_ETH_GRXDV 16U
#define PIOB_ETH_GRXER 17U
#define PIOB_ETH_GRX0 18U
#define PIOB_ETH_GRX1 19U
#define PIOB_ETH_GTX0 20U
#define PIOB_ETH_GTX1 21U
#define PIOB_ETH_GMDC 22U
#define PIOB_ETH_GMDIO 23U
#define PIOB_PIN24 24U
#define PIOB_PIN25 25U
#define PIOB_PIN26 26U
#define PIOB_PIN27 27U
#define PIOB_PIN28 28U
#define PIOB_PIN29 29U
#define PIOB_PIN30 30U
#define PIOB_PIN31 31U
#define PIOC_PIO0 0U
#define PIOC_PIN1 1U
#define PIOC_PIN2 2U
#define PIOC_PIN3 3U
#define PIOC_PIN4 4U
#define PIOC_PIN5 5U
#define PIOC_PIN6 6U
#define PIOC_PIN7 7U
#define PIOC_PIN8 8U
#define PIOC_PIN9 9U
#define PIOC_PIN10 10U
#define PIOC_PIN11 11U
#define PIOC_PIN12 12U
#define PIOC_PIN13 13U
#define PIOC_PIN14 14U
#define PIOC_PIN15 15U
#define PIOC_PIN16 16U
#define PIOC_PIN17 17U
#define PIOC_PIN18 18U
#define PIOC_PIN19 19U
#define PIOC_PIN20 20U
#define PIOC_PIN21 21U
#define PIOC_PIN22 22U
#define PIOC_PIN23 23U
#define PIOC_PIN24 24U
#define PIOC_PIN25 25U
#define PIOC_PIN26 26U
#define PIOC_PIN27 27U
#define PIOC_PIN28 28U
#define PIOC_PIN29 29U
#define PIOC_PIN30 30U
#define PIOC_PIN31 31U
#define PIOD_PIO0 0U
#define PIOD_PIN1 1U
#define PIOD_PIN2 2U
#define PIOD_PIN3 3U
#define PIOD_PIN4 4U
#define PIOD_PIN5 5U
#define PIOD_PIN6 6U
#define PIOD_PIN7 7U
#define PIOD_PIN8 8U
#define PIOD_PIN9 9U
#define PIOD_PIN10 10U
#define PIOD_PIN11 11U
#define PIOD_PIN12 12U
#define PIOD_PIN13 13U
#define PIOD_PIN14 14U
#define PIOD_PIN15 15U
#define PIOD_PIN16 16U
#define PIOD_PIN17 17U
#define PIOD_PIN18 18U
#define PIOD_PIN19 19U
#define PIOD_PIN20 20U
#define PIOD_PIN21 21U
#define PIOD_PIN22 22U
#define PIOD_PIN23 23U
#define PIOD_PIN24 24U
#define PIOD_PIN25 25U
#define PIOD_PIN26 26U
#define PIOD_PIN27 27U
#define PIOD_PIN28 28U
#define PIOD_PIN29 29U
#define PIOD_PIN30 30U
#define PIOD_PIN31 31U
/*
* IO lines assignments.
*/
#define BOARD_LINE(port, pad) \
((uint32_t)((uint32_t)(port)) | ((uint32_t)(pad)))
#define LINE_LED_BLUE BOARD_LINE(PIOB, 0U)
#define LINE_LED_GREEN BOARD_LINE(PIOB, 5U)
#define LINE_LED_RED BOARD_LINE(PIOB, 6U)
#define LINE_USER_PB BOARD_LINE(PIOB, 9U)
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

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os/hal/boards/ATSAMA5D2_XULT_NSEC/board.mk Normal file
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# List of all the board related files.
BOARDSRC = $(CHIBIOS)/os/hal/boards/ATSAMA5D2_XULT_NSEC/board.c
# Required include directories
BOARDINC = $(CHIBIOS)/os/hal/boards/ATSAMA5D2_XULT_NSEC
# Shared variables
ALLCSRC += $(BOARDSRC)
ALLINC += $(BOARDINC)

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os/hal/boards/ATSAMA5D2_XULT_SEC/board.c Normal file
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/*
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#define _PIOA ((Pio*)0xFC038000U)
/*===========================================================================*/
/* Configuration checks. */
/*===========================================================================*/
#if !SAMA_HAL_IS_SECURE
#error "SAMA PROJECT REQUIRES SECURE CONFIGURATION"
#endif
/*
* SAMA PIO CFGR masks.
*/
#define SAMA_PIO_FUNC_GPIO 0U
#define SAMA_PIO_FUNC_PERIPH_A 1U
#define SAMA_PIO_FUNC_PERIPH_B 2U
#define SAMA_PIO_FUNC_PERIPH_C 3U
#define SAMA_PIO_FUNC_PERIPH_D 4U
#define SAMA_PIO_FUNC_PERIPH_E 5U
#define SAMA_PIO_FUNC_PERIPH_F 6U
#define SAMA_PIO_FUNC_PERIPH_G 7U
#define SAMA_PIO_FUNC(n) (n)
#define SAMA_PIO_DIR_INPUT (0U)
#define SAMA_PIO_DIR_OUTPUT (1U << 8U)
#define SAMA_PIO_PUEN (1U << 9U)
#define SAMA_PIO_PDEN (1U << 10U)
#define SAMA_PIO_IFEN (1U << 12U)
#define SAMA_PIO_IFSCEN (1U << 13U)
#define SAMA_PIO_OPD (1U << 14U)
#define SAMA_PIO_SCHMITT (1U << 15U)
#define SAMA_PIO_DRVSTR_LO (0U << 16U)
#define SAMA_PIO_DRVSTR_ME (2U << 16U)
#define SAMA_PIO_DRVSTR_HI (3U << 16U)
#define SAMA_PIO_LOW 0U
#define SAMA_PIO_HIGH 1U
/*
* SAMA PIO default SIOSR, MSKR and CFGR values.
*/
#define SAMA_DEFAULT_SIOSR 0x00000000U
#define SAMA_DEFAULT_SIONR 0xFFFFFFFFU
#define SAMA_DEFAULT_MSKR 0xFFFFFFFFU
#define SAMA_DEFAULT_CFGR SAMA_PIO_FUNC_GPIO | SAMA_PIO_PUEN | \
SAMA_PIO_DIR_INPUT | SAMA_PIO_SCHMITT
/*
* This macro converts a pin identifier to a bitmask.
*/
#define SAMA_PIN_N(n) (1U << n)
/**
* @brief SIU/SIUL register initializer type.
*/
typedef struct {
int32_t pio_id;
uint32_t pio_msk;
uint32_t pio_cfg;
uint32_t pio_ods;
} sama_pio_init_t;
/*
* @brief Initial setup of all defined pads.
* @note All pads are secured when SAMA_HAL_IS_SECURE is set as @p TRUE.
* @note The list is terminated by a {-1, 0, 0, 0}
*/
static const sama_pio_init_t sama_inits[] = {
/* RGB Led */
{SAMA_PIOB,
SAMA_PIN_N(PIOB_LED_BLUE) | SAMA_PIN_N(PIOB_LED_GREEN),
SAMA_PIO_FUNC_GPIO | SAMA_PIO_DIR_OUTPUT | SAMA_PIO_DRVSTR_HI,
SAMA_PIO_HIGH},
/* User Button */
{SAMA_PIOB,
SAMA_PIN_N(PIOB_USER_PB),
SAMA_PIO_FUNC_GPIO | SAMA_PIO_DIR_INPUT | SAMA_PIO_PUEN | SAMA_PIO_SCHMITT,
SAMA_PIO_HIGH},
/* list terminated*/
{-1, 0, 0, 0}
};
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
sama_clock_init();
}
/**
* @brief Board-specific initialization code.
*/
void boardInit(void) {
unsigned i;
#if SAMA_HAL_IS_SECURE
/* Disabling PMC write protection. */
pmcDisableWP();
/* Enabling port clock. */
pmcEnablePIO();
/* Enabling write protection. */
pmcEnableWP();
#endif /* SAMA_HAL_IS_SECURE */
/* Configuring all PIO A pads with default configuration. */
#if SAMA_HAS_PIOA
#if SAMA_HAL_IS_SECURE
_PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;
_PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_SIONR = SAMA_DEFAULT_SIONR;
#endif /* SAMA_HAL_IS_SECURE */
_PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_MSKR = SAMA_DEFAULT_MSKR;
_PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_CFGR = SAMA_DEFAULT_CFGR;
#endif /* SAMA_HAS_PIOA */
/* Configuring all PIO B pads with default configuration. */
#if SAMA_HAS_PIOB
#if SAMA_HAL_IS_SECURE
_PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;
_PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_SIONR = SAMA_DEFAULT_SIONR;
#endif /* SAMA_HAL_IS_SECURE */
_PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_MSKR = SAMA_DEFAULT_MSKR;
_PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_CFGR = SAMA_DEFAULT_CFGR;
#endif /* SAMA_HAS_PIOB */
/* Configuring all PIO C pads with default configuration. */
#if SAMA_HAS_PIOC
#if SAMA_HAL_IS_SECURE
_PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;
_PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_SIONR = SAMA_DEFAULT_SIONR;
#endif /* SAMA_HAL_IS_SECURE */
_PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_MSKR = SAMA_DEFAULT_MSKR;
_PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_CFGR = SAMA_DEFAULT_CFGR;
#endif /* SAMA_HAS_PIOC */
/* Configuring all PIO D pads with default configuration. */
#if SAMA_HAS_PIOD
#if SAMA_HAL_IS_SECURE
_PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;
_PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_SIONR = SAMA_DEFAULT_SIONR;
#endif /* SAMA_HAL_IS_SECURE */
_PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_MSKR = SAMA_DEFAULT_MSKR;
_PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_CFGR = SAMA_DEFAULT_CFGR;
#endif /* SAMA_HAS_PIOD */
/* Initialize PIO registers for defined pads.*/
i = 0;
while (sama_inits[i].pio_id != -1) {
#if SAMA_HAL_IS_SECURE
_PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_SIOSR = sama_inits[i].pio_msk;
_PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_MSKR = sama_inits[i].pio_msk;
_PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_CFGR = sama_inits[i].pio_cfg;
if(sama_inits[i].pio_ods == SAMA_PIO_HIGH) {
_PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_SODR = sama_inits[i].pio_msk;
}
else {
_PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_CODR = sama_inits[i].pio_msk;
}
#else
_PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_MSKR = sama_inits[i].pio_msk;
_PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_CFGR = sama_inits[i].pio_cfg;
if(sama_inits[i].pio_ods == SAMA_PIO_HIGH) {
_PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_SODR = sama_inits[i].pio_msk;
}
else {
_PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_CODR = sama_inits[i].pio_msk;
}
#endif /* SAMA_HAL_IS_SECURE */
i++;
}
}

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/*
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for Atmel SAM A5 D27 Xplained Ultra board.
*/
/*
* Board identifier.
*/
#define BOARD_ATSAM5D2_XULT
#define BOARD_NAME "Atmel SAM A5 D27 Xplained Ultra"
/*
* Ethernet PHY type.
*/
#define BOARD_PHY_ID MII_KSZ8081_ID
#define BOARD_PHY_RMII
/*
* Board oscillators-related settings.
*/
#if !defined(SAMA_OSCXTCLK)
#define SAMA_OSCXTCLK 32768U
#endif
#if !defined(SAMA_MOSCXTCLK)
#define SAMA_MOSCXTCLK 12000000U
#endif
/*
* MCU type as defined in the Atmel header.
*/
#define SAMA5D27
/**
* Port identifiers.
*/
#define SAMA_PIOA 0U
#define SAMA_PIOB 1U
#define SAMA_PIOC 2U
#define SAMA_PIOD 3U
/*
* Forms a line identifier. In this driver the pad number is encoded in the
* lower 5 bits of line and the port in sixth and seventh bits.
*/
#define SAMA_LINE(port, pad) \
((uint32_t)((uint32_t)(port << 5U)) | ((uint32_t)(pad)))
/*
* Decodes a port identifier from a line identifier.
*/
#define SAMA_PORT(line) \
((uint32_t)((line & 0xFFFFFFE0U) >> 5U)
/**
* Decodes a pad identifier from a line identifier.
*/
#define SAMA_PAD(line) \
((uint32_t)(line & 0x0000001FU))
/*
* IO pins assignments.
*/
#define PIOA_PIO0 0U
#define PIOA_PIN1 1U
#define PIOA_PIN2 2U
#define PIOA_PIN3 3U
#define PIOA_PIN4 4U
#define PIOA_PIN5 5U
#define PIOA_PIN6 6U
#define PIOA_PIN7 7U
#define PIOA_PIN8 8U
#define PIOA_PIN9 9U
#define PIOA_PIN10 10U
#define PIOA_PIN11 11U
#define PIOA_PIN12 12U
#define PIOA_PIN13 13U
#define PIOA_PIN14 14U
#define PIOA_PIN15 15U
#define PIOA_PIN16 16U
#define PIOA_PIN17 17U
#define PIOA_PIN18 18U
#define PIOA_PIN19 19U
#define PIOA_PIN20 20U
#define PIOA_PIN21 21U
#define PIOA_PIN22 22U
#define PIOA_PIN23 23U
#define PIOA_PIN24 24U
#define PIOA_PIN25 25U
#define PIOA_PIN26 26U
#define PIOA_PIN27 27U
#define PIOA_PIN28 28U
#define PIOA_PIN29 29U
#define PIOA_PIN30 30U
#define PIOA_PIN31 31U
#define PIOB_LED_BLUE 0U
#define PIOB_PIN1 1U
#define PIOB_PIN2 2U
#define PIOB_PIN3 3U
#define PIOB_PIN4 4U
#define PIOB_LED_GREEN 5U
#define PIOB_LED_RED 6U
#define PIOB_PIN7 7U
#define PIOB_PIN8 8U
#define PIOB_USER_PB 9U
#define PIOB_PIN10 10U
#define PIOB_PIN11 11U
#define PIOB_PIN12 12U
#define PIOB_PIN13 13U
#define PIOB_ETH_GTXCK 14U
#define PIOB_ETH_GTXEN 15U
#define PIOB_ETH_GRXDV 16U
#define PIOB_ETH_GRXER 17U
#define PIOB_ETH_GRX0 18U
#define PIOB_ETH_GRX1 19U
#define PIOB_ETH_GTX0 20U
#define PIOB_ETH_GTX1 21U
#define PIOB_ETH_GMDC 22U
#define PIOB_ETH_GMDIO 23U
#define PIOB_PIN24 24U
#define PIOB_PIN25 25U
#define PIOB_PIN26 26U
#define PIOB_PIN27 27U
#define PIOB_PIN28 28U
#define PIOB_PIN29 29U
#define PIOB_PIN30 30U
#define PIOB_PIN31 31U
#define PIOC_PIO0 0U
#define PIOC_PIN1 1U
#define PIOC_PIN2 2U
#define PIOC_PIN3 3U
#define PIOC_PIN4 4U
#define PIOC_PIN5 5U
#define PIOC_PIN6 6U
#define PIOC_PIN7 7U
#define PIOC_PIN8 8U
#define PIOC_PIN9 9U
#define PIOC_PIN10 10U
#define PIOC_PIN11 11U
#define PIOC_PIN12 12U
#define PIOC_PIN13 13U
#define PIOC_PIN14 14U
#define PIOC_PIN15 15U
#define PIOC_PIN16 16U
#define PIOC_PIN17 17U
#define PIOC_PIN18 18U
#define PIOC_PIN19 19U
#define PIOC_PIN20 20U
#define PIOC_PIN21 21U
#define PIOC_PIN22 22U
#define PIOC_PIN23 23U
#define PIOC_PIN24 24U
#define PIOC_PIN25 25U
#define PIOC_PIN26 26U
#define PIOC_PIN27 27U
#define PIOC_PIN28 28U
#define PIOC_PIN29 29U
#define PIOC_PIN30 30U
#define PIOC_PIN31 31U
#define PIOD_PIO0 0U
#define PIOD_PIN1 1U
#define PIOD_PIN2 2U
#define PIOD_PIN3 3U
#define PIOD_PIN4 4U
#define PIOD_PIN5 5U
#define PIOD_PIN6 6U
#define PIOD_PIN7 7U
#define PIOD_PIN8 8U
#define PIOD_PIN9 9U
#define PIOD_PIN10 10U
#define PIOD_PIN11 11U
#define PIOD_PIN12 12U
#define PIOD_PIN13 13U
#define PIOD_PIN14 14U
#define PIOD_PIN15 15U
#define PIOD_PIN16 16U
#define PIOD_PIN17 17U
#define PIOD_PIN18 18U
#define PIOD_PIN19 19U
#define PIOD_PIN20 20U
#define PIOD_PIN21 21U
#define PIOD_PIN22 22U
#define PIOD_PIN23 23U
#define PIOD_PIN24 24U
#define PIOD_PIN25 25U
#define PIOD_PIN26 26U
#define PIOD_PIN27 27U
#define PIOD_PIN28 28U
#define PIOD_PIN29 29U
#define PIOD_PIN30 30U
#define PIOD_PIN31 31U
/*
* IO lines assignments.
*/
#define BOARD_LINE(port, pad) \
((uint32_t)((uint32_t)(port)) | ((uint32_t)(pad)))
#define LINE_LED_BLUE BOARD_LINE(PIOB, 0U)
#define LINE_LED_GREEN BOARD_LINE(PIOB, 5U)
#define LINE_LED_RED BOARD_LINE(PIOB, 6U)
#define LINE_USER_PB BOARD_LINE(PIOB, 9U)
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

9
os/hal/boards/ATSAMA5D2_XULT_SEC/board.mk Normal file
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# List of all the board related files.
BOARDSRC = $(CHIBIOS)/os/hal/boards/ATSAMA5D2_XULT_SEC/board.c
# Required include directories
BOARDINC = $(CHIBIOS)/os/hal/boards/ATSAMA5D2_XULT_SEC
# Shared variables
ALLCSRC += $(BOARDSRC)
ALLINC += $(BOARDINC)