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Fixed G431 board files. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13040 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2019-09-29 07:48:37 +00:00
parent 1668810111
commit 5b23342fbf
4 changed files with 22 additions and 6 deletions
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6
demos/STM32/RT-STM32G431RB-NUCLEO64/cfg/mcuconf.h
View File

@ -32,10 +32,8 @@
#define MCUCONF_H
#define STM32G4xx_MCUCONF
#define STM32G473_MCUCONF
#define STM32G483_MCUCONF
#define STM32G474_MCUCONF
#define STM32G484_MCUCONF
#define STM32G431_MCUCONF
#define STM32G441_MCUCONF
/*
* HAL driver system settings.

2
os/hal/boards/ST_NUCLEO64_G431RB/board.h
View File

@ -58,7 +58,7 @@
/*
* MCU type as defined in the ST header.
*/
#define STM32G474xx
#define STM32G431xx
/*
* IO pins assignments.

2
os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.chcfg
View File

@ -11,7 +11,7 @@
<board_name>STMicroelectronics STM32 Nucleo64-G431RB</board_name>
<board_id>ST_NUCLEO64_G431RB</board_id>
<board_functions></board_functions>
<subtype>STM32G474xx</subtype>
<subtype>STM32G431xx</subtype>
<clocks HSEFrequency="24000000" HSEBypass="false" LSEFrequency="32768"
LSEBypass="false" VDD="300" LSEDrive="3 High Drive (default)" ></clocks>
<ports>

18
os/hal/ports/STM32/STM32G4xx/stm32_isr.c
View File

@ -63,18 +63,24 @@
#include "stm32_usart2.inc"
#include "stm32_usart3.inc"
#include "stm32_uart4.inc"
#if STM32_HAS_UART5
#include "stm32_uart5.inc"
#endif
#include "stm32_lpuart1.inc"
#include "stm32_tim1_tim15_tim16_tim17.inc"
#include "stm32_tim2.inc"
#include "stm32_tim3.inc"
#include "stm32_tim4.inc"
#if STM32_HAS_TIM5
#include "stm32_tim5.inc"
#endif
#include "stm32_tim6.inc"
#include "stm32_tim7.inc"
#include "stm32_tim8.inc"
#if STM32_HAS_TIM20
#include "stm32_tim20.inc"
#endif
/*===========================================================================*/
/* Driver exported functions. */
@ -99,17 +105,23 @@ void irqInit(void) {
tim2_irq_init();
tim3_irq_init();
tim4_irq_init();
#if STM32_HAS_TIM5
tim5_irq_init();
#endif
tim6_irq_init();
tim7_irq_init();
tim8_irq_init();
#if STM32_HAS_TIM20
tim20_irq_init();
#endif
usart1_irq_init();
usart2_irq_init();
usart3_irq_init();
uart4_irq_init();
#if STM32_HAS_UART5
uart5_irq_init();
#endif
lpuart1_irq_init();
}
@ -132,17 +144,23 @@ void irqDeinit(void) {
tim2_irq_deinit();
tim3_irq_deinit();
tim4_irq_deinit();
#if STM32_HAS_TIM5
tim5_irq_deinit();
#endif
tim6_irq_deinit();
tim7_irq_deinit();
tim8_irq_deinit();
#if STM32_HAS_TIM20
tim20_irq_deinit();
#endif
usart1_irq_deinit();
usart2_irq_deinit();
usart3_irq_deinit();
uart4_irq_deinit();
#if STM32_HAS_UART5
uart5_irq_deinit();
#endif
lpuart1_irq_deinit();
}