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ADC4 improvements. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14256 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-04-22 04:37:48 +00:00
parent 18792fe675
commit 64415c7010
2 changed files with 13 additions and 0 deletions
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9
os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
View File

@ -735,6 +735,10 @@ void adc_lld_stop_conversion(ADCDriver *adcp) {
*/
void adcSTM32EnableVREF(ADCDriver *adcp) {
#ifdef STM32H7XX
chDbgAssert(STM32_PWR_CR2 & PWR_CR2_MONEN,
"adcSTM32EnableVREF need PWR_CR2_MONEN in STM32_PWR_CR2");
#endif
adcp->adcc->CCR |= ADC_CCR_VREFEN;
}
@ -765,6 +769,11 @@ void adcSTM32DisableVREF(ADCDriver *adcp) {
*/
void adcSTM32EnableTS(ADCDriver *adcp) {
#ifdef STM32H7XX
chDbgAssert(STM32_PWR_CR2 & PWR_CR2_MONEN,
"adcSTM32EnableVREF need PWR_CR2_MONEN in STM32_PWR_CR2");
#endif
adcp->adcc->CCR |= ADC_CCR_TSEN;
}

4
os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h
View File

@ -131,6 +131,10 @@
#define ADC_CFGR_EXTEN_FALLING (2U << 10U)
#define ADC_CFGR_EXTEN_BOTH (3U << 10U)
#define ADC_CFGR_CONT_MASK (1U << 13U)
#define ADC_CFGR_CONT_DISABLED (0U << 13U)
#define ADC_CFGR_CONT_ENABLED (1U << 13U)
#define ADC_CFGR_DISCEN_MASK (1U << 16U)
#define ADC_CFGR_DISCEN_DISABLED (0U << 16U)
#define ADC_CFGR_DISCEN_ENABLED (1U << 16U)