git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1488 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-01-02 10:59:48 +00:00
parent 7d7af240fb
commit 6825084461
7 changed files with 41 additions and 36 deletions

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@ -58,6 +58,19 @@
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
* @note This switch is enforced to @p FALSE if the driver implementation
* does not support the sleep mode.
*/
#if CAN_SUPPORTS_SLEEP || defined(__DOXYGEN__)
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
#else /* !CAN_SUPPORTS_SLEEP */
#define CAN_USE_SLEEP_MODE FALSE
#endif /* !CAN_SUPPORTS_SLEEP */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/

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@ -72,7 +72,7 @@
* @brief ADC1 DMA priority (0..3|lowest..highest).
*/
#if !defined(STM32_ADC1_DMA_PRIORITY) || defined(__DOXYGEN__)
#define STM32_ADC1_DMA_PRIORITY 1
#define STM32_ADC1_DMA_PRIORITY 3
#endif
/**
@ -80,7 +80,7 @@
* @note @p BASEPRI_KERNEL >= @p STM32_ADC1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
*/
#if !defined(STM32_ADC1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_ADC1_IRQ_PRIORITY 0x70
#define STM32_ADC1_IRQ_PRIORITY 0x50
#endif
/**

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@ -89,19 +89,6 @@
#define STM32_CAN1_IRQ_PRIORITY 0xB0
#endif
/**
* @brief Sleep mode related APIs inclusion switch.
* @note This switch is enforced to @p FALSE if the driver implementation
* does not support the sleep mode.
*/
#if CAN_SUPPORTS_SLEEP || defined(__DOXYGEN__)
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
#else /* !CAN_SUPPORTS_SLEEP */
#define CAN_USE_SLEEP_MODE FALSE
#endif /* !CAN_SUPPORTS_SLEEP */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/

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@ -83,7 +83,7 @@
* @note @p BASEPRI_KERNEL >= @p STM32_PWM1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
*/
#if !defined(STM32_PWM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM1_IRQ_PRIORITY 0x80
#define STM32_PWM1_IRQ_PRIORITY 0x70
#endif
/**
@ -91,7 +91,7 @@
* @note @p BASEPRI_KERNEL >= @p STM32_PWM2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
*/
#if !defined(STM32_PWM2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM2_IRQ_PRIORITY 0x80
#define STM32_PWM2_IRQ_PRIORITY 0x70
#endif
/**
@ -99,7 +99,7 @@
* @note @p BASEPRI_KERNEL >= @p STM32_PWM3_IRQ_PRIORITY > @p PRIORITY_PENDSV.
*/
#if !defined(STM32_PWM3_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM3_IRQ_PRIORITY 0x80
#define STM32_PWM3_IRQ_PRIORITY 0x70
#endif
/**

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@ -55,7 +55,7 @@ SerialDriver SD3;
/** @brief Driver default configuration.*/
static const SerialConfig default_config =
{
38400,
SERIAL_DEFAULT_BITRATE,
0,
USART_CR2_STOP1_BITS | USART_CR2_LINEN,
0

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@ -80,7 +80,7 @@
* @note @p BASEPRI_KERNEL >= @p STM32_SPI1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
*/
#if !defined(STM32_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SPI1_IRQ_PRIORITY 0x60
#define STM32_SPI1_IRQ_PRIORITY 0xA0
#endif
/**
@ -88,7 +88,7 @@
* @note @p BASEPRI_KERNEL >= @p STM32_SPI2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
*/
#if !defined(STM32_SPI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SPI2_IRQ_PRIORITY 0x60
#define STM32_SPI2_IRQ_PRIORITY 0xA0
#endif
/**

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@ -48,7 +48,7 @@
* @brief Enables the PAL subsystem.
*/
#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_PAL TRUE
#define CH_HAL_USE_PAL TRUE
#endif
/*===========================================================================*/
@ -59,7 +59,7 @@
* @brief Enables the ADC subsystem.
*/
#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
#define CH_HAL_USE_ADC TRUE
#define CH_HAL_USE_ADC TRUE
#endif
/*===========================================================================*/
@ -70,9 +70,14 @@
* @brief Enables the CAN subsystem.
*/
#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
#define CH_HAL_USE_CAN TRUE
#define CH_HAL_USE_CAN TRUE
#endif
/*
* Default CAN settings overrides (uncomment to override).
*/
/*#define CAN_USE_SLEEP_MODE TRUE*/
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
@ -81,7 +86,7 @@
* @brief Enables the MAC subsystem.
*/
#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
#define CH_HAL_USE_MAC TRUE
#define CH_HAL_USE_MAC TRUE
#endif
/*===========================================================================*/
@ -92,7 +97,7 @@
* @brief Enables the PWM subsystem.
*/
#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
#define CH_HAL_USE_PWM TRUE
#define CH_HAL_USE_PWM TRUE
#endif
/*===========================================================================*/
@ -103,14 +108,14 @@
* @brief Enables the SERIAL subsystem.
*/
#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define CH_HAL_USE_SERIAL TRUE
#define CH_HAL_USE_SERIAL TRUE
#endif
/*
* Default SERIAL settings overrides (uncomment to override).
*/
/*#define SERIAL_DEFAULT_BITRATE 38400*/
/*#define SERIAL_BUFFERS_SIZE 64*/
/*#define SERIAL_DEFAULT_BITRATE 38400*/
/*#define SERIAL_BUFFERS_SIZE 64*/
/*===========================================================================*/
/* SPI driver related settings. */
@ -120,13 +125,13 @@
* @brief Enables the SPI subsystem.
*/
#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_SPI TRUE
#define CH_HAL_USE_SPI TRUE
#endif
/*
* Default SPI settings overrides (uncomment to override).
*/
/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/
/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/
/*===========================================================================*/
/* MMC_SPI driver related settings. */
@ -136,16 +141,16 @@
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define CH_HAL_USE_MMC_SPI TRUE
#define CH_HAL_USE_MMC_SPI TRUE
#endif
/*
* Default MMC_SPI settings overrides (uncomment to override).
*/
/*#define MMC_SECTOR_SIZE 512*/
/*#define MMC_NICE_WAITING TRUE*/
/*#define MMC_POLLING_INTERVAL 10*/
/*#define MMC_POLLING_DELAY 10*/
/*#define MMC_SECTOR_SIZE 512*/
/*#define MMC_NICE_WAITING TRUE*/
/*#define MMC_POLLING_INTERVAL 10*/
/*#define MMC_POLLING_DELAY 10*/
#endif /* _HALCONF_H_ */