mirror of https://github.com/rusefi/ChibiOS.git
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1488 35acf78f-673a-0410-8e92-d51de3d6d3f4
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7d7af240fb
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@ -58,6 +58,19 @@
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief Sleep mode related APIs inclusion switch.
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* @note This switch is enforced to @p FALSE if the driver implementation
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* does not support the sleep mode.
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*/
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#if CAN_SUPPORTS_SLEEP || defined(__DOXYGEN__)
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#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
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#define CAN_USE_SLEEP_MODE TRUE
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#endif
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#else /* !CAN_SUPPORTS_SLEEP */
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#define CAN_USE_SLEEP_MODE FALSE
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#endif /* !CAN_SUPPORTS_SLEEP */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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@ -72,7 +72,7 @@
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* @brief ADC1 DMA priority (0..3|lowest..highest).
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*/
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#if !defined(STM32_ADC1_DMA_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_ADC1_DMA_PRIORITY 1
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#define STM32_ADC1_DMA_PRIORITY 3
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#endif
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/**
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@ -80,7 +80,7 @@
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* @note @p BASEPRI_KERNEL >= @p STM32_ADC1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_ADC1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_ADC1_IRQ_PRIORITY 0x70
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#define STM32_ADC1_IRQ_PRIORITY 0x50
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#endif
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/**
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@ -89,19 +89,6 @@
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#define STM32_CAN1_IRQ_PRIORITY 0xB0
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#endif
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/**
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* @brief Sleep mode related APIs inclusion switch.
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* @note This switch is enforced to @p FALSE if the driver implementation
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* does not support the sleep mode.
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*/
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#if CAN_SUPPORTS_SLEEP || defined(__DOXYGEN__)
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#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
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#define CAN_USE_SLEEP_MODE TRUE
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#endif
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#else /* !CAN_SUPPORTS_SLEEP */
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#define CAN_USE_SLEEP_MODE FALSE
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#endif /* !CAN_SUPPORTS_SLEEP */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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@ -83,7 +83,7 @@
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* @note @p BASEPRI_KERNEL >= @p STM32_PWM1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_PWM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_PWM1_IRQ_PRIORITY 0x80
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#define STM32_PWM1_IRQ_PRIORITY 0x70
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#endif
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/**
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@ -91,7 +91,7 @@
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* @note @p BASEPRI_KERNEL >= @p STM32_PWM2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_PWM2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_PWM2_IRQ_PRIORITY 0x80
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#define STM32_PWM2_IRQ_PRIORITY 0x70
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#endif
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/**
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@ -99,7 +99,7 @@
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* @note @p BASEPRI_KERNEL >= @p STM32_PWM3_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_PWM3_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_PWM3_IRQ_PRIORITY 0x80
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#define STM32_PWM3_IRQ_PRIORITY 0x70
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#endif
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/**
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@ -55,7 +55,7 @@ SerialDriver SD3;
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/** @brief Driver default configuration.*/
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static const SerialConfig default_config =
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{
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38400,
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SERIAL_DEFAULT_BITRATE,
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0,
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USART_CR2_STOP1_BITS | USART_CR2_LINEN,
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0
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@ -80,7 +80,7 @@
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* @note @p BASEPRI_KERNEL >= @p STM32_SPI1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SPI1_IRQ_PRIORITY 0x60
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#define STM32_SPI1_IRQ_PRIORITY 0xA0
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#endif
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/**
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* @note @p BASEPRI_KERNEL >= @p STM32_SPI2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_SPI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SPI2_IRQ_PRIORITY 0x60
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#define STM32_SPI2_IRQ_PRIORITY 0xA0
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#endif
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/**
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@ -48,7 +48,7 @@
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* @brief Enables the PAL subsystem.
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*/
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#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)
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#define CH_HAL_USE_PAL TRUE
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#define CH_HAL_USE_PAL TRUE
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#endif
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/*===========================================================================*/
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* @brief Enables the ADC subsystem.
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*/
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#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)
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#define CH_HAL_USE_ADC TRUE
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#define CH_HAL_USE_ADC TRUE
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#endif
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/*===========================================================================*/
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* @brief Enables the CAN subsystem.
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*/
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#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)
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#define CH_HAL_USE_CAN TRUE
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#define CH_HAL_USE_CAN TRUE
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#endif
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/*
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* Default CAN settings overrides (uncomment to override).
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*/
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/*#define CAN_USE_SLEEP_MODE TRUE*/
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/*===========================================================================*/
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/* MAC driver related settings. */
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/*===========================================================================*/
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* @brief Enables the MAC subsystem.
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*/
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#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)
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#define CH_HAL_USE_MAC TRUE
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#define CH_HAL_USE_MAC TRUE
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#endif
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/*===========================================================================*/
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* @brief Enables the PWM subsystem.
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*/
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#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)
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#define CH_HAL_USE_PWM TRUE
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#define CH_HAL_USE_PWM TRUE
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#endif
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/*===========================================================================*/
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* @brief Enables the SERIAL subsystem.
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*/
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#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)
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#define CH_HAL_USE_SERIAL TRUE
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#define CH_HAL_USE_SERIAL TRUE
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#endif
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/*
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* Default SERIAL settings overrides (uncomment to override).
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*/
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/*#define SERIAL_DEFAULT_BITRATE 38400*/
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/*#define SERIAL_BUFFERS_SIZE 64*/
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/*#define SERIAL_DEFAULT_BITRATE 38400*/
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/*#define SERIAL_BUFFERS_SIZE 64*/
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/*===========================================================================*/
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/* SPI driver related settings. */
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* @brief Enables the SPI subsystem.
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*/
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#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)
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#define CH_HAL_USE_SPI TRUE
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#define CH_HAL_USE_SPI TRUE
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#endif
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/*
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* Default SPI settings overrides (uncomment to override).
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*/
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/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/
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/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/
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/*===========================================================================*/
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/* MMC_SPI driver related settings. */
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* @brief Enables the MMC_SPI subsystem.
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*/
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#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
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#define CH_HAL_USE_MMC_SPI TRUE
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#define CH_HAL_USE_MMC_SPI TRUE
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#endif
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/*
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* Default MMC_SPI settings overrides (uncomment to override).
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*/
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/*#define MMC_SECTOR_SIZE 512*/
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/*#define MMC_NICE_WAITING TRUE*/
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/*#define MMC_POLLING_INTERVAL 10*/
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/*#define MMC_POLLING_DELAY 10*/
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/*#define MMC_SECTOR_SIZE 512*/
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/*#define MMC_NICE_WAITING TRUE*/
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/*#define MMC_POLLING_INTERVAL 10*/
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/*#define MMC_POLLING_DELAY 10*/
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#endif /* _HALCONF_H_ */
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