diff --git a/os/hal/platforms/STM32/TIMv1/gpt_lld.c b/os/hal/platforms/STM32/TIMv1/gpt_lld.c
index c3d228045..d847a440e 100644
--- a/os/hal/platforms/STM32/TIMv1/gpt_lld.c
+++ b/os/hal/platforms/STM32/TIMv1/gpt_lld.c
@@ -488,7 +488,11 @@ void gpt_lld_start(GPTDriver *gptp) {
       rccResetTIM1();
       nvicEnableVector(STM32_TIM1_UP_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM1_IRQ_PRIORITY));
+#if defined(STM32_TIM1CLK)
+      gptp->clock = STM32_TIM1CLK;
+#else
       gptp->clock = STM32_TIMCLK2;
+#endif
     }
 #endif
 #if STM32_GPT_USE_TIM2
@@ -555,7 +559,11 @@ void gpt_lld_start(GPTDriver *gptp) {
       rccResetTIM8();
       nvicEnableVector(STM32_TIM8_UP_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_GPT_TIM8_IRQ_PRIORITY));
+#if defined(STM32_TIM8CLK)
+      gptp->clock = STM32_TIM8CLK;
+#else
       gptp->clock = STM32_TIMCLK2;
+#endif
     }
 #endif
 
diff --git a/os/hal/platforms/STM32/TIMv1/icu_lld.c b/os/hal/platforms/STM32/TIMv1/icu_lld.c
index 11a10eb08..b407d33ae 100644
--- a/os/hal/platforms/STM32/TIMv1/icu_lld.c
+++ b/os/hal/platforms/STM32/TIMv1/icu_lld.c
@@ -405,7 +405,11 @@ void icu_lld_start(ICUDriver *icup) {
                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
       nvicEnableVector(STM32_TIM1_CC_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
+#if defined(STM32_TIM1CLK)
+      icup->clock = STM32_TIM1CLK;
+#else
       icup->clock = STM32_TIMCLK2;
+#endif
     }
 #endif
 #if STM32_ICU_USE_TIM2
@@ -452,7 +456,11 @@ void icu_lld_start(ICUDriver *icup) {
                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
       nvicEnableVector(STM32_TIM8_CC_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
+#if defined(STM32_TIM8CLK)
+      icup->clock = STM32_TIM8CLK;
+#else
       icup->clock = STM32_TIMCLK2;
+#endif
     }
 #endif
 #if STM32_ICU_USE_TIM9
diff --git a/os/hal/platforms/STM32/TIMv1/pwm_lld.c b/os/hal/platforms/STM32/TIMv1/pwm_lld.c
index 223c7428b..37ed835f5 100644
--- a/os/hal/platforms/STM32/TIMv1/pwm_lld.c
+++ b/os/hal/platforms/STM32/TIMv1/pwm_lld.c
@@ -410,7 +410,11 @@ void pwm_lld_start(PWMDriver *pwmp) {
                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY));
       nvicEnableVector(STM32_TIM1_CC_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY));
+#if defined(STM32_TIM1CLK)
+      pwmp->clock = STM32_TIM1CLK;
+#else
       pwmp->clock = STM32_TIMCLK2;
+#endif
     }
 #endif
 #if STM32_PWM_USE_TIM2
@@ -458,7 +462,11 @@ void pwm_lld_start(PWMDriver *pwmp) {
                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM8_IRQ_PRIORITY));
       nvicEnableVector(STM32_TIM8_CC_NUMBER,
                        CORTEX_PRIORITY_MASK(STM32_PWM_TIM8_IRQ_PRIORITY));
+#if defined(STM32_TIM8CLK)
+      pwmp->clock = STM32_TIM8CLK;
+#else
       pwmp->clock = STM32_TIMCLK2;
+#endif
     }
 #endif
 #if STM32_PWM_USE_TIM9
diff --git a/readme.txt b/readme.txt
index 4135aefcd..c60195638 100644
--- a/readme.txt
+++ b/readme.txt
@@ -89,7 +89,9 @@
 *****************************************************************************
 
 *** 2.7.0 ***
-- FIX: Fixed rong MCO2 check in STM32F4xx HAL driver (bug #447)(backported
+- FIX: Fixed STM32F30x TIM1/TIM8 alternate clock source setting not
+  recognized (bug #448)(backported to 2.6.2).
+- FIX: Fixed wrong MCO2 check in STM32F4xx HAL driver (bug #447)(backported
   to 2.4.6 and 2.6.2).
 - FIX: Fixed spurious half buffer callback in STM32 ADC drivers (bug #446)
   (backported to 2.4.6 and 2.6.2).