mirror of https://github.com/rusefi/ChibiOS.git
Added STM32WLxx mcuconf.h template.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14878 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
vrepetenko
parent
e80ec0c644
commit
6e9f4d4c5f
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@ -0,0 +1,285 @@
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[#ftl]
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[#--
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ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio.
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This file is part of ChibiOS.
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ChibiOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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--]
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[@pp.dropOutputFile /]
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[#import "/@lib/libutils.ftl" as utils /]
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[#import "/@lib/liblicense.ftl" as license /]
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[@pp.changeOutputFile name="mcuconf.h" /]
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/*
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[@license.EmitLicenseAsText /]
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*/
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/*
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* STM32WLxx drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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*
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* IRQ priorities:
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* 15...0 Lowest...Highest.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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*/
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#ifndef MCUCONF_H
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#define MCUCONF_H
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#define STM32WLxx_MCUCONF
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/*
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* HAL driver system settings.
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*/
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#define STM32_NO_INIT ${doc.STM32_NO_INIT!"FALSE"}
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#define STM32_CLOCK_DYNAMIC ${doc.STM32_CLOCK_DYNAMIC!"FALSE"}
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#define STM32_TARGET_CORE ${doc.STM32_TARGET_CORE!"1"}
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#define STM32_VOS ${doc.STM32_VOS!"STM32_VOS_RANGE1"}
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#define STM32_PWR_CR2 ${doc.STM32_PWR_CR2!"(PWR_CR2_PLS_LVL0)"}
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#define STM32_PWR_PUCRA ${doc.STM32_PWR_PUCRA!"(0U)"}
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#define STM32_PWR_PDCRA ${doc.STM32_PWR_PDCRA!"(0U)"}
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#define STM32_PWR_PUCRB ${doc.STM32_PWR_PUCRB!"(0U)"}
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#define STM32_PWR_PDCRB ${doc.STM32_PWR_PDCRB!"(0U)"}
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#define STM32_PWR_PUCRC ${doc.STM32_PWR_PUCRC!"(0U)"}
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#define STM32_PWR_PDCRC ${doc.STM32_PWR_PDCRC!"(0U)"}
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#define STM32_PWR_PUCRH ${doc.STM32_PWR_PUCRH!"(0U)"}
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#define STM32_PWR_PDCRH ${doc.STM32_PWR_PDCRH!"(0U)"}
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#define STM32_HSI16_ENABLED ${doc.STM32_HSI16_ENABLED!"TRUE"}
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#define STM32_LSI_ENABLED ${doc.STM32_LSI_ENABLED!"FALSE"}
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#define STM32_LSIPRE ${doc.STM32_LSIPRE!"STM32_LSIPRE_NODIV"}
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#define STM32_HSE32_ENABLED ${doc.STM32_HSE32_ENABLED!"TRUE"}
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#define STM32_HSE32SRC ${doc.STM32_HSE32_ENABLED!"STM32_HSE32_XTAL"}
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#define STM32_LSE_ENABLED ${doc.STM32_LSE_ENABLED!"TRUE"}
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#define STM32_MSIPLL_ENABLED ${doc.STM32_MSIPLL_ENABLED!"TRUE"}
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#define STM32_MSIRANGE ${doc.STM32_MSIRANGE!"STM32_MSIRANGE_4M"}
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#define STM32_MSISRANGE ${doc.STM32_MSISRANGE!"STM32_MSISRANGE_4M"}
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#define STM32_SW ${doc.STM32_SW!"STM32_SW_PLL"}
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#define STM32_PLLSRC ${doc.STM32_PLLSRC!"STM32_PLLSRC_MSI"}
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#define STM32_PLLM_VALUE ${doc.STM32_PLLM_VALUE!"1"}
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#define STM32_PLLN_VALUE ${doc.STM32_PLLN_VALUE!"24"}
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#define STM32_PLLR_VALUE ${doc.STM32_PLLR_VALUE!"2"}
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#define STM32_PLLP_VALUE ${doc.STM32_PLLP_VALUE!"2"}
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#define STM32_PLLQ_VALUE ${doc.STM32_PLLQ_VALUE!"2"}
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#define STM32_HPRE ${doc.STM32_HPRE!"STM32_HPRE_DIV1"}
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#define STM32_SHDHPRE ${doc.STM32_SHDHPRE!"STM32_SHDHPRE_DIV1"}
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#define STM32_C2HPRE ${doc.STM32_C2HPRE!"STM32_C2HPRE_DIV1"}
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#define STM32_PPRE1 ${doc.STM32_PPRE1!"STM32_PPRE1_DIV1"}
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#define STM32_PPRE2 ${doc.STM32_PPRE2!"STM32_PPRE2_DIV1"}
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#define STM32_STOPWUCK ${doc.STM32_STOPWUCK!"STM32_STOPWUCK_MSI"}
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#define STM32_MCOSEL ${doc.STM32_MCOSEL!"STM32_MCOSEL_NOCLOCK"}
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#define STM32_MCOPRE ${doc.STM32_MCOPRE!"STM32_MCOPRE_DIV1"}
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#define STM32_LSCOSEL ${doc.STM32_LSCOSEL!"STM32_LSCOSEL_NOCLOCK"}
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/*
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* Peripherals clock sources.
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*/
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#define STM32_ADCSEL ${doc.STM32_ADCSEL!"STM32_ADCSEL_NOCLK"}
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#define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_SYSCLK"}
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#define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_SYSCLK"}
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#define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_SYSCLK"}
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#define STM32_I2C1SEL ${doc.STM32_I2C1SEL!"STM32_I2C1SEL_SYSCLK"}
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#define STM32_I2C3SEL ${doc.STM32_I2C3SEL!"STM32_I2C3SEL_SYSCLK"}
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#define STM32_LPTIM1SEL ${doc.STM32_LPTIM1SEL!"STM32_LPTIM1SEL_PCLK1"}
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#define STM32_LPTIM2SEL ${doc.STM32_LPTIM2SEL!"STM32_LPTIM2SEL_PCLK1"}
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#define STM32_LPTIM3SEL ${doc.STM32_LPTIM3SEL!"STM32_LPTIM3SEL_PCLK1"}
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#define STM32_SPI2S2SEL ${doc.STM32_SPI2S2SEL!"STM32_SPI2S2SEL_PLLQCLK"}
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#define STM32_RNGSEL ${doc.STM32_RNGSEL!"STM32_RNGSEL_LSE"}
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#define STM32_RTCSEL ${doc.STM32_RTCSEL!"STM32_RTCSEL_LSE"}
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/*
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* IRQ system settings.
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*/
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#define STM32_IRQ_EXTI0_PRIORITY ${doc.STM32_IRQ_EXTI0_PRIORITY!"6"}
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#define STM32_IRQ_EXTI1_PRIORITY ${doc.STM32_IRQ_EXTI1_PRIORITY!"6"}
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#define STM32_IRQ_EXTI2_PRIORITY ${doc.STM32_IRQ_EXTI2_PRIORITY!"6"}
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#define STM32_IRQ_EXTI3_PRIORITY ${doc.STM32_IRQ_EXTI3_PRIORITY!"6"}
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#define STM32_IRQ_EXTI4_PRIORITY ${doc.STM32_IRQ_EXTI4_PRIORITY!"6"}
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#define STM32_IRQ_EXTI5_9_PRIORITY ${doc.STM32_IRQ_EXTI5_9_PRIORITY!"6"}
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#define STM32_IRQ_EXTI10_15_PRIORITY ${doc.STM32_IRQ_EXTI10_15_PRIORITY!"6"}
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#define STM32_IRQ_EXTI17_PRIORITY ${doc.STM32_IRQ_EXTI17_PRIORITY!"6"}
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#define STM32_IRQ_EXTI18_PRIORITY ${doc.STM32_IRQ_EXTI18_PRIORITY!"6"}
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#define STM32_IRQ_EXTI19_PRIORITY ${doc.STM32_IRQ_EXTI19_PRIORITY!"6"}
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#define STM32_IRQ_EXTI20_PRIORITY ${doc.STM32_IRQ_EXTI20_PRIORITY!"6"}
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#define STM32_IRQ_EXTI16_34_PRIORITY ${doc.STM32_IRQ_EXTI16_34_PRIORITY!"6"}
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#define STM32_IRQ_EXTI45_PRIORITY ${doc.STM32_IRQ_EXTI45_PRIORITY!"6"}
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#define STM32_IRQ_TIM1_BRK_PRIORITY ${doc.STM32_IRQ_TIM1_BRK_PRIORITY!"7"}
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#define STM32_IRQ_TIM1_UP_PRIORITY ${doc.STM32_IRQ_TIM1_UP_PRIORITY!"7"}
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#define STM32_IRQ_TIM1_TRGCO_PRIORITY ${doc.STM32_IRQ_TIM1_TRGCO_PRIORITY!"7"}
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#define STM32_IRQ_TIM1_CC_PRIORITY ${doc.STM32_IRQ_TIM1_CC_PRIORITY!"7"}
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#define STM32_IRQ_TIM2_PRIORITY ${doc.STM32_IRQ_TIM2_PRIORITY!"7"}
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#define STM32_IRQ_TIM16_PRIORITY ${doc.STM32_IRQ_TIM16_PRIORITY!"7"}
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#define STM32_IRQ_TIM17_PRIORITY ${doc.STM32_IRQ_TIM17_PRIORITY!"7"}
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#define STM32_IRQ_LPTIM1_PRIORITY ${doc.STM32_IRQ_LPTIM1_PRIORITY!"7"}
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#define STM32_IRQ_LPTIM2_PRIORITY ${doc.STM32_IRQ_LPTIM2_PRIORITY!"7"}
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#define STM32_IRQ_LPTIM3_PRIORITY ${doc.STM32_IRQ_LPTIM3_PRIORITY!"7"}
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#define STM32_IRQ_USART1_PRIORITY ${doc.STM32_IRQ_USART1_PRIORITY!"12"}
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#define STM32_IRQ_USART2_PRIORITY ${doc.STM32_IRQ_USART2_PRIORITY!"12"}
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#define STM32_IRQ_LPUART1_PRIORITY ${doc.STM32_IRQ_LPUART1_PRIORITY!"12"}
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/*
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* ADC driver system settings.
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*/
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#define STM32_ADC_USE_ADC1 ${doc.STM32_ADC_USE_ADC1!"FALSE"}
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#define STM32_ADC_ADC1_CKMODE ${doc.STM32_ADC_ADC1_CKMODE!"STM32_ADC_CKMODE_ADCCLK"}
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#define STM32_ADC_ADC1_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_PRIORITY!"5"}
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#define STM32_ADC_ADC1_DMA_PRIORITY ${doc.STM32_ADC_ADC1_DMA_PRIORITY!"2"}
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#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
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#define STM32_ADC_ADC1_DMA_STREAM ${doc.STM32_ADC_ADC1_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_ADC_PRESCALER_VALUE ${doc.STM32_ADC_PRESCALER_VALUE!"2"}
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/*
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* DAC driver system settings.
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*/
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#define STM32_DAC_DUAL_MODE ${doc.STM32_DAC_DUAL_MODE!"FALSE"}
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#define STM32_DAC_USE_DAC1_CH1 ${doc.STM32_DAC_USE_DAC1_CH1!"FALSE"}
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#define STM32_DAC_USE_DAC1_CH2 ${doc.STM32_DAC_USE_DAC1_CH2!"FALSE"}
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#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY ${doc.STM32_DAC_DAC1_CH1_IRQ_PRIORITY!"10"}
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#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY ${doc.STM32_DAC_DAC1_CH2_IRQ_PRIORITY!"10"}
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#define STM32_DAC_DAC1_CH1_DMA_PRIORITY ${doc.STM32_DAC_DAC1_CH1_DMA_PRIORITY!"2"}
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#define STM32_DAC_DAC1_CH2_DMA_PRIORITY ${doc.STM32_DAC_DAC1_CH2_DMA_PRIORITY!"2"}
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#define STM32_DAC_DAC1_CH1_DMA_STREAM ${doc.STM32_DAC_DAC1_CH1_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_DAC_DAC1_CH2_DMA_STREAM ${doc.STM32_DAC_DAC1_CH2_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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/*
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* GPT driver system settings.
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*/
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#define STM32_GPT_USE_TIM1 ${doc.STM32_GPT_USE_TIM1!"FALSE"}
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#define STM32_GPT_USE_TIM2 ${doc.STM32_GPT_USE_TIM2!"FALSE"}
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#define STM32_GPT_USE_TIM16 ${doc.STM32_GPT_USE_TIM16!"FALSE"}
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#define STM32_GPT_USE_TIM17 ${doc.STM32_GPT_USE_TIM17!"FALSE"}
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/*
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* I2C driver system settings.
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*/
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#define STM32_I2C_USE_I2C1 ${doc.STM32_I2C_USE_I2C1!"FALSE"}
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#define STM32_I2C_USE_I2C3 ${doc.STM32_I2C_USE_I2C3!"FALSE"}
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#define STM32_I2C_BUSY_TIMEOUT ${doc.STM32_I2C_BUSY_TIMEOUT!"50"}
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#define STM32_I2C_I2C1_RX_DMA_STREAM ${doc.STM32_I2C_I2C1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_I2C_I2C1_TX_DMA_STREAM ${doc.STM32_I2C_I2C1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_I2C_I2C3_RX_DMA_STREAM ${doc.STM32_I2C_I2C3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_I2C_I2C3_TX_DMA_STREAM ${doc.STM32_I2C_I2C3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_I2C_I2C1_IRQ_PRIORITY ${doc.STM32_I2C_I2C1_IRQ_PRIORITY!"5"}
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#define STM32_I2C_I2C3_IRQ_PRIORITY ${doc.STM32_I2C_I2C3_IRQ_PRIORITY!"5"}
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#define STM32_I2C_I2C1_DMA_PRIORITY ${doc.STM32_I2C_I2C1_DMA_PRIORITY!"3"}
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#define STM32_I2C_I2C3_DMA_PRIORITY ${doc.STM32_I2C_I2C3_DMA_PRIORITY!"3"}
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#define STM32_I2C_DMA_ERROR_HOOK(i2cp) ${doc.STM32_I2C_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
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/*
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* ICU driver system settings.
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*/
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#define STM32_ICU_USE_TIM1 ${doc.STM32_ICU_USE_TIM1!"FALSE"}
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#define STM32_ICU_USE_TIM2 ${doc.STM32_ICU_USE_TIM2!"FALSE"}
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/*
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* PWM driver system settings.
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*/
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#define STM32_PWM_USE_ADVANCED ${doc.STM32_PWM_USE_ADVANCED!"FALSE"}
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#define STM32_PWM_USE_TIM1 ${doc.STM32_PWM_USE_TIM1!"FALSE"}
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#define STM32_PWM_USE_TIM2 ${doc.STM32_PWM_USE_TIM2!"FALSE"}
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#define STM32_PWM_USE_TIM16 ${doc.STM32_PWM_USE_TIM16!"FALSE"}
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#define STM32_PWM_USE_TIM17 ${doc.STM32_PWM_USE_TIM17!"FALSE"}
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/*
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* RTC driver system settings.
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*/
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#define STM32_RTC_PRESA_VALUE ${doc.STM32_RTC_PRESA_VALUE!"128"}
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#define STM32_RTC_PRESS_VALUE ${doc.STM32_RTC_PRESS_VALUE!"256"}
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#define STM32_RTC_CR_INIT ${doc.STM32_RTC_CR_INIT!"0"}
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#define STM32_RTC_TAMPCR_INIT ${doc.STM32_RTC_TAMPCR_INIT!"0"}
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/*
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* SERIAL driver system settings.
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*/
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#define STM32_SERIAL_USE_USART1 ${doc.STM32_SERIAL_USE_USART1!"FALSE"}
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#define STM32_SERIAL_USE_USART2 ${doc.STM32_SERIAL_USE_USART2!"FALSE"}
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#define STM32_SERIAL_USE_LPUART1 ${doc.STM32_SERIAL_USE_LPUART1!"FALSE"}
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#define STM32_SERIAL_USART1_PRIORITY ${doc.STM32_SERIAL_USART1_PRIORITY!"12"}
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#define STM32_SERIAL_USART2_PRIORITY ${doc.STM32_SERIAL_USART2_PRIORITY!"12"}
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#define STM32_SERIAL_LPUART1_PRIORITY ${doc.STM32_SERIAL_LPUART1_PRIORITY!"12"}
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/*
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* SIO driver system settings.
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*/
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#define STM32_SIO_USE_USART1 ${doc.STM32_SIO_USE_USART1!"FALSE"}
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#define STM32_SIO_USE_USART2 ${doc.STM32_SIO_USE_USART2!"FALSE"}
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#define STM32_SIO_USE_LPUART1 ${doc.STM32_SIO_USE_LPUART1!"FALSE"}
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/*
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* SPI driver system settings.
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*/
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#define STM32_SPI_USE_SPI1 ${doc.STM32_SPI_USE_SPI1!"FALSE"}
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#define STM32_SPI_USE_SPI2 ${doc.STM32_SPI_USE_SPI2!"FALSE"}
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#define STM32_SPI_USE_SPI3 ${doc.STM32_SPI_USE_SPI3!"FALSE"}
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#define STM32_SPI_SPI1_RX_DMA_STREAM ${doc.STM32_SPI_SPI1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_SPI_SPI1_TX_DMA_STREAM ${doc.STM32_SPI_SPI1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_SPI_SPI2_RX_DMA_STREAM ${doc.STM32_SPI_SPI2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_SPI_SPI2_TX_DMA_STREAM ${doc.STM32_SPI_SPI2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_SPI_SPI3_RX_DMA_STREAM ${doc.STM32_SPI_SPI3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_SPI_SPI3_TX_DMA_STREAM ${doc.STM32_SPI_SPI3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_SPI_SPI1_DMA_PRIORITY ${doc.STM32_SPI_SPI1_DMA_PRIORITY!"1"}
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#define STM32_SPI_SPI2_DMA_PRIORITY ${doc.STM32_SPI_SPI2_DMA_PRIORITY!"1"}
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#define STM32_SPI_SPI3_DMA_PRIORITY ${doc.STM32_SPI_SPI3_DMA_PRIORITY!"1"}
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#define STM32_SPI_SPI1_IRQ_PRIORITY ${doc.STM32_SPI_SPI1_IRQ_PRIORITY!"10"}
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#define STM32_SPI_SPI2_IRQ_PRIORITY ${doc.STM32_SPI_SPI2_IRQ_PRIORITY!"10"}
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#define STM32_SPI_SPI3_IRQ_PRIORITY ${doc.STM32_SPI_SPI3_IRQ_PRIORITY!"10"}
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#define STM32_SPI_DMA_ERROR_HOOK(spip) ${doc.STM32_SPI_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
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/*
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* I2S driver system settings.
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*/
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#define STM32_I2S_USE_SPI2 ${doc.STM32_I2S_USE_SPI2!"FALSE"}
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#define STM32_I2S_SPI2_IRQ_PRIORITY ${doc.STM32_I2S_SPI2_IRQ_PRIORITY!"10"}
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#define STM32_I2S_SPI2_DMA_PRIORITY ${doc.STM32_I2S_SPI2_DMA_PRIORITY!"1"}
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#define STM32_I2S_SPI2_RX_DMA_STREAM ${doc.STM32_I2S_SPI2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_I2S_SPI2_TX_DMA_STREAM ${doc.STM32_I2S_SPI2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
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#define STM32_I2S_DMA_ERROR_HOOK(i2sp) ${doc.STM32_I2S_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
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/*
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* ST driver system settings.
|
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*/
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#define STM32_ST_IRQ_PRIORITY ${doc.STM32_ST_IRQ_PRIORITY!"8"}
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#define STM32_ST_USE_TIMER ${doc.STM32_ST_USE_TIMER!"2"}
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/*
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* TRNG driver system settings.
|
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*/
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#define STM32_TRNG_USE_RNG1 ${doc.STM32_TRNG_USE_RNG1!"FALSE"}
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/*
|
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* UART driver system settings.
|
||||
*/
|
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#define STM32_UART_USE_USART1 ${doc.STM32_UART_USE_USART1!"FALSE"}
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#define STM32_UART_USE_USART2 ${doc.STM32_UART_USE_USART2!"FALSE"}
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#define STM32_UART_USE_LPUART1 ${doc.STM32_UART_USE_LPUART1!"FALSE"}
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#define STM32_UART_USART1_RX_DMA_STREAM ${doc.STM32_UART_USART1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM ${doc.STM32_UART_USART1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
|
||||
#define STM32_UART_USART2_RX_DMA_STREAM ${doc.STM32_UART_USART2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM ${doc.STM32_UART_USART2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
|
||||
#define STM32_UART_LPUART1_RX_DMA_STREAM ${doc.STM32_UART_LPUART1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
|
||||
#define STM32_UART_LPUART1_TX_DMA_STREAM ${doc.STM32_UART_LPUART1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) ${doc.STM32_UART_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
*/
|
||||
#define STM32_WDG_USE_IWDG ${doc.STM32_WDG_USE_IWDG!"FALSE"}
|
||||
|
||||
#endif /* MCUCONF_H */
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
#!/bin/bash
|
||||
if [ $# -eq 2 ]
|
||||
then
|
||||
if [ $1 = "rootpath" ]
|
||||
then
|
||||
find $2 -name "mcuconf.h" -exec bash update_mcuconf_stm32wlxx.sh "{}" \;
|
||||
else
|
||||
echo "Usage: update_mcuconf_stm32wlxx.sh [rootpath <root path>]"
|
||||
fi
|
||||
elif [ $# -eq 1 ]
|
||||
then
|
||||
declare conffile=$(<$1)
|
||||
if egrep -q "STM32WLxx_MCUCONF" <<< "$conffile"
|
||||
then
|
||||
echo Processing: $1
|
||||
egrep -e "\#define\s+[a-zA-Z0-9_()]*\s+[^\s]" <<< "$conffile" | sed -r 's/\#define\s+([a-zA-Z0-9_]*)(\([^)]*\))?\s+/\1=/g' > ./values.txt
|
||||
if ! fmpp -q -C conf.fmpp -S ../ftl/processors/conf/mcuconf_stm32wlxx
|
||||
then
|
||||
echo
|
||||
echo "aborted"
|
||||
exit 1
|
||||
fi
|
||||
cp ./mcuconf.h $1
|
||||
rm ./mcuconf.h ./values.txt
|
||||
fi
|
||||
else
|
||||
echo "Usage: update_mcuconf_stm32wlxx.sh [rootpath <root path>]"
|
||||
echo " update_mcuconf_stm32wlxx.sh <configuration file>]"
|
||||
fi
|
||||
Loading…
Reference in New Issue