mirror of https://github.com/rusefi/ChibiOS.git
Implemented support for multiple sandboxes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12977 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
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7e335f49a9
commit
7040887600
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@ -756,6 +756,9 @@
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/* Port-specific settings (override port settings defaulted in chcore.h). */
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/*===========================================================================*/
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#define PORT_USE_SYSCALL TRUE
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#define PORT_SWITCHED_REGIONS_NUMBER 0
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#endif /* CHCONF_H */
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/** @} */
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@ -122,13 +122,13 @@ void port_unprivileged_jump(regarm_t pc, regarm_t psp) {
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void SVC_Handler(void) {
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/*lint -restore*/
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uint32_t control;
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uint32_t psp = __get_PSP();
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chDbgAssert(((uint32_t)__builtin_return_address(0) & 4U) == 0U,
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"not process");
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#if PORT_USE_SYSCALL == TRUE
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uint32_t control;
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/* Caller context.*/
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struct port_extctx *ectxp = (struct port_extctx *)psp;
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@ -74,7 +74,18 @@
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* @brief Implements a syscall interface on SVC.
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*/
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#if !defined(PORT_USE_SYSCALL) || defined(__DOXYGEN__)
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#define PORT_USE_SYSCALL TRUE
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#define PORT_USE_SYSCALL FALSE
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#endif
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/**
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* @brief Number of MPU regions to be saved/restored during context switch.
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* @note The first region is always region zero.
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* @note The use of this option has an overhead of 8 bytes for each
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* region for each thread.
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* @note Allowed values are 0..4, zero means none.
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*/
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#if !defined(PORT_SWITCHED_REGIONS_NUMBER) || defined(__DOXYGEN__)
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#define PORT_SWITCHED_REGIONS_NUMBER 0
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#endif
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/**
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@ -90,9 +101,11 @@
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/**
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* @brief MPU region to be used to stack guards.
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* @note Make sure this region is not included in the
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* @p PORT_SWITCHED_REGIONS_NUMBER regions range.
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*/
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#if !defined(PORT_USE_MPU_REGION) || defined(__DOXYGEN__)
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#define PORT_USE_MPU_REGION MPU_REGION_7
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#if !defined(PORT_USE_GUARD_MPU_REGION) || defined(__DOXYGEN__)
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#define PORT_USE_GUARD_MPU_REGION MPU_REGION_7
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#endif
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/**
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@ -177,6 +190,10 @@
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if (PORT_SWITCHED_REGIONS_NUMBER < 0) || (PORT_SWITCHED_REGIONS_NUMBER > 4)
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#error "invalid PORT_SWITCHED_REGIONS_NUMBER value"
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#endif
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#if !defined(_FROM_ASM_)
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/**
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* @brief MPU guard page size.
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@ -370,6 +387,12 @@ struct port_linkctx {
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#endif
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struct port_intctx {
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#if (PORT_SWITCHED_REGIONS_NUMBER > 0) || defined(__DOXYGEN__)
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struct {
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uint32_t rbar;
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uint32_t rasr;
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} regions[PORT_SWITCHED_REGIONS_NUMBER];
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#endif
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#if CORTEX_USE_FPU
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regarm_t s16;
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regarm_t s17;
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@ -404,7 +427,7 @@ struct port_context {
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#if (PORT_USE_SYSCALL == TRUE) || defined(__DOXYGEN__)
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struct {
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regarm_t psp;
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const void *regions;
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const void *p;
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} syscall;
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#endif
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};
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@ -414,14 +437,49 @@ struct port_context {
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/* Module macros. */
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/*===========================================================================*/
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/* By default threads have no syscall context information.*/
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#if (PORT_USE_SYSCALL == TRUE) || defined(__DOXYGEN__)
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#define __PORT_SETUP_CONTEXT_SYSCALL(tp, wtop) \
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(tp)->ctx.syscall.psp = (regarm_t)(wtop); \
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(tp)->ctx.syscall.regions = NULL;
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(tp)->ctx.syscall.p = NULL;
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#else
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#define __PORT_SETUP_CONTEXT_SYSCALL(tp, wtop)
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#endif
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/* By default threads have all regions disabled.*/
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#if (PORT_SWITCHED_REGIONS_NUMBER == 0) || defined(__DOXYGEN__)
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#define __PORT_SETUP_CONTEXT_MPU(tp)
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#elif (PORT_SWITCHED_REGIONS_NUMBER == 1) || defined(__DOXYGEN__)
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#define __PORT_SETUP_CONTEXT_MPU(tp) \
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(tp)->ctx.sp->regions[0].rbar = 0U; \
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(tp)->ctx.sp->regions[0].rasr = 0U
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#elif (PORT_SWITCHED_REGIONS_NUMBER == 2) || defined(__DOXYGEN__)
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#define __PORT_SETUP_CONTEXT_MPU(tp) \
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(tp)->ctx.sp->regions[0].rbar = 0U; \
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(tp)->ctx.sp->regions[0].rasr = 0U; \
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(tp)->ctx.sp->regions[1].rbar = 0U; \
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(tp)->ctx.sp->regions[1].rasr = 0U
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#elif (PORT_SWITCHED_REGIONS_NUMBER == 3) || defined(__DOXYGEN__)
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#define __PORT_SETUP_CONTEXT_MPU(tp) \
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(tp)->ctx.sp->regions[0].rbar = 0U; \
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(tp)->ctx.sp->regions[0].rasr = 0U; \
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(tp)->ctx.sp->regions[1].rbar = 0U; \
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(tp)->ctx.sp->regions[1].rasr = 0U; \
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(tp)->ctx.sp->regions[2].rbar = 0U; \
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(tp)->ctx.sp->regions[2].rasr = 0U
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#elif (PORT_SWITCHED_REGIONS_NUMBER == 4) || defined(__DOXYGEN__)
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#define __PORT_SETUP_CONTEXT_MPU(tp) \
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(tp)->ctx.sp->regions[0].rbar = 0U; \
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(tp)->ctx.sp->regions[0].rasr = 0U; \
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(tp)->ctx.sp->regions[1].rbar = 0U; \
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(tp)->ctx.sp->regions[1].rasr = 0U; \
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(tp)->ctx.sp->regions[2].rbar = 0U; \
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(tp)->ctx.sp->regions[2].rasr = 0U; \
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(tp)->ctx.sp->regions[3].rbar = 0U; \
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(tp)->ctx.sp->regions[3].rasr = 0U
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#else
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#endif
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/**
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* @brief Platform dependent part of the @p chThdCreateI() API.
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* @details This code usually setup the context switching frame represented
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@ -433,9 +491,12 @@ struct port_context {
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(tp)->ctx.sp->r4 = (regarm_t)(pf); \
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(tp)->ctx.sp->r5 = (regarm_t)(arg); \
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(tp)->ctx.sp->lr = (regarm_t)_port_thread_start; \
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__PORT_SETUP_CONTEXT_SYSCALL(tp, wtop) \
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__PORT_SETUP_CONTEXT_MPU(tp); \
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__PORT_SETUP_CONTEXT_SYSCALL(tp, wtop); \
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}
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// __PORT_SETUP_CONTEXT_MPU(tp)
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/**
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* @brief Computes the thread working area global size.
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* @note There is no need to perform alignments in this macro.
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_port_switch(ntp, otp); \
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\
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/* Setting up the guard page for the switched-in thread.*/ \
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mpuSetRegionAddress(PORT_USE_MPU_REGION, \
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mpuSetRegionAddress(PORT_USE_GUARD_MPU_REGION, \
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chThdGetSelfX()->wabase); \
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}
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#endif
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@ -559,7 +620,7 @@ extern "C" {
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*
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* @return The interrupts status.
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*/
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static inline syssts_t port_get_irq_status(void) {
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__STATIC_FORCEINLINE syssts_t port_get_irq_status(void) {
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syssts_t sts;
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#if CORTEX_SIMPLIFIED_PRIORITY == FALSE
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@ -579,7 +640,7 @@ static inline syssts_t port_get_irq_status(void) {
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* @retval false the word specified a disabled interrupts status.
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* @retval true the word specified an enabled interrupts status.
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*/
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static inline bool port_irq_enabled(syssts_t sts) {
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__STATIC_FORCEINLINE bool port_irq_enabled(syssts_t sts) {
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#if CORTEX_SIMPLIFIED_PRIORITY == FALSE
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return sts == (syssts_t)CORTEX_BASEPRI_DISABLED;
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@ -595,7 +656,7 @@ static inline bool port_irq_enabled(syssts_t sts) {
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* @retval false not running in ISR mode.
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* @retval true running in ISR mode.
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*/
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static inline bool port_is_isr_context(void) {
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__STATIC_FORCEINLINE bool port_is_isr_context(void) {
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return (bool)((__get_IPSR() & 0x1FFU) != 0U);
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}
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@ -605,7 +666,7 @@ static inline bool port_is_isr_context(void) {
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* @details In this port this function raises the base priority to kernel
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* level.
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*/
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static inline void port_lock(void) {
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__STATIC_FORCEINLINE void port_lock(void) {
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#if CORTEX_SIMPLIFIED_PRIORITY == FALSE
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#if defined(__CM7_REV)
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@ -629,7 +690,7 @@ static inline void port_lock(void) {
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* @details In this port this function lowers the base priority to user
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* level.
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*/
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static inline void port_unlock(void) {
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__STATIC_FORCEINLINE void port_unlock(void) {
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#if CORTEX_SIMPLIFIED_PRIORITY == FALSE
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__set_BASEPRI(CORTEX_BASEPRI_DISABLED);
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* level.
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* @note Same as @p port_lock() in this port.
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*/
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static inline void port_lock_from_isr(void) {
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__STATIC_FORCEINLINE void port_lock_from_isr(void) {
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port_lock();
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}
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* level.
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* @note Same as @p port_unlock() in this port.
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*/
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static inline void port_unlock_from_isr(void) {
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__STATIC_FORCEINLINE void port_unlock_from_isr(void) {
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port_unlock();
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}
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* @note In this port it disables all the interrupt sources by raising
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* the priority mask to level 0.
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*/
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static inline void port_disable(void) {
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__STATIC_FORCEINLINE void port_disable(void) {
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__disable_irq();
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}
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* @note Interrupt sources above kernel level remains enabled.
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* @note In this port it raises/lowers the base priority to kernel level.
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*/
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static inline void port_suspend(void) {
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__STATIC_FORCEINLINE void port_suspend(void) {
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#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) || defined(__DOXYGEN__)
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__set_BASEPRI(CORTEX_BASEPRI_KERNEL);
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* @brief Enables all the interrupt sources.
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* @note In this port it lowers the base priority to user level.
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*/
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static inline void port_enable(void) {
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__STATIC_FORCEINLINE void port_enable(void) {
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#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) || defined(__DOXYGEN__)
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__set_BASEPRI(CORTEX_BASEPRI_DISABLED);
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* modes.
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* @note Implemented as an inlined @p WFI instruction.
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*/
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static inline void port_wait_for_interrupt(void) {
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__STATIC_FORCEINLINE void port_wait_for_interrupt(void) {
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#if CORTEX_ENABLE_WFI_IDLE == TRUE
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__WFI();
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*
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* @return The realtime counter value.
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*/
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static inline rtcnt_t port_rt_get_counter_value(void) {
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__STATIC_FORCEINLINE rtcnt_t port_rt_get_counter_value(void) {
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return DWT->CYCCNT;
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}
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@ -51,8 +51,12 @@
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#error "invalid chconf.h"
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#endif
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.set SCB_ICSR, 0xE000ED04
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.set ICSR_PENDSVSET, 0x10000000
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/* MPU-related constants.*/
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#define MPU_RBAR 0xE000ED9C
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/* Other constants.*/
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#define SCB_ICSR 0xE000ED04
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#define ICSR_PENDSVSET 0x10000000
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.syntax unified
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.cpu cortex-m4
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_port_switch:
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push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
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#if CORTEX_USE_FPU
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/* Saving FPU context.*/
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vpush {s16-s31}
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER > 0
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/* Saving MPU context.*/
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ldr r2, =MPU_RBAR
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#if PORT_SWITCHED_REGIONS_NUMBER >= 1
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mov r3, #0
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str r3, [r2, #-4] /* RNR */
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ldm r2, {r4, r5} /* RBAR, RASR */
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER >= 2
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add r3, #1
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str r4, [r2, #-4] /* RNR */
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ldm r2, {r6, r7} /* RBAR, RASR */
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER >= 3
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add r3, #1
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str r4, [r2, #-4] /* RNR */
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ldm r2, {r8, r9} /* RBAR, RASR */
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER >= 4
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add r3, #1
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str r4, [r2, #-4] /* RNR */
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ldm r2, {r10, r11} /* RBAR, RASR */
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER == 1
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push {r4, r5}
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER == 2
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push {r4, r5, r6, r7}
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER == 3
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push {r4, r5, r6, r7, r8, r9}
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER == 4
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push {r4, r5, r6, r7, r8, r9, r10, r11}
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#endif
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#endif
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str sp, [r1, #CONTEXT_OFFSET]
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#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) && \
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((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4))
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ldr sp, [r0, #CONTEXT_OFFSET]
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER > 0
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/* Restoring MPU context.*/
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#if PORT_SWITCHED_REGIONS_NUMBER == 1
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pop {r4, r5}
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER == 2
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pop {r4, r5, r6, r7}
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER == 3
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pop {r4, r5, r6, r7, r8, r9}
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER == 4
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pop {r4, r5, r6, r7, r8, r9, r10, r11}
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER >= 1
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mov r3, #0
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str r3, [r2, #-4] /* RNR */
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stm r2, {r4, r5} /* RBAR, RASR */
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER >= 2
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add r3, #1
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str r3, [r2, #-4] /* RNR */
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stm r2, {r6, r7} /* RBAR, RASR */
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER >= 3
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add r3, #1
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str r3, [r2, #-4] /* RNR */
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stm r2, {r8, r9} /* RBAR, RASR */
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#endif
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#if PORT_SWITCHED_REGIONS_NUMBER >= 4
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add r3, #1
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str r3, [r2, #-4] /* RNR */
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stm r2, {r10, r11} /* RBAR, RASR */
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#endif
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#endif
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#if CORTEX_USE_FPU
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/* Restoring FPU context.*/
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vpop {s16-s31}
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#endif
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pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}
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