From 70f300b3965367e98dcd68a30e63d531a0e12eb6 Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sat, 24 Apr 2021 13:50:29 +0000
Subject: [PATCH] Added support for LSI prescaler.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14298 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
---
 os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc    | 39 ++++++++++++++++++-
 os/hal/ports/STM32/STM32G4xx/stm32_registry.h |  1 +
 os/hal/ports/STM32/STM32L4xx+/hal_lld.h       |  9 -----
 .../ports/STM32/STM32L4xx+/stm32_registry.h   |  1 +
 os/hal/ports/STM32/STM32L4xx/hal_lld.h        |  9 -----
 os/hal/ports/STM32/STM32L4xx/stm32_registry.h |  1 +
 6 files changed, 40 insertions(+), 20 deletions(-)

diff --git a/os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc b/os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc
index 44ac01c5e..a4c6167ce 100644
--- a/os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc
+++ b/os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc
@@ -29,7 +29,16 @@
 /**
  * @brief   LSI clock frequency.
  */
-#define STM32_LSICLK            32000
+#define STM32_LSIRCCLK          32000
+
+/**
+ * @name    RCC_CSR register bits definitions
+ * @{
+ */
+#define STM32_LSIPRE_MASK       (1 << 4)    /**< LSIPRE field mask.         */
+#define STM32_LSIPRE_NODIV      (0 << 4)    /**< LSI not divided.           */
+#define STM32_LSIPRE_DIV128     (1 << 4)    /**< LSI divided by 128         */
+/** @} */
 
 /*===========================================================================*/
 /* Derived constants and error checks.                                       */
@@ -40,11 +49,37 @@
 #error "STM32_RCC_HAS_LSI not defined in stm32_registry.h"
 #endif
 
+#if !defined(STM32_RCC_HAS_LSI_PRESCALER)
+#error "STM32_RCC_HAS_LSI_PRESCALER not defined in stm32_registry.h"
+#endif
+
 /* Checks on configurations.*/
 #if !defined(STM32_LSI_ENABLED)
 #error "STM32_LSI_ENABLED not defined in mcuconf.h"
 #endif
 
+#if STM32_RCC_HAS_LSI_PRESCALER || defined(__DOXYGEN__)
+
+#if !defined(STM32_LSIPRE)
+#error "STM32_LSIPRE not defined in mcuconf.h"
+#endif
+
+/**
+ * @brief   LSI frequency.
+ */
+#if (STM32_LSIPRE == STM32_LSIPRE_NODIV) || defined(__DOXYGEN__)
+#define STM32_LSICLK                (STM32_LSIRCCLK)
+#elif STM32_LSIPRE == STM32_LSIPRE_DIV128
+#define STM32_LSICLK                (STM32_LSIRCCLK / 128)
+#else
+#error "invalid STM32_LSIPRE value specified"
+#endif
+
+#else /* !STM32_RCC_HAS_LSI_PRESCALER */
+#define STM32_LSIPRE                0
+#define STM32_LSICLK                (STM32_LSIRCCLK)
+#endif /* !STM32_RCC_HAS_LSI_PRESCALER */
+
 /*===========================================================================*/
 /* Driver exported variables.                                                */
 /*===========================================================================*/
@@ -61,7 +96,7 @@ static inline void lsi_init(void) {
 
 #if STM32_LSI_ENABLED
   /* LSI activation.*/
-  RCC->CSR |= RCC_CSR_LSION;
+  RCC->CSR |= STM32_LSIPRE | RCC_CSR_LSION;
   while ((RCC->CSR & RCC_CSR_LSIRDY) == 0) {
   }
 #endif
diff --git a/os/hal/ports/STM32/STM32G4xx/stm32_registry.h b/os/hal/ports/STM32/STM32G4xx/stm32_registry.h
index 9a2cf81e2..59374918c 100644
--- a/os/hal/ports/STM32/STM32G4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32G4xx/stm32_registry.h
@@ -99,6 +99,7 @@
 #define STM32_RCC_HAS_HSI48                 TRUE
 #define STM32_RCC_HAS_MSI                   FALSE
 #define STM32_RCC_HAS_LSI                   TRUE
+#define STM32_RCC_HAS_LSI_PRESCALER         FALSE
 #define STM32_RCC_HAS_LSE                   TRUE
 #define STM32_RCC_HAS_HSE                   TRUE
 
diff --git a/os/hal/ports/STM32/STM32L4xx+/hal_lld.h b/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
index 5de84dc2d..f026d80b4 100644
--- a/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
@@ -66,15 +66,6 @@
 #endif
 /** @} */
 
-/**
- * @name    Internal clock sources
- * @{
- */
-#define STM32_HSI16CLK          16000000    /**< 16MHz internal clock.      */
-#define STM32_HSI48CLK          48000000    /**< 48MHz internal clock.      */
-#define STM32_LSICLK            32000       /**< Low speed internal clock.  */
-/** @} */
-
 /**
  * @name    PWR_CR1 register bits definitions
  * @{
diff --git a/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
index afacc1580..313da911c 100644
--- a/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
@@ -39,6 +39,7 @@
 #define STM32_RCC_HAS_HSI48                 TRUE
 #define STM32_RCC_HAS_MSI                   TRUE
 #define STM32_RCC_HAS_LSI                   TRUE
+#define STM32_RCC_HAS_LSI_PRESCALER         FALSE
 #define STM32_RCC_HAS_LSE                   TRUE
 #define STM32_RCC_HAS_HSE                   TRUE
 
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
index b67247738..889b24ac8 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
@@ -69,15 +69,6 @@
 #endif
 /** @} */
 
-/**
- * @name    Internal clock sources
- * @{
- */
-#define STM32_HSI16CLK          16000000    /**< 16MHz internal clock.      */
-#define STM32_HSI48CLK          48000000    /**< 48MHz internal clock.      */
-#define STM32_LSICLK            32000       /**< Low speed internal clock.  */
-/** @} */
-
 /**
  * @name    PWR_CR1 register bits definitions
  * @{
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
index 88197c240..be0d96b59 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
@@ -39,6 +39,7 @@
 /*#define STM32_RCC_HAS_HSI48                 TRUE*/ /* See below, it changes.*/
 #define STM32_RCC_HAS_MSI                   TRUE
 #define STM32_RCC_HAS_LSI                   TRUE
+#define STM32_RCC_HAS_LSI_PRESCALER         FALSE
 #define STM32_RCC_HAS_LSE                   TRUE
 #define STM32_RCC_HAS_HSE                   TRUE